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RKSimon accepted D89497: [LegalizeTypes] Legalize vector rotate operations.

LGTM

Mon, Oct 19, 1:32 PM · Restricted Project
RKSimon added a reviewer for D89317: [InstructionSimplify] icmp simplification: RKSimon.
Mon, Oct 19, 12:35 PM · Restricted Project
RKSimon committed rGadb52e5f9e66: [InstCombine] foldOrOfICmps - only fold (icmp_eq B, 0) | (icmp_ult/gt A, B) for… (authored by RKSimon).
[InstCombine] foldOrOfICmps - only fold (icmp_eq B, 0) | (icmp_ult/gt A, B) for…
Mon, Oct 19, 9:06 AM
RKSimon added a reverting change for rGa704d8238c86: [InstCombine] Add or((icmp ult/ule (A + C1), C3), (icmp ult/ule (A + C2), C3))…: rG482e6f0041a8: Revert rGa704d8238c86bac: "[InstCombine] Add or((icmp ult/ule (A + C1), C3)….
Mon, Oct 19, 8:04 AM
RKSimon committed rG482e6f0041a8: Revert rGa704d8238c86bac: "[InstCombine] Add or((icmp ult/ule (A + C1), C3)… (authored by RKSimon).
Revert rGa704d8238c86bac: "[InstCombine] Add or((icmp ult/ule (A + C1), C3)…
Mon, Oct 19, 8:04 AM
RKSimon committed rGde885f1b2abe: [InstCombine] Add (icmp ne A, 0) | (icmp ne B, 0) --> (icmp ne (A|B), 0) vector… (authored by RKSimon).
[InstCombine] Add (icmp ne A, 0) | (icmp ne B, 0) --> (icmp ne (A|B), 0) vector…
Mon, Oct 19, 7:43 AM
RKSimon committed rGecd25086d142: [InstCombine] Add (icmp eq B, 0) | (icmp ult/gt A, B) -> (icmp ule A, B-1)… (authored by RKSimon).
[InstCombine] Add (icmp eq B, 0) | (icmp ult/gt A, B) -> (icmp ule A, B-1)…
Mon, Oct 19, 7:25 AM
RKSimon added a reviewer for D89697: * [x86] Implement smarter instruction lowering for FP_TO_UINT from vXf32 to vXi32 for SSE2 and AVX2 by using the exact semantic of the CVTTPS2SI instruction.: andrew.w.kaylor.

For the costs - ideally you need to run the code snippet through llvm-mca (you can do this in godbolt) for various cpus of that level (e.g. avx1 -> sandybridge/btver2/bdver2, avx2 -> znver2/haswell etc.) and use the worst case throughput cost of those runs. For older targets (sse2...) we're more limited on testable cpu targets, I tend to just use slm's costs as they tend to match weak pre-avx cpus).

Mon, Oct 19, 7:13 AM · Restricted Project
RKSimon added a reviewer for D89697: * [x86] Implement smarter instruction lowering for FP_TO_UINT from vXf32 to vXi32 for SSE2 and AVX2 by using the exact semantic of the CVTTPS2SI instruction.: spatel.
Mon, Oct 19, 7:07 AM · Restricted Project
RKSimon committed rGa704d8238c86: [InstCombine] Add or((icmp ult/ule (A + C1), C3), (icmp ult/ule (A + C2), C3))… (authored by RKSimon).
[InstCombine] Add or((icmp ult/ule (A + C1), C3), (icmp ult/ule (A + C2), C3))…
Mon, Oct 19, 6:58 AM
RKSimon committed rG1d90e5304424: [InstCombine] foldOrOfICmps - pull out repeated getOperand() calls. NFCI. (authored by RKSimon).
[InstCombine] foldOrOfICmps - pull out repeated getOperand() calls. NFCI.
Mon, Oct 19, 6:28 AM
RKSimon committed rG3ad9361254d3: [InstCombine] Add or((icmp ult/ule (A + C1), C3), (icmp ult/ule (A + C2), C3))… (authored by RKSimon).
[InstCombine] Add or((icmp ult/ule (A + C1), C3), (icmp ult/ule (A + C2), C3))…
Mon, Oct 19, 6:28 AM
RKSimon committed rGaba7275bb31f: [InstCombine] Add (icmp ne A, 0) | (icmp ne B, 0) --> (icmp ne (A|B), 0) tests (authored by RKSimon).
[InstCombine] Add (icmp ne A, 0) | (icmp ne B, 0) --> (icmp ne (A|B), 0) tests
Mon, Oct 19, 5:44 AM
RKSimon added a comment to D89096: [X86] Fix assert fail when element type is i1..

sorry - missed a minor - LGTM with that change

Mon, Oct 19, 4:01 AM · Restricted Project
RKSimon accepted D89096: [X86] Fix assert fail when element type is i1..

LGTM

Mon, Oct 19, 4:01 AM · Restricted Project
RKSimon committed rG3dd2f02bb085: [InstCombine] Add (icmp eq B, 0) | (icmp ult A, B) -> (icmp ule A, B-1) vector… (authored by RKSimon).
[InstCombine] Add (icmp eq B, 0) | (icmp ult A, B) -> (icmp ule A, B-1) vector…
Mon, Oct 19, 3:51 AM
RKSimon committed rG7fe7d9b130d4: Fix MSVC "not all control paths return a value" warning. NFCI. (authored by RKSimon).
Fix MSVC "not all control paths return a value" warning. NFCI.
Mon, Oct 19, 3:51 AM
RKSimon committed rG0b7b446a406b: [InstCombine] Support vectors-with-undef in and(logicalshift(1,X),1) --> zext(X… (authored by RKSimon).
[InstCombine] Support vectors-with-undef in and(logicalshift(1,X),1) --> zext(X…
Mon, Oct 19, 3:12 AM
RKSimon committed rG2d1fea29231f: [InstCombine] Add vectors-with-undef tests for and(logicalshift(1,X),1) -->… (authored by RKSimon).
[InstCombine] Add vectors-with-undef tests for and(logicalshift(1,X),1) -->…
Mon, Oct 19, 3:12 AM
RKSimon accepted D89656: [X86] Add i32->float and i64->double bitcast pseudo instructions to store folding table..

LGTM

Mon, Oct 19, 2:47 AM · Restricted Project

Sun, Oct 18

RKSimon added inline comments to D89497: [LegalizeTypes] Legalize vector rotate operations.
Sun, Oct 18, 5:55 AM · Restricted Project

Sat, Oct 17

RKSimon added a comment to rG5415fef3abef: [InstCombine] matchFunnelShift - support non-uniform constant vector shift….

@saugustine we probably should move this to a bugzilla ticket if that is OK - is there any way that you can get the ir output with/without the non-uniform constant matchers in matchShiftAmount and get the diff? It should be something to do with vector rotate handling in the dag - either generic or powerpc specific - but I'd like to see the ir diff to help narrow it down.

Sat, Oct 17, 6:55 AM

Fri, Oct 16

RKSimon committed rG83ae625f0c6a: [InstCombine] visitAnd - pull out repeated I.getType() calls. NFCI. (authored by RKSimon).
[InstCombine] visitAnd - pull out repeated I.getType() calls. NFCI.
Fri, Oct 16, 7:44 AM
RKSimon committed rGfe8281e2d009: [InstCombine] visitAnd - add some ((val OP C1) & C2) vector test coverage (authored by RKSimon).
[InstCombine] visitAnd - add some ((val OP C1) & C2) vector test coverage
Fri, Oct 16, 7:43 AM
RKSimon committed rG253f24cf4c45: [InstCombine] Remove custom and(trunc(and(x,c1)),c2) fold (authored by RKSimon).
[InstCombine] Remove custom and(trunc(and(x,c1)),c2) fold
Fri, Oct 16, 7:43 AM
RKSimon added inline comments to D89038: [PatternMatch] Add new FP matchers. NFC..
Fri, Oct 16, 5:33 AM · Restricted Project
RKSimon committed rG981fdf01d527: [InstCombine] foldSelectRotate - canonicalize to OR(SHL,LSHR). NFCI. (authored by RKSimon).
[InstCombine] foldSelectRotate - canonicalize to OR(SHL,LSHR). NFCI.
Fri, Oct 16, 5:21 AM
RKSimon added inline comments to D89497: [LegalizeTypes] Legalize vector rotate operations.
Fri, Oct 16, 5:10 AM · Restricted Project
RKSimon added a comment to D88834: [InstCombine] matchRotate - add support for matching general funnel shifts with constant shift amounts (PR46896).

@saugustine Any update on this? Please can you tell me if its an assert, crash or miscompile?

Fri, Oct 16, 4:33 AM · Restricted Project
RKSimon requested review of D89542: [InstCombine] narrowFunnelShift - fold trunc/zext or(shl(a,x),lshr(b,sub(bw,x))) -> fshl(a,b,x) (PR35155).
Fri, Oct 16, 4:31 AM · Restricted Project
RKSimon committed rGef0ab3cdfe20: [InstCombine] Fix typo in narrow funnel shift test (authored by RKSimon).
[InstCombine] Fix typo in narrow funnel shift test
Fri, Oct 16, 4:18 AM
RKSimon committed rG76996470ef3e: [InstCombine] Add trunc+zext 'narrow' funnel shift tests (PR35155) (authored by RKSimon).
[InstCombine] Add trunc+zext 'narrow' funnel shift tests (PR35155)
Fri, Oct 16, 4:07 AM
RKSimon committed rG1cf347e48b58: [InstCombine] narrowRotate - minor refactoring for funnel shift support. NFC. (authored by RKSimon).
[InstCombine] narrowRotate - minor refactoring for funnel shift support. NFC.
Fri, Oct 16, 3:30 AM
RKSimon committed rG55991b44b7f9: [InstCombine] foldAndOrOfICmpsOfAndWithPow2 - add vector support (authored by RKSimon).
[InstCombine] foldAndOrOfICmpsOfAndWithPow2 - add vector support
Fri, Oct 16, 2:45 AM

Thu, Oct 15

RKSimon added a comment to D39704: [X86] [CodeGen] Compiler not using SHLD/SHRD instructions when doing double shift pattern combine for 16bit or 8bit arguments (PR35155).

@kbelochapka Abandon this patch? The plan is now to handle it in InstCombine inside narrowRotate.

Thu, Oct 15, 11:46 AM
RKSimon added a comment to D43544: [Transforms][SROA] Fixed assertion crash (PR30416).

@kbelochapka Abandon this patch?

Thu, Oct 15, 11:45 AM
RKSimon committed rG23f161662645: [InstCombine] Use m_SpecificInt instead of m_APInt + comparison. NFCI. (authored by RKSimon).
[InstCombine] Use m_SpecificInt instead of m_APInt + comparison. NFCI.
Thu, Oct 15, 8:10 AM
RKSimon committed rGb3330ae42c73: [InstCombine] SimplifyDemandedUseBits - xor - refactor cast<ConstantInt> usage… (authored by RKSimon).
[InstCombine] SimplifyDemandedUseBits - xor - refactor cast<ConstantInt> usage…
Thu, Oct 15, 8:10 AM
RKSimon committed rG2b45639ea0f3: [InstCombine] InstCombineAndOrXor - refactor cast<ConstantInt> usages to… (authored by RKSimon).
[InstCombine] InstCombineAndOrXor - refactor cast<ConstantInt> usages to…
Thu, Oct 15, 8:10 AM
RKSimon committed rG09be7623e4e8: [InstCombine] visitXor - refactor ((X^C1)>>C2)^C3 -> (X>>C2)^((C1>>C2)^C3) fold. (authored by RKSimon).
[InstCombine] visitXor - refactor ((X^C1)>>C2)^C3 -> (X>>C2)^((C1>>C2)^C3) fold.
Thu, Oct 15, 6:38 AM
RKSimon added a comment to D87930: [DAG] Add BuildVectorSDNode::getRepeatedSequence helper to recognise multi-element splat patterns.

ping?

Thu, Oct 15, 3:06 AM · Restricted Project
RKSimon committed rGfadd15231759: [AggressiveInstCombine] foldAnyOrAllBitsSet - add uniform vector support (authored by RKSimon).
[AggressiveInstCombine] foldAnyOrAllBitsSet - add uniform vector support
Thu, Oct 15, 3:03 AM
RKSimon committed rG196bee9648a9: [AggressiveInstCombine] foldAnyOrAllBitsSet - add uniform vector tests (authored by RKSimon).
[AggressiveInstCombine] foldAnyOrAllBitsSet - add uniform vector tests
Thu, Oct 15, 2:49 AM
RKSimon committed rGd7fa9030d47f: [CodeGen][X86] Emit fshl/fshr ir intrinsics for shiftleft128/shiftright128 ms… (authored by RKSimon).
[CodeGen][X86] Emit fshl/fshr ir intrinsics for shiftleft128/shiftright128 ms…
Thu, Oct 15, 2:23 AM
RKSimon closed D89405: [CodeGen][X86] Emit fshl/fshr ir intrinsics for shiftleft128/shiftright128 ms intrinsics.
Thu, Oct 15, 2:23 AM · Restricted Project

Wed, Oct 14

RKSimon added a reverting change for rG25a97c3a43d7: [InstCombine] visitCallInst - retain undefs in vector funnel shift amounts: rG60ba9233d126: Revert rG25a97c3a43d7 - "[InstCombine] visitCallInst - retain undefs in vector….
Wed, Oct 14, 10:20 AM
RKSimon committed rG60ba9233d126: Revert rG25a97c3a43d7 - "[InstCombine] visitCallInst - retain undefs in vector… (authored by RKSimon).
Revert rG25a97c3a43d7 - "[InstCombine] visitCallInst - retain undefs in vector…
Wed, Oct 14, 10:20 AM
RKSimon requested review of D89405: [CodeGen][X86] Emit fshl/fshr ir intrinsics for shiftleft128/shiftright128 ms intrinsics.
Wed, Oct 14, 9:59 AM · Restricted Project
RKSimon committed rGb967b9a7116b: [CodeGen] Move x86 specific ms intrinsic tests into x86 target subfolder. NFCI. (authored by RKSimon).
[CodeGen] Move x86 specific ms intrinsic tests into x86 target subfolder. NFCI.
Wed, Oct 14, 9:37 AM
RKSimon committed rG89657b3a3b57: [InstCombine] narrowRotate - canonicalize to OR(SHL,LSHR). NFCI. (authored by RKSimon).
[InstCombine] narrowRotate - canonicalize to OR(SHL,LSHR). NFCI.
Wed, Oct 14, 8:46 AM
RKSimon committed rG89a2a478708f: [InstCombine] Add m_SpecificIntAllowUndef pattern matcher (authored by RKSimon).
[InstCombine] Add m_SpecificIntAllowUndef pattern matcher
Wed, Oct 14, 8:26 AM
RKSimon committed rG25a97c3a43d7: [InstCombine] visitCallInst - retain undefs in vector funnel shift amounts (authored by RKSimon).
[InstCombine] visitCallInst - retain undefs in vector funnel shift amounts
Wed, Oct 14, 6:41 AM
RKSimon added a comment to D57059: [SLP] Initial support for the vectorization of the non-power-of-2 vectors..

reverse ping

Wed, Oct 14, 5:56 AM · Restricted Project
RKSimon committed rG9b4db7f73331: [InstCombine] Add undef funnel shift amount test coverage (authored by RKSimon).
[InstCombine] Add undef funnel shift amount test coverage
Wed, Oct 14, 4:07 AM
RKSimon committed rG1e4d882f9afe: [InstCombine] matchFunnelShift - add support for non-uniform vectors containing… (authored by RKSimon).
[InstCombine] matchFunnelShift - add support for non-uniform vectors containing…
Wed, Oct 14, 2:44 AM

Tue, Oct 13

RKSimon committed rG9c3138bd6d8b: [InstCombine] visitTrunc - pass through undefs for trunc(shift(trunc/ext(x),c))… (authored by RKSimon).
[InstCombine] visitTrunc - pass through undefs for trunc(shift(trunc/ext(x),c))…
Tue, Oct 13, 6:57 AM
RKSimon committed rG2e604d23b42e: [Analysis] findAffectedValues - remove unused ConstantInt argument. NFCI. (authored by RKSimon).
[Analysis] findAffectedValues - remove unused ConstantInt argument. NFCI.
Tue, Oct 13, 6:57 AM
RKSimon closed D88687: [InstCombine] visitTrunc - pass through undefs for trunc(shift(trunc/ext(x),c)) patterns.
Tue, Oct 13, 6:57 AM · Restricted Project
RKSimon added a comment to rG836d0addee4a: Fix Windows/MSVC build after 6e56046f65.

Thanks @evgeny777 !

Tue, Oct 13, 6:06 AM
RKSimon updated the diff for D88687: [InstCombine] visitTrunc - pass through undefs for trunc(shift(trunc/ext(x),c)) patterns.

Reworked with a Constant::mergeUndefsWith helper as suggested by @lebedev.ri

Tue, Oct 13, 5:38 AM · Restricted Project
RKSimon added inline comments to D89114: [TableGen][SchedModels] Fix aliasing of SchedWriteVariant.
Tue, Oct 13, 4:11 AM · Restricted Project
RKSimon added a comment to D89281: [AArch64] Optimize lowering of 128-bit shifts by a variable.

I agree there isn't any reason not to try and move this to generic legalization - although we are still finding a few edge legalization cases where funnel/rotates fail on some targets so you might encounter that.

Tue, Oct 13, 2:30 AM · Restricted Project
RKSimon added a comment to D89178: [X86] Alternate implementation of D88194..

No objections from me and this looks better than D88194

Tue, Oct 13, 2:18 AM · Restricted Project
RKSimon committed rG6c23cbc5603c: [X86] Convert integer _mm_reduce_* intrinsics to emit llvm.reduction intrinsics… (authored by RKSimon).
[X86] Convert integer _mm_reduce_* intrinsics to emit llvm.reduction intrinsics…
Tue, Oct 13, 1:32 AM
RKSimon committed rG5df61724a171: [InstCombine] Support uniform vector splats in ((((X >> C) & CC) + Y) << C)… (authored by RKSimon).
[InstCombine] Support uniform vector splats in ((((X >> C) & CC) + Y) << C)…
Tue, Oct 13, 1:32 AM
RKSimon closed D87604: [X86] Convert integer _mm_reduce_* intrinsics to emit llvm.reduction intrinsics (PR47506).
Tue, Oct 13, 1:32 AM · Restricted Project
RKSimon added a comment to D88834: [InstCombine] matchRotate - add support for matching general funnel shifts with constant shift amounts (PR46896).

Google has tracked down a failure in openssl for powerpc to this change. (And the fix for the 32-bit vs 64-bit issue below doesn't seem to fix this.)

I'm trying to get a smaller reproduction. But just so that is on your radar.

Tue, Oct 13, 12:52 AM · Restricted Project
RKSimon added a reviewer for D88551: [InstCombine] Test cases added for pattern "(~A & B) ^ A -> (A | B)": RKSimon.

@Jac1494 Please can you rebase this patch against trunk - from the CHECK changes in existing tests it looks like you have some local changes as well.

Tue, Oct 13, 12:50 AM · Restricted Project
RKSimon updated subscribers of D89184: Support complex target features combinations.
Tue, Oct 13, 12:42 AM

Mon, Oct 12

RKSimon committed rG4ff71362683b: [InstCombine] FoldShiftByConstant - create Scalar/Vector constant with… (authored by RKSimon).
[InstCombine] FoldShiftByConstant - create Scalar/Vector constant with…
Mon, Oct 12, 10:41 AM
RKSimon accepted D89197: [X86] Support -march=x86-64-v[234].

LGTM - thank you!

Mon, Oct 12, 10:20 AM · Restricted Project, Restricted Project
RKSimon committed rG24dd0cd1edd5: [InstCombine] FoldShiftByConstant - create Scalar/Vector constant with… (authored by RKSimon).
[InstCombine] FoldShiftByConstant - create Scalar/Vector constant with…
Mon, Oct 12, 10:19 AM
RKSimon committed rG2de368f6a780: [InstCombine] FoldShiftByConstant - merge equivalent types. NFCI. (authored by RKSimon).
[InstCombine] FoldShiftByConstant - merge equivalent types. NFCI.
Mon, Oct 12, 10:19 AM
RKSimon added a comment to D89197: [X86] Support -march=x86-64-v[234].

I'd prefer that our docs explicitly state what we've implemented instead of just referencing an external webpage.

Mon, Oct 12, 9:21 AM · Restricted Project, Restricted Project
RKSimon added a comment to D87604: [X86] Convert integer _mm_reduce_* intrinsics to emit llvm.reduction intrinsics (PR47506).

Ping?

Mon, Oct 12, 8:58 AM · Restricted Project
RKSimon added a comment to D88783: [InstCombine] matchFunnelShift - fold or(shl(a,x),lshr(b,sub(bw,x))) -> fshl(a,b,x) iff x < bw.

@nlopes @mstorsjo Thanks for the regression reports - I've recommitted the patch now, so it should now pass.

Mon, Oct 12, 8:27 AM · Restricted Project
RKSimon added a comment to D89214: [X86] Add basic computeKnownBits support for X86ISD::BSR.

Also, can BSF be handled here as well?

Mon, Oct 12, 8:17 AM · Restricted Project
RKSimon added inline comments to D89214: [X86] Add basic computeKnownBits support for X86ISD::BSR.
Mon, Oct 12, 8:15 AM · Restricted Project
RKSimon committed rGbbf3925879b5: [InstCombine] matchFunnelShift - fold or(shl(a,x),lshr(b,sub(bw,x))) -> fshl(a… (authored by RKSimon).
[InstCombine] matchFunnelShift - fold or(shl(a,x),lshr(b,sub(bw,x))) -> fshl(a…
Mon, Oct 12, 8:08 AM
RKSimon committed rGfa566233706c: [InstCombine] matchFunnelShift - remove shift value commutation. NFCI. (authored by RKSimon).
[InstCombine] matchFunnelShift - remove shift value commutation. NFCI.
Mon, Oct 12, 7:59 AM
RKSimon committed rG02295e6d1a15: [InstCombine] matchFunnelShift - canonicalize to OR(SHL,LSHR). NFCI. (authored by RKSimon).
[InstCombine] matchFunnelShift - canonicalize to OR(SHL,LSHR). NFCI.
Mon, Oct 12, 7:23 AM
RKSimon committed rGc252200e4de4: [DAG][ARM][MIPS][RISCV] Improve funnel shift promotion to use 'double shift'… (authored by RKSimon).
[DAG][ARM][MIPS][RISCV] Improve funnel shift promotion to use 'double shift'…
Mon, Oct 12, 6:20 AM
RKSimon closed D89139: [DAG][ARM][MIPS][RISCV] Improve funnel shift promotion to use 'double shift' patterns.
Mon, Oct 12, 6:20 AM · Restricted Project
RKSimon added a reverting change for rGb97093e52003: [InstCombine] matchFunnelShift - fold or(shl(a,x),lshr(b,sub(bw,x))) -> fshl(a…: rG45d785e22b2c: Revert rGb97093e520036f8 - "[InstCombine] matchFunnelShift - fold or(shl(a,x)….
Mon, Oct 12, 3:40 AM
RKSimon committed rG45d785e22b2c: Revert rGb97093e520036f8 - "[InstCombine] matchFunnelShift - fold or(shl(a,x)… (authored by RKSimon).
Revert rGb97093e520036f8 - "[InstCombine] matchFunnelShift - fold or(shl(a,x)…
Mon, Oct 12, 3:40 AM
RKSimon added a reverting change for D88783: [InstCombine] matchFunnelShift - fold or(shl(a,x),lshr(b,sub(bw,x))) -> fshl(a,b,x) iff x < bw: rG45d785e22b2c: Revert rGb97093e520036f8 - "[InstCombine] matchFunnelShift - fold or(shl(a,x)….
Mon, Oct 12, 3:40 AM · Restricted Project
RKSimon added inline comments to D89197: [X86] Support -march=x86-64-v[234].
Mon, Oct 12, 2:30 AM · Restricted Project, Restricted Project
RKSimon added a comment to D88783: [InstCombine] matchFunnelShift - fold or(shl(a,x),lshr(b,sub(bw,x))) -> fshl(a,b,x) iff x < bw.

Alive2 complains about one of the test cases:

Mon, Oct 12, 2:07 AM · Restricted Project

Sun, Oct 11

RKSimon added inline comments to D89200: [X86] Add custom type legalization for i64 saddo/ssubo on 32-bit targets. Same for i128 on 64-bit targets..
Sun, Oct 11, 6:10 AM · Restricted Project
RKSimon committed rGc7f3bc87d3e5: Fix Wdocumentation warning. NFCI. (authored by RKSimon).
Fix Wdocumentation warning. NFCI.
Sun, Oct 11, 3:25 AM
RKSimon committed rG913d7a110efa: [X86][SSE2] Use smarter instruction patterns for lowering UMIN/UMAX with v8i16. (authored by RKSimon).
[X86][SSE2] Use smarter instruction patterns for lowering UMIN/UMAX with v8i16.
Sun, Oct 11, 3:22 AM
RKSimon closed D87236: [X86][SSE2] Use smarter instruction patterns for lowering UMIN/UMAX with v8i16..
Sun, Oct 11, 3:21 AM · Restricted Project
RKSimon committed rG7c71b44980b9: [InstCombine] Remove accidental unnecessary ConstantExpr qualification added in… (authored by RKSimon).
[InstCombine] Remove accidental unnecessary ConstantExpr qualification added in…
Sun, Oct 11, 2:40 AM
RKSimon committed rGb97093e52003: [InstCombine] matchFunnelShift - fold or(shl(a,x),lshr(b,sub(bw,x))) -> fshl(a… (authored by RKSimon).
[InstCombine] matchFunnelShift - fold or(shl(a,x),lshr(b,sub(bw,x))) -> fshl(a…
Sun, Oct 11, 2:38 AM
RKSimon closed D88783: [InstCombine] matchFunnelShift - fold or(shl(a,x),lshr(b,sub(bw,x))) -> fshl(a,b,x) iff x < bw.
Sun, Oct 11, 2:37 AM · Restricted Project
RKSimon committed rGb752daa26b64: [InstCombine] Replace getLogBase2 internal helper with ConstantExpr… (authored by RKSimon).
[InstCombine] Replace getLogBase2 internal helper with ConstantExpr…
Sun, Oct 11, 2:32 AM
RKSimon requested changes to D89197: [X86] Support -march=x86-64-v[234].

Please can you add an entry to the 12.00 release notes describing this? Maybe somewhere in the clang docs as well?

Sun, Oct 11, 12:26 AM · Restricted Project, Restricted Project

Sat, Oct 10

RKSimon committed rG702ccb40e2d7: [InstCombine] getLogBase2(undef) -> 0. (authored by RKSimon).
[InstCombine] getLogBase2(undef) -> 0.
Sat, Oct 10, 12:33 PM
RKSimon committed rG3aab3cbd4a1a: [InstCombine] getLogBase2 - no need to specify Type. NFCI. (authored by RKSimon).
[InstCombine] getLogBase2 - no need to specify Type. NFCI.
Sat, Oct 10, 12:15 PM
RKSimon updated the diff for D89139: [DAG][ARM][MIPS][RISCV] Improve funnel shift promotion to use 'double shift' patterns.

Use getZeroExtendInReg and refresh with ARM/MIPS changes

Sat, Oct 10, 11:38 AM · Restricted Project