In D94083#2486800, @fhahn wrote:FWIW I think it would be good to have a bit more details in the description for changes such as this, like a link to the public docs for the extension.
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Fri, Feb 5
Fri, Feb 5
chill added inline comments to D75903: [AArch64][CodeGen] Fixing stack alignment of HFA arguments on AArch64 PCS.
Jan 8 2021
Jan 8 2021
chill added a comment to D94083: [AArch64] Add +pauth archictecture option, allowing the v8.3a pointer authentication extension..
Jan 6 2021
Jan 6 2021
chill accepted D94083: [AArch64] Add +pauth archictecture option, allowing the v8.3a pointer authentication extension..
LGTM
Jan 5 2021
Jan 5 2021
chill accepted D94081: [AArch64] Add +flagm archictecture option, allowing the v8.4a flag modification extension..
LGTM.
Dec 29 2020
Dec 29 2020
Dec 29 2020, 9:22 AM · Restricted Project
Dec 21 2020
Dec 21 2020
Dec 21 2020, 1:47 AM · Restricted Project
Nov 30 2020
Nov 30 2020
In D91994#2422228, @chill wrote:In the Arm Architecture Reference Manual Supplement - Armv8, for Armv8-R AArch64 architecture profile
"A1.4 Architecture extensions" lists among others
- FEAT_SHA1 Advanced SIMD SHA1 instructions
- FEAT_SHA256 Advanced SIMD SHA256 instructions
- FEAT_AES Advanced SIMD AES instructions
- FEAT_PMULL Advanced SIMD PMULL instructions
Is there a document, which says R82 does not implement those ?
chill edited reviewers for D91994: [AArch64] Cortex-R82: remove crypto, added: chill; removed: momchil.velikov.
In the Arm Architecture Reference Manual Supplement - Armv8, for Armv8-R AArch64 architecture profile
"A1.4 Architecture extensions" lists among others
Nov 13 2020
Nov 13 2020
LGTM, thanks.
Nov 13 2020, 9:42 AM · Restricted Project
Nov 13 2020, 9:11 AM · Restricted Project
Nov 9 2020
Nov 9 2020
chill committed rG937ab6a7853d: [ARM][MachineOutliner] Emit more CFI instructions (authored by chill).
[ARM][MachineOutliner] Emit more CFI instructions
Nov 9 2020, 7:26 AM · Restricted Project
Thanks!
Nov 9 2020, 1:23 AM · Restricted Project
Nov 9 2020, 1:23 AM · Restricted Project
Nov 7 2020
Nov 7 2020
Nov 7 2020, 2:21 AM · Restricted Project
Nov 6 2020
Nov 6 2020
Nov 6 2020, 3:12 AM · Restricted Project
Nov 5 2020
Nov 5 2020
chill committed rG5b30d9adc053: [MachineOutliner] Do not outline debug instructions (authored by chill).
[MachineOutliner] Do not outline debug instructions
Nov 5 2020, 11:27 AM · Restricted Project
Cheers!
Nov 5 2020, 10:51 AM · Restricted Project
chill committed rG35d625125465: Add default value for MachineInstr::modifiesRegister. NFC. (authored by chill).
Add default value for MachineInstr::modifiesRegister. NFC.
Nov 5 2020, 10:50 AM · Restricted Project
Cheers!
Nov 5 2020, 10:00 AM · Restricted Project
Nov 4 2020
Nov 4 2020
That should be the minimum number of instructions now, one less and the outlining does not pass the cost threshold.
Nov 4 2020, 7:45 AM · Restricted Project
Nov 4 2020, 7:44 AM · Restricted Project
Ping.
Nov 4 2020, 6:41 AM · Restricted Project
Nov 3 2020
Nov 3 2020
Nov 3 2020, 4:36 AM · Restricted Project
Nov 2 2020
Nov 2 2020
chill committed rG7360d6d921c6: [ARM][MachineOutliner] Do not overestimate LR liveness in return block (authored by chill).
[ARM][MachineOutliner] Do not overestimate LR liveness in return block
Nov 2 2020, 8:48 AM · Restricted Project
In D89625#2367785, @yroux wrote:I'd check if there are some calls of modifiesRegister that pass nullptr, the patch LGTM otherwise
Nov 2 2020, 7:28 AM · Restricted Project
chill added a comment to D89189: [ARM][MachineOutliner] Do not overestimate LR liveness in return block.
Ping.
Nov 2 2020, 1:25 AM · Restricted Project
Ping.
Nov 2 2020, 1:24 AM · Restricted Project
Oct 28 2020
Oct 28 2020
Ping.
Oct 28 2020, 2:39 AM · Restricted Project
Ping.
Oct 28 2020, 2:39 AM · Restricted Project
Oct 23 2020
Oct 23 2020
Oct 23 2020, 8:00 AM · Restricted Project
Oct 22 2020
Oct 22 2020
chill added inline comments to D89189: [ARM][MachineOutliner] Do not overestimate LR liveness in return block.
Oct 22 2020, 5:11 AM · Restricted Project
chill updated the diff for D89189: [ARM][MachineOutliner] Do not overestimate LR liveness in return block.
Oct 22 2020, 5:08 AM · Restricted Project
Oct 17 2020
Oct 17 2020
Oct 17 2020, 9:48 AM · Restricted Project
chill added a reviewer for D89625: Add default value for MachineInstr::modifiesRegister. NFC.: yroux.
Oct 17 2020, 9:12 AM · Restricted Project
chill added inline comments to D89189: [ARM][MachineOutliner] Do not overestimate LR liveness in return block.
Oct 17 2020, 9:12 AM · Restricted Project
chill updated the diff for D89189: [ARM][MachineOutliner] Do not overestimate LR liveness in return block.
Oct 17 2020, 9:10 AM · Restricted Project
Oct 17 2020, 8:51 AM · Restricted Project
Oct 16 2020
Oct 16 2020
Oct 16 2020, 4:26 AM · Restricted Project
Oct 15 2020
Oct 15 2020
chill updated the diff for D89189: [ARM][MachineOutliner] Do not overestimate LR liveness in return block.
Oct 15 2020, 11:02 AM · Restricted Project
Oct 15 2020, 10:10 AM · Restricted Project
Oct 15 2020, 10:02 AM · Restricted Project
Oct 10 2020
Oct 10 2020
chill added reviewers for D89189: [ARM][MachineOutliner] Do not overestimate LR liveness in return block: yroux, paquette, efriedma.
Oct 10 2020, 8:21 AM · Restricted Project
chill requested review of D89189: [ARM][MachineOutliner] Do not overestimate LR liveness in return block.
Oct 10 2020, 8:20 AM · Restricted Project
Oct 2 2020
Oct 2 2020
Sep 28 2020
Sep 28 2020
Sep 25 2020
Sep 25 2020
chill committed rGa88c722e687e: [AArch64] PAC/BTI code generation for LLVM generated functions (authored by chill).
[AArch64] PAC/BTI code generation for LLVM generated functions
In D85649 I changed the module flags to be always present and have a zero/non-zero value. That's needed during LTO, if a flag is present in one module and absent in another,
no error is reported and the existing flags is used in the merged module, affecting the codegen for the module that did not initially have the flag.
Sep 24 2020
Sep 24 2020
chill committed rGbd44558001e9: [AArch64][GlobalISel] Implement __builtin_return_address for PAC-RET (authored by chill).
[AArch64][GlobalISel] Implement __builtin_return_address for PAC-RET
Sep 24 2020, 10:05 AM · Restricted Project
chill updated the diff for D84502: [AArch64][GlobalISel] Implement __builtin_return_address for PAC-RET.
Rebased.
Sep 24 2020, 8:39 AM · Restricted Project
In D75044#2292302, @danielkiss wrote:@chill ping.
In D85649#2282286, @nickdesaulniers wrote:Thanks @tejohnson for the feedback. Error sounds fine. The only other question I have is that a common pattern in the Linux kernel for progressive support of the ARM ISA extensions is to build isolated translation units that either use those features unconditionally but wont call into those translation units at runtime if the extensions are not present, or the kernel will live patch itself (ie. "alternatives" patching). Maybe @mrutland has thoughts; with BTI be runtime-patchable or otherwise enable-able at runtime. ie. one kernel image that runs on hardware both with and without BTI ISA extensions?
If the plan is to have isolated TUs built with BTI, then the "Error" policy sounds like this would be incompatible; but I don't think the point of BTI is to have some small portion of the code built with it. IIRC, doesn't BTI uses the no-op encoding space? So I guess one image could run on hardware regardless of actual BTI hardware support. So it wouldn't be patched in at runtime either. In that case, via kernel config I guess we'd build everything with BTI, and have build time errors for translation units that accidentally dropped KBUILD_CFLAGS, which happens a lot, but is fixable in kernel's build system sources.
The final piece of food for thought is ensuring that we can LTO C code built with BTI can link with out of line asm; Clang usually needs the assembler directives in place in the source being assembled to enable architectural extensions. If "Error" policy is used, can we still LTO C and asm sources? I assume we "should" be able to, but it might save trouble down the road to test that locally. Particularly, having C code that calls asm routines and the visibility of those routines during LTO has given us trouble in the past, when enabling CFI (control flow integrity; which I believe has some overlap with BTI but some subtle differences as well; I wouldn't call them perfect substitutes).
LTO related fixes - user Error combining behaviour, always emit the attributes with values 0 or 1
so they are present and their values can be checked for being the same during.
Sep 21 2020
Sep 21 2020
chill committed rG742250bf62a9: [ARM][CMSE] Issue an error if passing arguments through memory across (authored by chill).
[ARM][CMSE] Issue an error if passing arguments through memory across
chill closed D86478: [ARM][CMSE] Issue an error if passing arguments through memory across security boundary.
Sep 21 2020, 9:26 AM · Restricted Project
Some tests started failing: http://lab.llvm.org:8011/builders/llvm-clang-x86_64-expensive-checks-ubuntu/builds/9071
Sep 18 2020
Sep 18 2020
It looks like the only value that makes sense is Error - any other policy (existing or not) would potentially lead to meaningfully different code generated with or without LTO.
Sep 17 2020
Sep 17 2020
Thank you for your comments. I'd like to have the same behaviour with or without LTO, which is apparently not the case with this patch.
Sep 16 2020
Sep 16 2020
Ping.
chill added a comment to D86478: [ARM][CMSE] Issue an error if passing arguments through memory across security boundary.
Ping
Sep 16 2020, 3:37 AM · Restricted Project
Sep 8 2020
Sep 8 2020
Ping,
Sep 7 2020
Sep 7 2020
chill committed rGeb482afaf5bb: Reduce the number of memory allocations when displaying (authored by chill).
Reduce the number of memory allocations when displaying
chill closed D86088: Reduce the number of memory allocations when displaying a warning about clobbering reserved registers (NFC)..
Sep 7 2020, 9:05 AM · Restricted Project
LGTM.
Sep 7 2020, 3:34 AM · Restricted Project
chill added a comment to D86478: [ARM][CMSE] Issue an error if passing arguments through memory across security boundary.
Ping.
Sep 7 2020, 1:52 AM · Restricted Project
Sep 2 2020
Sep 2 2020
LGTM. It'd be nice if we could get someone non-Arm to have a look too. though.
LGTM, as soon as D85649 is accepted (so they stay in sync).
Emit function-level LLVM IR attributes only when there's a GCC-style function attribute and be explicit with enabling/disabling.
Fixed an error where "none" in deferred to module attributes, instead of overriding them.
chill added a comment to D84502: [AArch64][GlobalISel] Implement __builtin_return_address for PAC-RET.
No, not yet.
Sep 2 2020, 1:06 AM · Restricted Project
Sep 1 2020
Sep 1 2020
In addition to the disabling of BTI in D81251, there's an issue that we explicitly disable BTI via branch-protection=none, the attribute would just be missing and we'll pick up the module attributes, which is not what we want.
Sep 1 2020, 4:38 AM · Restricted Project
Aug 27 2020
Aug 27 2020
chill added a comment to D86088: Reduce the number of memory allocations when displaying a warning about clobbering reserved registers (NFC)..
Ping?
Aug 27 2020, 3:18 AM · Restricted Project
Aug 25 2020
Aug 25 2020
Aug 24 2020
Aug 24 2020
chill requested review of D86478: [ARM][CMSE] Issue an error if passing arguments through memory across security boundary.
Aug 24 2020, 10:59 AM · Restricted Project
In D85649#2231236, @tellenbach wrote:Does this conflict with D80791?
It does, we're using different module attributes.
Aug 21 2020
Aug 21 2020
In D85649 I suggested a different version of module flags, which is a bit nicer to use, e.g. one can say just
getModuleFlag("sign-return-address-with-bkey") != nullptr
instead of a) checking for the flag presence, b) getting its value and c) comparing it to a set of strings, which is
way too verbose.
Aug 20 2020
Aug 20 2020
chill added a comment to D84502: [AArch64][GlobalISel] Implement __builtin_return_address for PAC-RET.
Thanks!
Aug 20 2020, 12:47 AM · Restricted Project
Aug 19 2020
Aug 19 2020
Ping?
Aug 18 2020
Aug 18 2020
chill added a comment to D84502: [AArch64][GlobalISel] Implement __builtin_return_address for PAC-RET.
Ping?
Aug 18 2020, 7:53 AM · Restricted Project
Aug 17 2020
Aug 17 2020
chill requested review of D86088: Reduce the number of memory allocations when displaying a warning about clobbering reserved registers (NFC)..
Aug 17 2020, 9:17 AM · Restricted Project
Aug 12 2020
Aug 12 2020
In D85649#2207922, @nickdesaulniers wrote:
Is there a test for no module attributes + function level attribute enabling pac/bti that tests that just that function gets the proper handling?
Aug 11 2020
Aug 11 2020
In D80791#2210124, @danielkiss wrote:it is not useful to have a bti annotated function unless everything else is bti compatible too: it is all or nothing per elf module.
This is false. Some functions in an elf module could be in a guarded region, some in a non-guarded region. Some function may always
be called in a "BTI-safe" way, which may be unknown to the compiler.Right now the elf and all of the text sections considered BTI enabled or not. The dynamic linkers/loaders can't support this
use case without additional information to be encoded somewhere (and specified). To support such we need to consider grouping/align to page
boundaries these functions in the linker because BTI could be controlled by flags in PTE.
With the current spec this usecase is not supported in this way. The user have to link the BTI protected code into another elf.
Side note: The force-bti linker option can't work with half BTI enabled objects.
In D80791#2209624, @nsz wrote:In D80791#2207203, @chill wrote:I would prefer to avoid the situation where the markings of two otherwise identical files were different,
depending on how the files were produced, no matter if it was a common or a special case.i don't see why it is desirable to silently get marking on an object file if function definitions happen to be bti compatible in it:
chill updated the diff for D84502: [AArch64][GlobalISel] Implement __builtin_return_address for PAC-RET.
Well, it wasn't completely broken, just a little bit :D
Aug 11 2020, 4:58 AM · Restricted Project
chill planned changes to D84502: [AArch64][GlobalISel] Implement __builtin_return_address for PAC-RET.
Aug 11 2020, 3:02 AM · Restricted Project
Aug 10 2020
Aug 10 2020
chill requested review of D84502: [AArch64][GlobalISel] Implement __builtin_return_address for PAC-RET.
Aug 10 2020, 12:21 PM · Restricted Project