In D140624#4079306, @omjavaid wrote:

This rev has broken lldb-arm-ubuntu buildbot https://lab.llvm.org/buildbot/#/builders/17/builds/33173

Renaming and cleanup according to review

@jingham
May I kindly ask you to take a look at this patch?

Fix test

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In D140368#4007234, @DavidSpickett wrote:

The intent makes sense. We should stop and report user breakpoints triggered while trying to execute some internal stepping plan, even if they overlap what lldb was planning to do in the first place.

Not totally sure how the change achieves that, this is quite the function. + @jingham who wrote the original changes.

Currently in some cases lldb reports stop reason as "step out" or "step over" (from thread plan completion) over "breakpoint"

This would be clearer if you said "(from thread plan completion) instead of "breakpoint"". Took me a while to work out that it wasn't over meaning step over a breakpoint.

I think the test naming could be clearer. breakpoint/step_out_breakpoint/TestStepOutBreakpoint.py implies it's just about stepping out. How about breakpoint/thread_plan_user_breakpoint/TestThreadPlanUserBreakpoint.py ? Something that is clear we're testing the interaction of automatic internal stepping plans and breakpoints the user puts in.

Is it worth checking that an unconditional user breakpoint is also reported?

Renamed the test, added more tests for unconditional (enabled/disabled) breakpoints and breakpoints with callbacks

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Ping) Any thoughts, questions?

Remove tls-related changes
Add link to dicourse thread

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In D130062#3789671, @aprantl wrote:

Out of curiosity — did you get an email notification from the bot?

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In D132490#3748233, @fhahn wrote:

In D132490#3748231, @kpdev42 wrote:

In D132490#3746679, @fhahn wrote:

Thanks for the update. As I mentioned in the previous message, I think it would be good to just land the test in this patch and I'll submit the code change separately. The test looks good to me.

Thank you fer the review.
Lets keep buildbot green. Please land both fix and test case on your own

Thanks, the idea would be to commit the test first with the checks so it passes without the fix. The fix then only shows the improvements on the test case, so the bots would stay green at all time.

In D132490#3746679, @fhahn wrote:

Thanks for the update. As I mentioned in the previous message, I think it would be good to just land the test in this patch and I'll submit the code change separately. The test looks good to me.

Remove unrelated changes

Address review notes

Update test case so it compares JIT’ed and interpreted FP division results and also check operations on float type. Patch doesn’t implement long double, because IR interpreter currently doesn’t support instruction argument size of more than 64 bit which includes both fp128 and int128. This deserves a separate patch, I think

Address review notes

Well, after some investigation it turned out that:

1. ARMv5 has DMB instruction in the form of mcr p15, #0, <Rd>, c7, c10, #5
2. There is SWP instruction (deprecated on ARMv6), which does atomic exchange of 32-bit values

I've reimplemented sync ops using these primitves, PTAL
Theoretically this should work on ARMv6 and higher, though I didn't check this

At the moment, in case of compiler-rt, __sync_add_and_fetch boils down to
__sync_add_and_fetch_N, where N is the size of data being fetched (4 for int).
The implementation of __sync_fetch_and_add_N does approximately the following:

In D116088#3393350, @efriedma wrote:

D120026 is merged now, which addresses the issue of the compiler generating __sync calls where it isn't supposed to.

Does anyone want to continue discussing what changes to compiler-rt would be appropriate? I didn't mean to completely shut down discussion with my comment.

Updated lld tests. Please note I have used the mask instead of annotated offsets. I did not use the mask where the offset value is important (relocs, etc.)

• Updated jal and jalx instructions
• Fixed lld tests
• Rebased

Add hashlib

In D109577#3355478, @cmatthews wrote:

Actually, I just realized this has a serious bug. The hash function in python is salted, so results are different between process restarts.

https://docs.python.org/3/reference/datamodel.html#object.__hash__

Can you use a different hash function?

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An update for Cortex-A55 model. It contains ASIMD fp, misc, crypto and crc instructions.

Addressed review comments

@dmgreen

Is it possible to a better example? COPY instructions (especially no-op copys like these) are often expected to be removed by reg-alloc and any scheduling info you give them is likely misleading.”

@cmatthews Hi, could you please review latest changes?

Addressed review comments

In D116088#3254400, @joerg wrote:

Correct me if I'm wrong, but I don't think this stubs are async signal safe nor will they work for preemptive multitasking systems?

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Address review commentaries. Thank you

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Strip unneeded code and fix compilation issues