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Modifiedllvm/lib/CodeGen/MIRParser/MIParser.cpp
Modifiedllvm/lib/CodeGen/MachineOperand.cpp
Modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-fpext.mir
Modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-fptrunc.mir
Modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir
Modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract-vector-elt.mir
Modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-insert-vector-elt.mir
Modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant-32bit.mir
Modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir
Modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
Modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
Modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
Modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
Modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-constant-32bit.mir
Modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-global.mir
Modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir
Modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store.mir
Modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zextload-constant-32bit.mir
Modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zextload-global.mir
Modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.buffer.load.ll
Modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.buffer.load.ll
Modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-load.mir
Modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-split-scalar-load-metadata.mir
Modifiedllvm/test/CodeGen/ARM/GlobalISel/arm-legalize-load-store.mir
Addedllvm/test/CodeGen/MIR/AArch64/base-memoperands.mir
Modifiedllvm/test/CodeGen/PowerPC/aix-cc-abi.ll
Modifiedllvm/test/CodeGen/PowerPC/aix-vec-arg-spills-mir.ll
Modifiedllvm/test/CodeGen/X86/GlobalISel/legalize-memop-scalar-32.mir
Modifiedllvm/test/CodeGen/X86/GlobalISel/legalize-undef.mir
Modifiedllvm/unittests/CodeGen/GlobalISel/LegalizerTest.cpp