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Modifiedinclude/llvm/CodeGen/Passes.h
Addedinclude/llvm/CodeGen/RegAllocCommon.h
Modifiedinclude/llvm/CodeGen/RegAllocRegistry.h
Modifiedlib/CodeGen/LiveIntervals.cpp
Modifiedlib/CodeGen/RegAllocBase.cpp
Modifiedlib/CodeGen/RegAllocBase.h
Modifiedlib/CodeGen/RegAllocBasic.cpp
Modifiedlib/CodeGen/RegAllocFast.cpp
Modifiedlib/CodeGen/RegAllocGreedy.cpp
Modifiedlib/Target/AMDGPU/AMDGPU.h
Modifiedlib/Target/AMDGPU/AMDGPUCallingConv.td
Modifiedlib/Target/AMDGPU/AMDGPURegisterInfo.cpp
Modifiedlib/Target/AMDGPU/AMDGPUTargetMachine.cpp
Modifiedlib/Target/AMDGPU/CMakeLists.txt
Modifiedlib/Target/AMDGPU/SIFrameLowering.cpp
Modifiedlib/Target/AMDGPU/SIFrameLowering.h
Addedlib/Target/AMDGPU/SILowerSGPRSpills.cpp
Modifiedlib/Target/AMDGPU/SIMachineFunctionInfo.cpp
Modifiedlib/Target/AMDGPU/SIMachineFunctionInfo.h
Modifiedlib/Target/AMDGPU/SIRegisterInfo.cpp
Modifiedlib/Target/AMDGPU/SIRegisterInfo.h
Modifiedtest/CodeGen/AMDGPU/callee-frame-setup.ll
Modifiedtest/CodeGen/AMDGPU/callee-special-input-sgprs.ll
Modifiedtest/CodeGen/AMDGPU/callee-special-input-vgprs.ll
Modifiedtest/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll
Modifiedtest/CodeGen/AMDGPU/debug-value2.ll
Modifiedtest/CodeGen/AMDGPU/partial-sgpr-to-vgpr-spills.ll
Addedtest/CodeGen/AMDGPU/sgpr-regalloc-flags.ll
Addedtest/CodeGen/AMDGPU/sgpr-spill-no-vgprs.ll
Modifiedtest/CodeGen/AMDGPU/sgpr-spill-wrong-stack-id.mir
Modifiedtest/CodeGen/AMDGPU/si-spill-sgpr-stack.ll
Modifiedtest/CodeGen/AMDGPU/sibling-call.ll
Modifiedtest/CodeGen/AMDGPU/spill-csr-frame-ptr-reg-copy.ll
Modifiedtest/CodeGen/AMDGPU/spill-empty-live-interval.mir
Modifiedtest/CodeGen/AMDGPU/spill-scavenge-offset.ll
Modifiedtest/CodeGen/AMDGPU/stack-slot-color-sgpr-vgpr-spills.mir