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llvm/trunk/lib/Target/PowerPC/PPCScheduleP9.td
| Show First 20 Lines • Show All 258 Lines • ▼ Show 20 Lines | let SchedModel = P9Model in { | ||||
| def P9_LS_5C : SchedWriteRes<[LS]> { | def P9_LS_5C : SchedWriteRes<[LS]> { | ||||
| let Latency = 5; | let Latency = 5; | ||||
| } | } | ||||
| def P9_DFU_12C : SchedWriteRes<[DFU]> { | def P9_DFU_12C : SchedWriteRes<[DFU]> { | ||||
| let Latency = 12; | let Latency = 12; | ||||
| } | } | ||||
| def P9_DFU_23C : SchedWriteRes<[DFU]> { | |||||
| let Latency = 23; | |||||
| let ResourceCycles = [11]; | |||||
| } | |||||
| def P9_DFU_24C : SchedWriteRes<[DFU]> { | def P9_DFU_24C : SchedWriteRes<[DFU]> { | ||||
| let Latency = 24; | let Latency = 24; | ||||
| let ResourceCycles = [12]; | let ResourceCycles = [12]; | ||||
| } | } | ||||
| def P9_DFU_37C : SchedWriteRes<[DFU]> { | |||||
| let Latency = 37; | |||||
| let ResourceCycles = [25]; | |||||
| } | |||||
| def P9_DFU_58C : SchedWriteRes<[DFU]> { | def P9_DFU_58C : SchedWriteRes<[DFU]> { | ||||
| let Latency = 58; | let Latency = 58; | ||||
| let ResourceCycles = [44]; | let ResourceCycles = [44]; | ||||
| } | } | ||||
| def P9_DFU_76C : SchedWriteRes<[TestGroup, DFU]> { | def P9_DFU_76C : SchedWriteRes<[TestGroup, DFU]> { | ||||
| let Latency = 76; | let Latency = 76; | ||||
| let ResourceCycles = [62]; | let ResourceCycles = [62]; | ||||
| Show All 10 Lines | let SchedModel = P9Model in { | ||||
| def P9_CY_6C : SchedWriteRes<[CY]> { | def P9_CY_6C : SchedWriteRes<[CY]> { | ||||
| let Latency = 6; | let Latency = 6; | ||||
| } | } | ||||
| // ***************** WriteSeq Definitions ***************** | // ***************** WriteSeq Definitions ***************** | ||||
| def P9_LoadAndALUOp_6C : WriteSequence<[P9_LS_4C, P9_ALU_2C]>; | def P9_LoadAndALUOp_6C : WriteSequence<[P9_LS_4C, P9_ALU_2C]>; | ||||
| def P9_LoadAndALUOp_7C : WriteSequence<[P9_LS_5C, P9_ALU_2C]>; | def P9_LoadAndALUOp_7C : WriteSequence<[P9_LS_5C, P9_ALU_2C]>; | ||||
| def P9_LoadAndALU2Op_7C : WriteSequence<[P9_LS_4C, P9_ALU_3C]>; | |||||
| def P9_LoadAndALU2Op_8C : WriteSequence<[P9_LS_5C, P9_ALU_3C]>; | |||||
| def P9_LoadAndPMOp_8C : WriteSequence<[P9_LS_5C, P9_PM_3C]>; | def P9_LoadAndPMOp_8C : WriteSequence<[P9_LS_5C, P9_PM_3C]>; | ||||
| def P9_LoadAndLoadOp_8C : WriteSequence<[P9_LS_4C, P9_LS_4C]>; | def P9_LoadAndLoadOp_8C : WriteSequence<[P9_LS_4C, P9_LS_4C]>; | ||||
| def P9_IntDivAndALUOp_26C_8 : WriteSequence<[P9_DIV_24C_8, P9_ALU_2C]>; | def P9_IntDivAndALUOp_26C_8 : WriteSequence<[P9_DIV_24C_8, P9_ALU_2C]>; | ||||
| def P9_IntDivAndALUOp_42C_8 : WriteSequence<[P9_DIV_40C_8, P9_ALU_2C]>; | def P9_IntDivAndALUOp_42C_8 : WriteSequence<[P9_DIV_40C_8, P9_ALU_2C]>; | ||||
| def P9_StoreAndALUOp_4C : WriteSequence<[P9_LS_1C, P9_ALU_3C]>; | def P9_StoreAndALUOp_4C : WriteSequence<[P9_LS_1C, P9_ALU_3C]>; | ||||
| def P9_ALUOpAndALUOp_4C : WriteSequence<[P9_ALU_2C, P9_ALU_2C]>; | def P9_ALUOpAndALUOp_4C : WriteSequence<[P9_ALU_2C, P9_ALU_2C]>; | ||||
| def P9_DPOpAndALUOp_9C : WriteSequence<[P9_DP_7C, P9_ALU_2C]>; | def P9_DPOpAndALUOp_9C : WriteSequence<[P9_DP_7C, P9_ALU_2C]>; | ||||
| def P9_DPOpAndALU2Op_10C : WriteSequence<[P9_DP_7C, P9_ALU_3C]>; | |||||
| def P9_DPOpAndALUOp_24C_5 : WriteSequence<[P9_DP_22C_5, P9_ALU_2C]>; | def P9_DPOpAndALUOp_24C_5 : WriteSequence<[P9_DP_22C_5, P9_ALU_2C]>; | ||||
| def P9_DPOpAndALUOp_35C_8 : WriteSequence<[P9_DP_33C_8, P9_ALU_2C]>; | def P9_DPOpAndALUOp_35C_8 : WriteSequence<[P9_DP_33C_8, P9_ALU_2C]>; | ||||
| def P9_DPOpAndALU2Op_25C_5 : WriteSequence<[P9_DP_22C_5, P9_ALU_3C]>; | |||||
| def P9_DPOpAndALU2Op_36C_8 : WriteSequence<[P9_DP_33C_8, P9_ALU_3C]>; | |||||
| def P9_BROpAndALUOp_7C : WriteSequence<[P9_BR_5C, P9_ALU_2C]>; | |||||
| // ***************** Defining Itinerary Class Resources ***************** | // ***************** Defining Itinerary Class Resources ***************** | ||||
| // The following itineraries are fully covered by the InstRW definitions in | // The following itineraries are fully covered by the InstRW definitions in | ||||
| // P9InstrResources.td so aren't listed here. | // P9InstrResources.td so aren't listed here. | ||||
| // IIC_FPDivD, IIC_FPDivS, IIC_FPFused, IIC_IntDivD, IIC_LdStLFDU, | // IIC_FPDivD, IIC_FPDivS, IIC_FPFused, IIC_IntDivD, IIC_LdStLFDU, | ||||
| // IIC_LdStLFDUX | // IIC_LdStLFDUX | ||||
| ▲ Show 20 Lines • Show All 111 Lines • Show Last 20 Lines | |||||