# Changeset View

Changeset View

# Standalone View

Standalone View

# test/CodeGen/ARM/no-speculate.ll

- This file was added.

1 | ; RUN: llc -verify-machineinstrs < %s -mtriple=armv7a-eabi | FileCheck %s --check-prefixes=CHECK,CHECK-ARM,CHECK-LE | ||||
---|---|---|---|---|---|

2 | ; RUN: llc -verify-machineinstrs < %s -mtriple=thumbv7a-eabi | FileCheck %s --check-prefixes=CHECK,CHECK-THUMB,CHECK-LE | ||||

3 | ; RUN: llc -verify-machineinstrs < %s -mtriple=thumbv8a-eabi | FileCheck %s --check-prefixes=CHECK,CHECK-THUMB,CHECK-LE | ||||

4 | ; RUN: llc -verify-machineinstrs < %s -mtriple=armv7a_be-eabi | FileCheck %s --check-prefixes=CHECK,CHECK-ARM,CHECK-BE | ||||

5 | ; RUN: llc -verify-machineinstrs < %s -mtriple=thumbv7a_be-eabi | FileCheck %s --check-prefixes=CHECK,CHECK-THUMB,CHECK-BE | ||||

6 | ; RUN: llc -verify-machineinstrs < %s -mtriple=thumbv8a_be-eabi | FileCheck %s --check-prefixes=CHECK,CHECK-THUMB,CHECK-BE | ||||

7 | ; RUN: llc -fast-isel -verify-machineinstrs < %s -mtriple=armv7a-eabi | FileCheck %s --check-prefixes=CHECK,CHECK-ARM | ||||

8 | ; RUN: llc -global-isel -global-isel-abort=0 -verify-machineinstrs < %s -mtriple=armv7a-eabi | FileCheck %s --check-prefixes=CHECK,CHECK-ARM | ||||

9 | | ||||

10 | | ||||

11 | declare i8 @llvm.nospeculateload.i8(i8*, i8*, i8*, i8, i8*) | ||||

12 | declare i8 @llvm.nospeculateload.nolower.i8(i8*, i8*, i8, i8*) | ||||

13 | declare i8 @llvm.nospeculateload.noupper.i8(i8*, i8*, i8, i8*) | ||||

14 | declare i16 @llvm.nospeculateload.i16(i16*, i8*, i8*, i16, i8*) | ||||

15 | declare i16 @llvm.nospeculateload.nolower.i16(i16*, i8*, i16, i8*) | ||||

16 | declare i16 @llvm.nospeculateload.noupper.i16(i16*, i8*, i16, i8*) | ||||

17 | declare i32 @llvm.nospeculateload.i32(i32*, i8*, i8*, i32, i8*) | ||||

18 | declare i32 @llvm.nospeculateload.nolower.i32(i32*, i8*, i32, i8*) | ||||

19 | declare i32 @llvm.nospeculateload.noupper.i32(i32*, i8*, i32, i8*) | ||||

20 | declare i64 @llvm.nospeculateload.i64(i64*, i8*, i8*, i64, i8*) | ||||

21 | declare i64 @llvm.nospeculateload.nolower.i64(i64*, i8*, i64, i8*) | ||||

22 | declare i64 @llvm.nospeculateload.noupper.i64(i64*, i8*, i64, i8*) | ||||

23 | | ||||

24 | define i8 @f_i8(i8* %ptr, i8* %lowerbound, i8* %upperbound, i8* %cmpptr, i8 %failval) { | ||||

25 | entry: | ||||

26 | %0 = tail call i8 @llvm.nospeculateload.i8(i8* %ptr, i8* %lowerbound, i8* %upperbound, i8 %failval, i8* %cmpptr) | ||||

27 | ret i8 %0 | ||||

28 | ; CHECK-LABEL: f_i8: | ||||

29 | ; %failval is passed on the stack | ||||

30 | ; CHECK: ldr{{()|b}}{{()|.w}} [[FAILVAL:r[0-9]+|lr]], [sp{{()|, #[0-9]+}}] | ||||

31 | ; CHECK-NEXT: cmp r3, r1 | ||||

32 | ; CHECK-THUMB-NEXT: it hs | ||||

33 | ; CHECK-NEXT: cmphs r2, r3 | ||||

34 | ; CHECK-THUMB-NEXT: it hi | ||||

35 | ; CHECK-NEXT: ldrbhi [[DST:r[0-9]+]], [r0] | ||||

36 | ; CHECK-THUMB-NEXT: it ls | ||||

37 | ; CHECK-NEXT: movls [[DST]], [[FAILVAL]] | ||||

38 | ; check for csdb encoding: | ||||

39 | ; CHECK-ARM-NEXT: .inst 0xe320f014 | ||||

40 | ; CHECK-THUMB-NEXT: .inst.w 0xf3af8014 | ||||

41 | } | ||||

42 | | ||||

43 | define i8 @f_i8_nolower(i8* %ptr, i8* %lowerbound, i8* %upperbound, i8* %cmpptr, i8 %failval) { | ||||

44 | entry: | ||||

45 | %0 = tail call i8 @llvm.nospeculateload.nolower.i8(i8* %ptr, i8* %upperbound, i8 %failval, i8* %cmpptr) | ||||

46 | ret i8 %0 | ||||

47 | ; CHECK-LABEL: f_i8_nolower: | ||||

48 | ; %failval is passed on the stack | ||||

49 | ; CHECK: ldr{{()|b}}{{()|.w}} [[FAILVAL:r[0-9]+|lr]], [sp{{()|, #[0-9]+}}] | ||||

50 | ; CHECK-NEXT: cmp r3, r2 | ||||

51 | ; CHECK-THUMB-NEXT: it lo | ||||

52 | ; CHECK-NEXT: ldrblo [[DST:r[0-9]+]], [r0] | ||||

53 | ; CHECK-THUMB-NEXT: it hs | ||||

54 | ; CHECK-NEXT: movhs [[DST]], [[FAILVAL]] | ||||

55 | ; check for csdb encoding: | ||||

56 | ; CHECK-ARM-NEXT: .inst 0xe320f014 | ||||

57 | ; CHECK-THUMB-NEXT: .inst.w 0xf3af8014 | ||||

58 | } | ||||

59 | | ||||

60 | define i8 @f_i8_noupper(i8* %ptr, i8* %lowerbound, i8* %upperbound, i8* %cmpptr, i8 %failval) { | ||||

61 | entry: | ||||

62 | %0 = tail call i8 @llvm.nospeculateload.noupper.i8(i8* %ptr, i8* %lowerbound, i8 %failval, i8* %cmpptr) | ||||

63 | ret i8 %0 | ||||

64 | ; CHECK-LABEL: f_i8_noupper: | ||||

65 | ; %failval is passed on the stack | ||||

66 | ; CHECK: ldr{{()|b}}{{()|.w}} [[FAILVAL:r[0-9]+|lr]], [sp{{()|, #[0-9]+}}] | ||||

67 | ; CHECK-NEXT: cmp r3, r1 | ||||

68 | ; CHECK-THUMB-NEXT: it hs | ||||

69 | ; CHECK-NEXT: ldrbhs [[DST:r[0-9]+]], [r0] | ||||

70 | ; CHECK-THUMB-NEXT: it lo | ||||

71 | ; CHECK-NEXT: movlo [[DST]], [[FAILVAL]] | ||||

72 | ; check for csdb encoding: | ||||

73 | ; CHECK-ARM-NEXT: .inst 0xe320f014 | ||||

74 | ; CHECK-THUMB-NEXT: .inst.w 0xf3af8014 | ||||

75 | } | ||||

76 | | ||||

77 | define i16 @f_i16(i16* %ptr, i8* %lowerbound, i8* %upperbound, i8* %cmpptr, i16 %failval) { | ||||

78 | entry: | ||||

79 | %0 = tail call i16 @llvm.nospeculateload.i16(i16* %ptr, i8* %lowerbound, i8* %upperbound, i16 %failval, i8* %cmpptr) | ||||

80 | ret i16 %0 | ||||

81 | ; CHECK-LABEL: f_i16: | ||||

82 | ; %failval is passed on the stack | ||||

83 | ; CHECK: ldr{{()|h}}{{()|.w}} [[FAILVAL:r[0-9]+|lr]], [sp{{()|, #[0-9]+}}] | ||||

84 | ; CHECK-NEXT: cmp r3, r1 | ||||

85 | ; CHECK-THUMB-NEXT: it hs | ||||

86 | ; CHECK-NEXT: cmphs r2, r3 | ||||

87 | ; CHECK-THUMB-NEXT: it hi | ||||

88 | ; CHECK-NEXT: ldrhhi [[DST:r[0-9]+]], [r0] | ||||

89 | ; CHECK-THUMB-NEXT: it ls | ||||

90 | ; CHECK-NEXT: movls [[DST]], [[FAILVAL]] | ||||

91 | ; check for csdb encoding: | ||||

92 | ; CHECK-ARM-NEXT: .inst 0xe320f014 | ||||

93 | ; CHECK-THUMB-NEXT: .inst.w 0xf3af8014 | ||||

94 | } | ||||

95 | | ||||

96 | define i16 @f_i16_nolower(i16* %ptr, i8* %lowerbound, i8* %upperbound, i8* %cmpptr, i16 %failval) { | ||||

97 | entry: | ||||

98 | %0 = tail call i16 @llvm.nospeculateload.nolower.i16(i16* %ptr, i8* %upperbound, i16 %failval, i8* %cmpptr) | ||||

99 | ret i16 %0 | ||||

100 | ; CHECK-LABEL: f_i16_nolower: | ||||

101 | ; %failval is passed on the stack | ||||

102 | ; CHECK: ldr{{()|h}}{{()|.w}} [[FAILVAL:r[0-9]+|lr]], [sp{{()|, #[0-9]+}}] | ||||

103 | ; CHECK-NEXT: cmp r3, r2 | ||||

104 | ; CHECK-THUMB-NEXT: it lo | ||||

105 | ; CHECK-NEXT: ldrhlo [[DST:r[0-9]+]], [r0] | ||||

106 | ; CHECK-THUMB-NEXT: it hs | ||||

107 | ; CHECK-NEXT: movhs [[DST]], [[FAILVAL]] | ||||

108 | ; check for csdb encoding: | ||||

109 | ; CHECK-ARM-NEXT: .inst 0xe320f014 | ||||

110 | ; CHECK-THUMB-NEXT: .inst.w 0xf3af8014 | ||||

111 | } | ||||

112 | | ||||

113 | define i16 @f_i16_noupper(i16* %ptr, i8* %lowerbound, i8* %upperbound, i8* %cmpptr, i16 %failval) { | ||||

114 | entry: | ||||

115 | %0 = tail call i16 @llvm.nospeculateload.noupper.i16(i16* %ptr, i8* %lowerbound, i16 %failval, i8* %cmpptr) | ||||

116 | ret i16 %0 | ||||

117 | ; CHECK-LABEL: f_i16_noupper: | ||||

118 | ; %failval is passed on the stack | ||||

119 | ; CHECK: ldr{{()|h}}{{()|.w}} [[FAILVAL:r[0-9]+|lr]], [sp{{()|, #[0-9]+}}] | ||||

120 | ; CHECK-NEXT: cmp r3, r1 | ||||

121 | ; CHECK-THUMB-NEXT: it hs | ||||

122 | ; CHECK-NEXT: ldrhhs [[DST:r[0-9]+]], [r0] | ||||

123 | ; CHECK-THUMB-NEXT: it lo | ||||

124 | ; CHECK-NEXT: movlo [[DST]], [[FAILVAL]] | ||||

125 | ; check for csdb encoding: | ||||

126 | ; CHECK-ARM-NEXT: .inst 0xe320f014 | ||||

127 | ; CHECK-THUMB-NEXT: .inst.w 0xf3af8014 | ||||

128 | } | ||||

129 | | ||||

130 | define i32 @f_i32(i32* %ptr, i8* %lowerbound, i8* %upperbound, i8* %cmpptr, i32 %failval) { | ||||

131 | entry: | ||||

132 | %0 = tail call i32 @llvm.nospeculateload.i32(i32* %ptr, i8* %lowerbound, i8* %upperbound, i32 %failval, i8* %cmpptr) | ||||

133 | ret i32 %0 | ||||

134 | ; CHECK-LABEL: f_i32: | ||||

135 | ; %failval is passed on the stack | ||||

136 | ; CHECK: ldr{{()|.w}} [[FAILVAL:r[0-9]+|lr]], [sp{{()|, #[0-9]+}}] | ||||

137 | ; CHECK-NEXT: cmp r3, r1 | ||||

138 | ; CHECK-THUMB-NEXT: it hs | ||||

139 | ; CHECK-NEXT: cmphs r2, r3 | ||||

140 | ; CHECK-THUMB-NEXT: it hi | ||||

141 | ; CHECK-NEXT: ldrhi [[DST:r[0-9]+]], [r0] | ||||

142 | ; CHECK-THUMB-NEXT: it ls | ||||

143 | ; CHECK-NEXT: movls [[DST]], [[FAILVAL]] | ||||

144 | ; check for csdb encoding: | ||||

145 | ; CHECK-ARM-NEXT: .inst 0xe320f014 | ||||

146 | ; CHECK-THUMB-NEXT: .inst.w 0xf3af8014 | ||||

147 | } | ||||

148 | | ||||

149 | define i32 @f_i32_nolower(i32* %ptr, i8* %lowerbound, i8* %upperbound, i8* %cmpptr, i32 %failval) { | ||||

150 | entry: | ||||

151 | %0 = tail call i32 @llvm.nospeculateload.nolower.i32(i32* %ptr, i8* %upperbound, i32 %failval, i8* %cmpptr) | ||||

152 | ret i32 %0 | ||||

153 | ; CHECK-LABEL: f_i32_nolower: | ||||

154 | ; %failval is passed on the stack | ||||

155 | ; CHECK: ldr{{()|.w}} [[FAILVAL:r[0-9]+|lr]], [sp{{()|, #[0-9]+}}] | ||||

156 | ; CHECK-NEXT: cmp r3, r2 | ||||

157 | ; CHECK-THUMB-NEXT: it lo | ||||

158 | ; CHECK-NEXT: ldrlo [[DST:r[0-9]+]], [r0] | ||||

159 | ; CHECK-THUMB-NEXT: it hs | ||||

160 | ; CHECK-NEXT: movhs [[DST]], [[FAILVAL]] | ||||

161 | ; check for csdb encoding: | ||||

162 | ; CHECK-ARM-NEXT: .inst 0xe320f014 | ||||

163 | ; CHECK-THUMB-NEXT: .inst.w 0xf3af8014 | ||||

164 | } | ||||

165 | | ||||

166 | define i32 @f_i32_noupper(i32* %ptr, i8* %lowerbound, i8* %upperbound, i8* %cmpptr, i32 %failval) { | ||||

167 | entry: | ||||

168 | %0 = tail call i32 @llvm.nospeculateload.noupper.i32(i32* %ptr, i8* %lowerbound, i32 %failval, i8* %cmpptr) | ||||

169 | ret i32 %0 | ||||

170 | ; CHECK-LABEL: f_i32_noupper: | ||||

171 | ; %failval is passed on the stack | ||||

172 | ; CHECK: ldr{{()|.w}} [[FAILVAL:r[0-9]+|lr]], [sp{{()|, #[0-9]+}}] | ||||

173 | ; CHECK-NEXT: cmp r3, r1 | ||||

174 | ; CHECK-THUMB-NEXT: it hs | ||||

175 | ; CHECK-NEXT: ldrhs [[DST:r[0-9]+]], [r0] | ||||

176 | ; CHECK-THUMB-NEXT: it lo | ||||

177 | ; CHECK-NEXT: movlo [[DST]], [[FAILVAL]] | ||||

178 | ; check for csdb encoding: | ||||

179 | ; CHECK-ARM-NEXT: .inst 0xe320f014 | ||||

180 | ; CHECK-THUMB-NEXT: .inst.w 0xf3af8014 | ||||

181 | } | ||||

182 | | ||||

183 | define i64 @f_i64(i64* %ptr, i8* %lowerbound, i8* %upperbound, i8* %cmpptr, i64 %failval) { | ||||

184 | entry: | ||||

185 | %0 = tail call i64 @llvm.nospeculateload.i64(i64* %ptr, i8* %lowerbound, i8* %upperbound, i64 %failval, i8* %cmpptr) | ||||

186 | ret i64 %0 | ||||

187 | ; CHECK-LABEL: f_i64: | ||||

188 | ; %failval is passed on the stack, in 2 4-byte slots | ||||

189 | ; different variants (e.g. Arm vs Thumb) either load those as 2 ldrs, or 1 | ||||

190 | ; ldrd. This is too complex to check explicitly here. | ||||

191 | ; CHECK: cmp r3, r1 | ||||

192 | ; CHECK-THUMB-NEXT: it hs | ||||

193 | ; CHECK-NEXT: cmphs r2, r3 | ||||

194 | ; CHECK-THUMB-NEXT: it hi | ||||

195 | ; CHECK-NEXT: ldrdhi [[DST1:r[0-9]+|lr]], [[DST2:r[0-9]+|lr]], [r0] | ||||

196 | ; CHECK-THUMB-NEXT: it ls | ||||

197 | ; CHECK-NEXT: movls [[DST1]], [[FAILVAL1:r[0-9]+|lr]] | ||||

198 | ; CHECK-THUMB-NEXT: it ls | ||||

199 | ; CHECK-NEXT: movls [[DST2]], [[FAILVAL2:r[0-9]+|lr]] | ||||

200 | ; check for csdb encoding: | ||||

201 | ; CHECK-ARM-NEXT: .inst 0xe320f014 | ||||

202 | ; CHECK-THUMB-NEXT: .inst.w 0xf3af8014 | ||||

203 | } | ||||

204 | | ||||

205 | define i64 @f_i64_nolower(i64* %ptr, i8* %lowerbound, i8* %upperbound, i8* %cmpptr, i64 %failval) { | ||||

206 | entry: | ||||

207 | %0 = tail call i64 @llvm.nospeculateload.nolower.i64(i64* %ptr, i8* %upperbound, i64 %failval, i8* %cmpptr) | ||||

208 | ret i64 %0 | ||||

209 | ; CHECK-LABEL: f_i64_nolower: | ||||

210 | ; %failval is passed on the stack, in 2 4-byte slots | ||||

211 | ; different variants (e.g. Arm vs Thumb) either load those as 2 ldrs, or 1 | ||||

212 | ; ldrd. This is too complex to check explicitly here. | ||||

213 | ; CHECK: cmp r3, r2 | ||||

214 | ; CHECK-THUMB-NEXT: it lo | ||||

215 | ; CHECK-NEXT: ldrdlo [[DST1:r[0-9]+|lr]], [[DST2:r[0-9]+|lr]], [r0] | ||||

216 | ; CHECK-THUMB-NEXT: it hs | ||||

217 | ; CHECK-NEXT: movhs [[DST1]], [[FAILVAL1:r[0-9]+|lr]] | ||||

218 | ; CHECK-THUMB-NEXT: it hs | ||||

219 | ; CHECK-NEXT: movhs [[DST2]], [[FAILVAL2:r[0-9]+|lr]] | ||||

220 | ; check for csdb encoding: | ||||

221 | ; CHECK-ARM-NEXT: .inst 0xe320f014 | ||||

222 | ; CHECK-THUMB-NEXT: .inst.w 0xf3af8014 | ||||

223 | } | ||||

224 | | ||||

225 | define i64 @f_i64_noupper(i64* %ptr, i8* %lowerbound, i8* %upperbound, i8* %cmpptr, i64 %failval) { | ||||

226 | entry: | ||||

227 | %0 = tail call i64 @llvm.nospeculateload.noupper.i64(i64* %ptr, i8* %lowerbound, i64 %failval, i8* %cmpptr) | ||||

228 | ret i64 %0 | ||||

229 | ; CHECK-LABEL: f_i64_noupper: | ||||

230 | ; %failval is passed on the stack, in 2 4-byte slots | ||||

231 | ; different variants (e.g. Arm vs Thumb) either load those as 2 ldrs, or 1 | ||||

232 | ; ldrd. This is too complex to check explicitly here. | ||||

233 | ; CHECK: cmp r3, r1 | ||||

234 | ; CHECK-THUMB-NEXT: it hs | ||||

235 | ; CHECK-NEXT: ldrdhs [[DST1:r[0-9]+|lr]], [[DST2:r[0-9]+|lr]], [r0] | ||||

236 | ; CHECK-THUMB-NEXT: it lo | ||||

237 | ; CHECK-NEXT: movlo [[DST1]], [[FAILVAL1:r[0-9]+|lr]] | ||||

238 | ; CHECK-THUMB-NEXT: it lo | ||||

239 | ; CHECK-NEXT: movlo [[DST2]], [[FAILVAL2:r[0-9]+|lr]] | ||||

240 | ; check for csdb encoding: | ||||

241 | ; CHECK-ARM-NEXT: .inst 0xe320f014 | ||||

242 | ; CHECK-THUMB-NEXT: .inst.w 0xf3af8014 | ||||

243 | } |