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Differential D40792 Diff 125403 llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

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llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

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Show First 20 Lines • Show All 4,646 Lines • ▼ Show 20 LinesSDNode *DAGCombiner::MatchRotate(SDValue LHS, SDValue RHS, const SDLoc &DL) {
EVT VT = LHS.getValueType(); EVT VT = LHS.getValueType();
if (!TLI.isTypeLegal(VT)) return nullptr; if (!TLI.isTypeLegal(VT)) return nullptr;
// The target must have at least one rotate flavor. // The target must have at least one rotate flavor.
bool HasROTL = TLI.isOperationLegalOrCustom(ISD::ROTL, VT); bool HasROTL = TLI.isOperationLegalOrCustom(ISD::ROTL, VT);
bool HasROTR = TLI.isOperationLegalOrCustom(ISD::ROTR, VT); bool HasROTR = TLI.isOperationLegalOrCustom(ISD::ROTR, VT);
if (!HasROTL && !HasROTR) return nullptr; if (!HasROTL && !HasROTR) return nullptr;
// Check for truncated rotate.
if (LHS.getOpcode() == ISD::TRUNCATE && RHS.getOpcode() == ISD::TRUNCATE) {
assert(LHS.getValueType() == RHS.getValueType());
if (SDNode *Rot = MatchRotate(LHS.getOperand(0), RHS.getOperand(0), DL)) {
return DAG.getNode(ISD::TRUNCATE, SDLoc(LHS), LHS.getValueType(),
SDValue(Rot, 0)).getNode();
}
}
// Match "(X shl/srl V1) & V2" where V2 may not be present. // Match "(X shl/srl V1) & V2" where V2 may not be present.
SDValue LHSShift; // The shift. SDValue LHSShift; // The shift.
SDValue LHSMask; // AND value if any. SDValue LHSMask; // AND value if any.
if (!MatchRotateHalf(LHS, LHSShift, LHSMask)) if (!MatchRotateHalf(LHS, LHSShift, LHSMask))
return nullptr; // Not part of a rotate. return nullptr; // Not part of a rotate.
SDValue RHSShift; // The shift. SDValue RHSShift; // The shift.
SDValue RHSMask; // AND value if any. SDValue RHSMask; // AND value if any.
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