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llvm/trunk/lib/Target/RISCV/RISCVISelLowering.h
//===-- RISCVISelLowering.h - RISCV DAG Lowering Interface ------*- C++ -*-===// | |||||
// | |||||
// The LLVM Compiler Infrastructure | |||||
// | |||||
// This file is distributed under the University of Illinois Open Source | |||||
// License. See LICENSE.TXT for details. | |||||
// | |||||
//===----------------------------------------------------------------------===// | |||||
// | |||||
// This file defines the interfaces that RISCV uses to lower LLVM code into a | |||||
// selection DAG. | |||||
// | |||||
//===----------------------------------------------------------------------===// | |||||
#ifndef LLVM_LIB_TARGET_RISCV_RISCVISELLOWERING_H | |||||
#define LLVM_LIB_TARGET_RISCV_RISCVISELLOWERING_H | |||||
#include "RISCV.h" | |||||
#include "llvm/CodeGen/SelectionDAG.h" | |||||
#include "llvm/Target/TargetLowering.h" | |||||
namespace llvm { | |||||
class RISCVSubtarget; | |||||
namespace RISCVISD { | |||||
enum NodeType : unsigned { | |||||
FIRST_NUMBER = ISD::BUILTIN_OP_END, | |||||
RET_FLAG | |||||
}; | |||||
} | |||||
class RISCVTargetLowering : public TargetLowering { | |||||
const RISCVSubtarget &Subtarget; | |||||
public: | |||||
explicit RISCVTargetLowering(const TargetMachine &TM, | |||||
const RISCVSubtarget &STI); | |||||
// Provide custom lowering hooks for some operations. | |||||
SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override; | |||||
// This method returns the name of a target specific DAG node. | |||||
const char *getTargetNodeName(unsigned Opcode) const override; | |||||
private: | |||||
// Lower incoming arguments, copy physregs into vregs | |||||
SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, | |||||
bool IsVarArg, | |||||
const SmallVectorImpl<ISD::InputArg> &Ins, | |||||
const SDLoc &DL, SelectionDAG &DAG, | |||||
SmallVectorImpl<SDValue> &InVals) const override; | |||||
SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, | |||||
const SmallVectorImpl<ISD::OutputArg> &Outs, | |||||
const SmallVectorImpl<SDValue> &OutVals, const SDLoc &DL, | |||||
SelectionDAG &DAG) const override; | |||||
bool shouldConvertConstantLoadToIntImm(const APInt &Imm, | |||||
Type *Ty) const override { | |||||
return true; | |||||
} | |||||
}; | |||||
} | |||||
#endif |