Differential D29933 Diff 119619 llvm/trunk/lib/Target/RISCV/RISCVMCInstLower.cpp

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				//===-- RISCVMCInstLower.cpp - Convert RISCV MachineInstr to an MCInst ------=//
				//
				// The LLVM Compiler Infrastructure
				//
				// This file is distributed under the University of Illinois Open Source
				// License. See LICENSE.TXT for details.
				//
				//===----------------------------------------------------------------------===//
				//
				// This file contains code to lower RISCV MachineInstrs to their corresponding
				// MCInst records.
				//
				//===----------------------------------------------------------------------===//

				#include "RISCV.h"
				#include "llvm/CodeGen/MachineBasicBlock.h"
				#include "llvm/CodeGen/MachineInstr.h"
				#include "llvm/MC/MCAsmInfo.h"
				#include "llvm/MC/MCContext.h"
				#include "llvm/MC/MCExpr.h"
				#include "llvm/MC/MCInst.h"
				#include "llvm/Support/ErrorHandling.h"
				#include "llvm/Support/raw_ostream.h"

				using namespace llvm;

				void llvm::LowerRISCVMachineInstrToMCInst(const MachineInstr *MI,
				MCInst &OutMI) {
				OutMI.setOpcode(MI->getOpcode());

				for (const MachineOperand &MO : MI->operands()) {
				MCOperand MCOp;
				switch (MO.getType()) {
				default:
				report_fatal_error(
				"LowerRISCVMachineInstrToMCInst: unknown operand type");
				case MachineOperand::MO_Register:
				// Ignore all implicit register operands.
				if (MO.isImplicit())
				continue;
				MCOp = MCOperand::createReg(MO.getReg());
				break;
				case MachineOperand::MO_Immediate:
				MCOp = MCOperand::createImm(MO.getImm());
				break;
				}

				OutMI.addOperand(MCOp);
				}
				}