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Differential D35844 Diff 119589 test/CodeGen/X86/select-mmx.ll

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test/CodeGen/X86/select-mmx.ll

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; I32-NEXT: movl $0, {{[0-9]+}}(%esp) ; I32-NEXT: movl $0, {{[0-9]+}}(%esp)
; I32-NEXT: movq {{[0-9]+}}(%esp), %mm0 ; I32-NEXT: movq {{[0-9]+}}(%esp), %mm0
; I32-NEXT: psllw %mm0, %mm0 ; I32-NEXT: psllw %mm0, %mm0
; I32-NEXT: movq %mm0, (%esp) ; I32-NEXT: movq %mm0, (%esp)
; I32-NEXT: movl (%esp), %eax ; I32-NEXT: movl (%esp), %eax
; I32-NEXT: movl {{[0-9]+}}(%esp), %edx ; I32-NEXT: movl {{[0-9]+}}(%esp), %edx
; I32-NEXT: movl %ebp, %esp ; I32-NEXT: movl %ebp, %esp
; I32-NEXT: popl %ebp ; I32-NEXT: popl %ebp
; I32-NEXT: .Lcfi3:
; I32-NEXT: .cfi_def_cfa %esp, 4
; I32-NEXT: retl ; I32-NEXT: retl
%cond = icmp eq i64 %arg, 0 %cond = icmp eq i64 %arg, 0
%slct = select i1 %cond, x86_mmx bitcast (i64 7 to x86_mmx), x86_mmx bitcast (i64 0 to x86_mmx) %slct = select i1 %cond, x86_mmx bitcast (i64 7 to x86_mmx), x86_mmx bitcast (i64 0 to x86_mmx)
%psll = tail call x86_mmx @llvm.x86.mmx.psll.w(x86_mmx %slct, x86_mmx %slct) %psll = tail call x86_mmx @llvm.x86.mmx.psll.w(x86_mmx %slct, x86_mmx %slct)
%retc = bitcast x86_mmx %psll to i64 %retc = bitcast x86_mmx %psll to i64
ret i64 %retc ret i64 %retc
} }
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; X64-NEXT: movd %rsi, %mm0 ; X64-NEXT: movd %rsi, %mm0
; X64-NEXT: psllw %mm0, %mm0 ; X64-NEXT: psllw %mm0, %mm0
; X64-NEXT: movd %mm0, %rax ; X64-NEXT: movd %mm0, %rax
; X64-NEXT: retq ; X64-NEXT: retq
; ;
; I32-LABEL: test49: ; I32-LABEL: test49:
; I32: # BB#0: ; I32: # BB#0:
; I32-NEXT: pushl %ebp ; I32-NEXT: pushl %ebp
; I32-NEXT: .Lcfi3:
; I32-NEXT: .cfi_def_cfa_offset 8
; I32-NEXT: .Lcfi4: ; I32-NEXT: .Lcfi4:
; I32-NEXT: .cfi_def_cfa_offset 8
; I32-NEXT: .Lcfi5:
; I32-NEXT: .cfi_offset %ebp, -8 ; I32-NEXT: .cfi_offset %ebp, -8
; I32-NEXT: movl %esp, %ebp ; I32-NEXT: movl %esp, %ebp
; I32-NEXT: .Lcfi5: ; I32-NEXT: .Lcfi6:
; I32-NEXT: .cfi_def_cfa_register %ebp ; I32-NEXT: .cfi_def_cfa_register %ebp
; I32-NEXT: andl $-8, %esp ; I32-NEXT: andl $-8, %esp
; I32-NEXT: subl $8, %esp ; I32-NEXT: subl $8, %esp
; I32-NEXT: movl 8(%ebp), %eax ; I32-NEXT: movl 8(%ebp), %eax
; I32-NEXT: orl 12(%ebp), %eax ; I32-NEXT: orl 12(%ebp), %eax
; I32-NEXT: je .LBB1_1 ; I32-NEXT: je .LBB1_1
; I32-NEXT: # BB#2: ; I32-NEXT: # BB#2:
; I32-NEXT: leal 24(%ebp), %eax ; I32-NEXT: leal 24(%ebp), %eax
; I32-NEXT: jmp .LBB1_3 ; I32-NEXT: jmp .LBB1_3
; I32-NEXT: .LBB1_1: ; I32-NEXT: .LBB1_1:
; I32-NEXT: leal 16(%ebp), %eax ; I32-NEXT: leal 16(%ebp), %eax
; I32-NEXT: .LBB1_3: ; I32-NEXT: .LBB1_3:
; I32-NEXT: movq (%eax), %mm0 ; I32-NEXT: movq (%eax), %mm0
; I32-NEXT: psllw %mm0, %mm0 ; I32-NEXT: psllw %mm0, %mm0
; I32-NEXT: movq %mm0, (%esp) ; I32-NEXT: movq %mm0, (%esp)
; I32-NEXT: movl (%esp), %eax ; I32-NEXT: movl (%esp), %eax
; I32-NEXT: movl {{[0-9]+}}(%esp), %edx ; I32-NEXT: movl {{[0-9]+}}(%esp), %edx
; I32-NEXT: movl %ebp, %esp ; I32-NEXT: movl %ebp, %esp
; I32-NEXT: popl %ebp ; I32-NEXT: popl %ebp
; I32-NEXT: .Lcfi7:
; I32-NEXT: .cfi_def_cfa %esp, 4
; I32-NEXT: retl ; I32-NEXT: retl
%cond = icmp eq i64 %arg, 0 %cond = icmp eq i64 %arg, 0
%xmmx = bitcast i64 %x to x86_mmx %xmmx = bitcast i64 %x to x86_mmx
%ymmx = bitcast i64 %y to x86_mmx %ymmx = bitcast i64 %y to x86_mmx
%slct = select i1 %cond, x86_mmx %xmmx, x86_mmx %ymmx %slct = select i1 %cond, x86_mmx %xmmx, x86_mmx %ymmx
%psll = tail call x86_mmx @llvm.x86.mmx.psll.w(x86_mmx %slct, x86_mmx %slct) %psll = tail call x86_mmx @llvm.x86.mmx.psll.w(x86_mmx %slct, x86_mmx %slct)
%retc = bitcast x86_mmx %psll to i64 %retc = bitcast x86_mmx %psll to i64
ret i64 %retc ret i64 %retc
} }
declare x86_mmx @llvm.x86.mmx.psll.w(x86_mmx, x86_mmx) declare x86_mmx @llvm.x86.mmx.psll.w(x86_mmx, x86_mmx)