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Differential D36617 Diff 111898 test/CodeGen/X86/lea64-schedule.ll

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test/CodeGen/X86/lea64-schedule.ll

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; ;
; BTVER2-LABEL: test_lea_offset: ; BTVER2-LABEL: test_lea_offset:
; BTVER2: # BB#0: ; BTVER2: # BB#0:
; BTVER2-NEXT: leaq -24(%rdi), %rax # sched: [1:0.50] ; BTVER2-NEXT: leaq -24(%rdi), %rax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00] ; BTVER2-NEXT: retq # sched: [4:1.00]
; ;
; ZNVER1-LABEL: test_lea_offset: ; ZNVER1-LABEL: test_lea_offset:
; ZNVER1: # BB#0: ; ZNVER1: # BB#0:
; ZNVER1-NEXT: leaq -24(%rdi), %rax # sched: [1:0.25] ; ZNVER1-NEXT: leaq -24(%rdi), %rax # sched: [1:0.25]
; ZNVER1-NEXT: retq # sched: [5:0.50] ; ZNVER1-NEXT: retq # sched: [1:0.50]
%2 = add nsw i64 %0, -24 %2 = add nsw i64 %0, -24
ret i64 %2 ret i64 %2
} }
define i64 @test_lea_offset_big(i64) { define i64 @test_lea_offset_big(i64) {
; GENERIC-LABEL: test_lea_offset_big: ; GENERIC-LABEL: test_lea_offset_big:
; GENERIC: # BB#0: ; GENERIC: # BB#0:
; GENERIC-NEXT: leaq 1024(%rdi), %rax # sched: [1:0.50] ; GENERIC-NEXT: leaq 1024(%rdi), %rax # sched: [1:0.50]
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; HASWELL-NEXT: retq # sched: [1:1.00] ; HASWELL-NEXT: retq # sched: [1:1.00]
; ;
; BTVER2-LABEL: test_lea_offset_big: ; BTVER2-LABEL: test_lea_offset_big:
; BTVER2: # BB#0: ; BTVER2: # BB#0:
; BTVER2-NEXT: leaq 1024(%rdi), %rax # sched: [1:0.50] ; BTVER2-NEXT: leaq 1024(%rdi), %rax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00] ; BTVER2-NEXT: retq # sched: [4:1.00]
; ;
; ZNVER1-LABEL: test_lea_offset_big: ; ZNVER1-LABEL: test_lea_offset_big:
; ZNVER1: # BB#0: ; ZNVER1: # BB#0:
; ZNVER1-NEXT: leaq 1024(%rdi), %rax # sched: [1:0.25] ; ZNVER1-NEXT: leaq 1024(%rdi), %rax # sched: [1:0.25]
; ZNVER1-NEXT: retq # sched: [5:0.50] ; ZNVER1-NEXT: retq # sched: [1:0.50]
%2 = add nsw i64 %0, 1024 %2 = add nsw i64 %0, 1024
ret i64 %2 ret i64 %2
} }
; Function Attrs: norecurse nounwind readnone uwtable ; Function Attrs: norecurse nounwind readnone uwtable
define i64 @test_lea_add(i64, i64) { define i64 @test_lea_add(i64, i64) {
; GENERIC-LABEL: test_lea_add: ; GENERIC-LABEL: test_lea_add:
; GENERIC: # BB#0: ; GENERIC: # BB#0:
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; HASWELL-NEXT: leaq (%rdi,%rsi), %rax # sched: [1:0.50] ; HASWELL-NEXT: leaq (%rdi,%rsi), %rax # sched: [1:0.50]
; HASWELL-NEXT: retq # sched: [1:1.00] ; HASWELL-NEXT: retq # sched: [1:1.00]
; ;
; BTVER2-LABEL: test_lea_add: ; BTVER2-LABEL: test_lea_add:
; BTVER2: # BB#0: ; BTVER2: # BB#0:
; BTVER2-NEXT: leaq (%rdi,%rsi), %rax # sched: [1:0.50] ; BTVER2-NEXT: leaq (%rdi,%rsi), %rax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00] ; BTVER2-NEXT: retq # sched: [4:1.00]
; ;
; ZNVER1-LABEL: test_lea_add: ; ZNVER1-LABEL: test_lea_add:
; ZNVER1: # BB#0: ; ZNVER1: # BB#0:
; ZNVER1-NEXT: leaq (%rdi,%rsi), %rax # sched: [1:0.25] ; ZNVER1-NEXT: leaq (%rdi,%rsi), %rax # sched: [1:0.25]
; ZNVER1-NEXT: retq # sched: [5:0.50] ; ZNVER1-NEXT: retq # sched: [1:0.50]
%3 = add nsw i64 %1, %0 %3 = add nsw i64 %1, %0
ret i64 %3 ret i64 %3
} }
define i64 @test_lea_add_offset(i64, i64) { define i64 @test_lea_add_offset(i64, i64) {
; GENERIC-LABEL: test_lea_add_offset: ; GENERIC-LABEL: test_lea_add_offset:
; GENERIC: # BB#0: ; GENERIC: # BB#0:
; GENERIC-NEXT: leaq 16(%rdi,%rsi), %rax # sched: [1:0.50] ; GENERIC-NEXT: leaq 16(%rdi,%rsi), %rax # sched: [1:0.50]
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; HASWELL-NEXT: leaq (%rdi,%rsi), %rax # sched: [1:0.50] ; HASWELL-NEXT: leaq (%rdi,%rsi), %rax # sched: [1:0.50]
; HASWELL-NEXT: addq $16, %rax # sched: [1:0.25] ; HASWELL-NEXT: addq $16, %rax # sched: [1:0.25]
; HASWELL-NEXT: retq # sched: [1:1.00] ; HASWELL-NEXT: retq # sched: [1:1.00]
; ;
; BTVER2-LABEL: test_lea_add_offset: ; BTVER2-LABEL: test_lea_add_offset:
; BTVER2: # BB#0: ; BTVER2: # BB#0:
; BTVER2-NEXT: leaq 16(%rdi,%rsi), %rax # sched: [1:0.50] ; BTVER2-NEXT: leaq 16(%rdi,%rsi), %rax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00] ; BTVER2-NEXT: retq # sched: [4:1.00]
; ;
; ZNVER1-LABEL: test_lea_add_offset: ; ZNVER1-LABEL: test_lea_add_offset:
; ZNVER1: # BB#0: ; ZNVER1: # BB#0:
; ZNVER1-NEXT: leaq 16(%rdi,%rsi), %rax # sched: [1:0.25] ; ZNVER1-NEXT: leaq 16(%rdi,%rsi), %rax # sched: [1:0.25]
; ZNVER1-NEXT: retq # sched: [5:0.50] ; ZNVER1-NEXT: retq # sched: [1:0.50]
%3 = add i64 %0, 16 %3 = add i64 %0, 16
%4 = add i64 %3, %1 %4 = add i64 %3, %1
ret i64 %4 ret i64 %4
} }
define i64 @test_lea_add_offset_big(i64, i64) { define i64 @test_lea_add_offset_big(i64, i64) {
; GENERIC-LABEL: test_lea_add_offset_big: ; GENERIC-LABEL: test_lea_add_offset_big:
; GENERIC: # BB#0: ; GENERIC: # BB#0:
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; HASWELL-NEXT: leaq (%rdi,%rsi), %rax # sched: [1:0.50] ; HASWELL-NEXT: leaq (%rdi,%rsi), %rax # sched: [1:0.50]
; HASWELL-NEXT: addq $-4096, %rax # imm = 0xF000 ; HASWELL-NEXT: addq $-4096, %rax # imm = 0xF000
; HASWELL-NEXT: # sched: [1:0.25] ; HASWELL-NEXT: # sched: [1:0.25]
; HASWELL-NEXT: retq # sched: [1:1.00] ; HASWELL-NEXT: retq # sched: [1:1.00]
; ;
; BTVER2-LABEL: test_lea_add_offset_big: ; BTVER2-LABEL: test_lea_add_offset_big:
; BTVER2: # BB#0: ; BTVER2: # BB#0:
; BTVER2-NEXT: leaq -4096(%rdi,%rsi), %rax # sched: [1:0.50] ; BTVER2-NEXT: leaq -4096(%rdi,%rsi), %rax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00] ; BTVER2-NEXT: retq # sched: [4:1.00]
; ;
; ZNVER1-LABEL: test_lea_add_offset_big: ; ZNVER1-LABEL: test_lea_add_offset_big:
; ZNVER1: # BB#0: ; ZNVER1: # BB#0:
; ZNVER1-NEXT: leaq -4096(%rdi,%rsi), %rax # sched: [1:0.25] ; ZNVER1-NEXT: leaq -4096(%rdi,%rsi), %rax # sched: [1:0.25]
; ZNVER1-NEXT: retq # sched: [5:0.50] ; ZNVER1-NEXT: retq # sched: [1:0.50]
%3 = add i64 %0, -4096 %3 = add i64 %0, -4096
%4 = add i64 %3, %1 %4 = add i64 %3, %1
ret i64 %4 ret i64 %4
} }
define i64 @test_lea_mul(i64) { define i64 @test_lea_mul(i64) {
; GENERIC-LABEL: test_lea_mul: ; GENERIC-LABEL: test_lea_mul:
; GENERIC: # BB#0: ; GENERIC: # BB#0:
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; ;
; HASWELL-LABEL: test_lea_mul: ; HASWELL-LABEL: test_lea_mul:
; HASWELL: # BB#0: ; HASWELL: # BB#0:
; HASWELL-NEXT: leaq (%rdi,%rdi,2), %rax # sched: [1:0.50] ; HASWELL-NEXT: leaq (%rdi,%rdi,2), %rax # sched: [1:0.50]
; HASWELL-NEXT: retq # sched: [1:1.00] ; HASWELL-NEXT: retq # sched: [1:1.00]
; ;
; BTVER2-LABEL: test_lea_mul: ; BTVER2-LABEL: test_lea_mul:
; BTVER2: # BB#0: ; BTVER2: # BB#0:
; BTVER2-NEXT: leaq (%rdi,%rdi,2), %rax # sched: [1:0.50] ; BTVER2-NEXT: leaq (%rdi,%rdi,2), %rax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00] ; BTVER2-NEXT: retq # sched: [4:1.00]
; ;
; ZNVER1-LABEL: test_lea_mul: ; ZNVER1-LABEL: test_lea_mul:
; ZNVER1: # BB#0: ; ZNVER1: # BB#0:
; ZNVER1-NEXT: leaq (%rdi,%rdi,2), %rax # sched: [1:0.25] ; ZNVER1-NEXT: leaq (%rdi,%rdi,2), %rax # sched: [1:0.25]
; ZNVER1-NEXT: retq # sched: [5:0.50] ; ZNVER1-NEXT: retq # sched: [1:0.50]
%2 = mul nsw i64 %0, 3 %2 = mul nsw i64 %0, 3
ret i64 %2 ret i64 %2
} }
define i64 @test_lea_mul_offset(i64) { define i64 @test_lea_mul_offset(i64) {
; GENERIC-LABEL: test_lea_mul_offset: ; GENERIC-LABEL: test_lea_mul_offset:
; GENERIC: # BB#0: ; GENERIC: # BB#0:
; GENERIC-NEXT: leaq -32(%rdi,%rdi,2), %rax # sched: [1:0.50] ; GENERIC-NEXT: leaq -32(%rdi,%rdi,2), %rax # sched: [1:0.50]
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; ;
; HASWELL-LABEL: test_lea_mul_offset: ; HASWELL-LABEL: test_lea_mul_offset:
; HASWELL: # BB#0: ; HASWELL: # BB#0:
; HASWELL-NEXT: leaq (%rdi,%rdi,2), %rax # sched: [1:0.50] ; HASWELL-NEXT: leaq (%rdi,%rdi,2), %rax # sched: [1:0.50]
; HASWELL-NEXT: addq $-32, %rax # sched: [1:0.25] ; HASWELL-NEXT: addq $-32, %rax # sched: [1:0.25]
; HASWELL-NEXT: retq # sched: [1:1.00] ; HASWELL-NEXT: retq # sched: [1:1.00]
; ;
; BTVER2-LABEL: test_lea_mul_offset: ; BTVER2-LABEL: test_lea_mul_offset:
; BTVER2: # BB#0: ; BTVER2: # BB#0:
; BTVER2-NEXT: leaq -32(%rdi,%rdi,2), %rax # sched: [1:0.50] ; BTVER2-NEXT: leaq -32(%rdi,%rdi,2), %rax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00] ; BTVER2-NEXT: retq # sched: [4:1.00]
; ;
; ZNVER1-LABEL: test_lea_mul_offset: ; ZNVER1-LABEL: test_lea_mul_offset:
; ZNVER1: # BB#0: ; ZNVER1: # BB#0:
; ZNVER1-NEXT: leaq -32(%rdi,%rdi,2), %rax # sched: [1:0.25] ; ZNVER1-NEXT: leaq -32(%rdi,%rdi,2), %rax # sched: [1:0.25]
; ZNVER1-NEXT: retq # sched: [5:0.50] ; ZNVER1-NEXT: retq # sched: [1:0.50]
%2 = mul nsw i64 %0, 3 %2 = mul nsw i64 %0, 3
%3 = add nsw i64 %2, -32 %3 = add nsw i64 %2, -32
ret i64 %3 ret i64 %3
} }
define i64 @test_lea_mul_offset_big(i64) { define i64 @test_lea_mul_offset_big(i64) {
; GENERIC-LABEL: test_lea_mul_offset_big: ; GENERIC-LABEL: test_lea_mul_offset_big:
; GENERIC: # BB#0: ; GENERIC: # BB#0:
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; ;
; HASWELL-LABEL: test_lea_mul_offset_big: ; HASWELL-LABEL: test_lea_mul_offset_big:
; HASWELL: # BB#0: ; HASWELL: # BB#0:
; HASWELL-NEXT: leaq (%rdi,%rdi,8), %rax # sched: [1:0.50] ; HASWELL-NEXT: leaq (%rdi,%rdi,8), %rax # sched: [1:0.50]
; HASWELL-NEXT: addq $10000, %rax # imm = 0x2710 ; HASWELL-NEXT: addq $10000, %rax # imm = 0x2710
; HASWELL-NEXT: # sched: [1:0.25] ; HASWELL-NEXT: # sched: [1:0.25]
; HASWELL-NEXT: retq # sched: [1:1.00] ; HASWELL-NEXT: retq # sched: [1:1.00]
; ;
; BTVER2-LABEL: test_lea_mul_offset_big: ; BTVER2-LABEL: test_lea_mul_offset_big:
; BTVER2: # BB#0: ; BTVER2: # BB#0:
; BTVER2-NEXT: leaq 10000(%rdi,%rdi,8), %rax # sched: [1:0.50] ; BTVER2-NEXT: leaq 10000(%rdi,%rdi,8), %rax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00] ; BTVER2-NEXT: retq # sched: [4:1.00]
; ;
; ZNVER1-LABEL: test_lea_mul_offset_big: ; ZNVER1-LABEL: test_lea_mul_offset_big:
; ZNVER1: # BB#0: ; ZNVER1: # BB#0:
; ZNVER1-NEXT: leaq 10000(%rdi,%rdi,8), %rax # sched: [1:0.25] ; ZNVER1-NEXT: leaq 10000(%rdi,%rdi,8), %rax # sched: [1:0.25]
; ZNVER1-NEXT: retq # sched: [5:0.50] ; ZNVER1-NEXT: retq # sched: [1:0.50]
%2 = mul nsw i64 %0, 9 %2 = mul nsw i64 %0, 9
%3 = add nsw i64 %2, 10000 %3 = add nsw i64 %2, 10000
ret i64 %3 ret i64 %3
} }
define i64 @test_lea_add_scale(i64, i64) { define i64 @test_lea_add_scale(i64, i64) {
; GENERIC-LABEL: test_lea_add_scale: ; GENERIC-LABEL: test_lea_add_scale:
; GENERIC: # BB#0: ; GENERIC: # BB#0:
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; SANDY: # BB#0: ; SANDY: # BB#0:
; SANDY-NEXT: leaq (%rdi,%rsi,2), %rax # sched: [1:0.50] ; SANDY-NEXT: leaq (%rdi,%rsi,2), %rax # sched: [1:0.50]
; SANDY-NEXT: retq # sched: [1:1.00] ; SANDY-NEXT: retq # sched: [1:1.00]
; ;
; HASWELL-LABEL: test_lea_add_scale: ; HASWELL-LABEL: test_lea_add_scale:
; HASWELL: # BB#0: ; HASWELL: # BB#0:
; HASWELL-NEXT: leaq (%rdi,%rsi,2), %rax # sched: [1:0.50] ; HASWELL-NEXT: leaq (%rdi,%rsi,2), %rax # sched: [1:0.50]
; HASWELL-NEXT: retq # sched: [1:1.00] ; HASWELL-NEXT: retq # sched: [1:1.00]
; ;
; BTVER2-LABEL: test_lea_add_scale: ; BTVER2-LABEL: test_lea_add_scale:
; BTVER2: # BB#0: ; BTVER2: # BB#0:
; BTVER2-NEXT: leaq (%rdi,%rsi,2), %rax # sched: [1:0.50] ; BTVER2-NEXT: leaq (%rdi,%rsi,2), %rax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00] ; BTVER2-NEXT: retq # sched: [4:1.00]
; ;
; ZNVER1-LABEL: test_lea_add_scale: ; ZNVER1-LABEL: test_lea_add_scale:
; ZNVER1: # BB#0: ; ZNVER1: # BB#0:
; ZNVER1-NEXT: leaq (%rdi,%rsi,2), %rax # sched: [1:0.25] ; ZNVER1-NEXT: leaq (%rdi,%rsi,2), %rax # sched: [1:0.25]
; ZNVER1-NEXT: retq # sched: [5:0.50] ; ZNVER1-NEXT: retq # sched: [1:0.50]
%3 = shl i64 %1, 1 %3 = shl i64 %1, 1
%4 = add nsw i64 %3, %0 %4 = add nsw i64 %3, %0
ret i64 %4 ret i64 %4
} }
define i64 @test_lea_add_scale_offset(i64, i64) { define i64 @test_lea_add_scale_offset(i64, i64) {
; GENERIC-LABEL: test_lea_add_scale_offset: ; GENERIC-LABEL: test_lea_add_scale_offset:
; GENERIC: # BB#0: ; GENERIC: # BB#0:
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; SANDY-NEXT: leaq (%rdi,%rsi,4), %rax # sched: [1:0.50] ; SANDY-NEXT: leaq (%rdi,%rsi,4), %rax # sched: [1:0.50]
; SANDY-NEXT: addq $96, %rax # sched: [1:0.33] ; SANDY-NEXT: addq $96, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00] ; SANDY-NEXT: retq # sched: [1:1.00]
; ;
; HASWELL-LABEL: test_lea_add_scale_offset: ; HASWELL-LABEL: test_lea_add_scale_offset:
; HASWELL: # BB#0: ; HASWELL: # BB#0:
; HASWELL-NEXT: leaq (%rdi,%rsi,4), %rax # sched: [1:0.50] ; HASWELL-NEXT: leaq (%rdi,%rsi,4), %rax # sched: [1:0.50]
; HASWELL-NEXT: addq $96, %rax # sched: [1:0.25] ; HASWELL-NEXT: addq $96, %rax # sched: [1:0.25]
; HASWELL-NEXT: retq # sched: [1:1.00] ; HASWELL-NEXT: retq # sched: [1:1.00]
; ;
; BTVER2-LABEL: test_lea_add_scale_offset: ; BTVER2-LABEL: test_lea_add_scale_offset:
; BTVER2: # BB#0: ; BTVER2: # BB#0:
; BTVER2-NEXT: leaq 96(%rdi,%rsi,4), %rax # sched: [1:0.50] ; BTVER2-NEXT: leaq 96(%rdi,%rsi,4), %rax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00] ; BTVER2-NEXT: retq # sched: [4:1.00]
; ;
; ZNVER1-LABEL: test_lea_add_scale_offset: ; ZNVER1-LABEL: test_lea_add_scale_offset:
; ZNVER1: # BB#0: ; ZNVER1: # BB#0:
; ZNVER1-NEXT: leaq 96(%rdi,%rsi,4), %rax # sched: [1:0.25] ; ZNVER1-NEXT: leaq 96(%rdi,%rsi,4), %rax # sched: [1:0.25]
; ZNVER1-NEXT: retq # sched: [5:0.50] ; ZNVER1-NEXT: retq # sched: [1:0.50]
%3 = shl i64 %1, 2 %3 = shl i64 %1, 2
%4 = add i64 %0, 96 %4 = add i64 %0, 96
%5 = add i64 %4, %3 %5 = add i64 %4, %3
ret i64 %5 ret i64 %5
} }
define i64 @test_lea_add_scale_offset_big(i64, i64) { define i64 @test_lea_add_scale_offset_big(i64, i64) {
; GENERIC-LABEL: test_lea_add_scale_offset_big: ; GENERIC-LABEL: test_lea_add_scale_offset_big:
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; SANDY-NEXT: addq $-1200, %rax # imm = 0xFB50 ; SANDY-NEXT: addq $-1200, %rax # imm = 0xFB50
; SANDY-NEXT: # sched: [1:0.33] ; SANDY-NEXT: # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00] ; SANDY-NEXT: retq # sched: [1:1.00]
; ;
; HASWELL-LABEL: test_lea_add_scale_offset_big: ; HASWELL-LABEL: test_lea_add_scale_offset_big:
; HASWELL: # BB#0: ; HASWELL: # BB#0:
; HASWELL-NEXT: leaq (%rdi,%rsi,8), %rax # sched: [1:0.50] ; HASWELL-NEXT: leaq (%rdi,%rsi,8), %rax # sched: [1:0.50]
; HASWELL-NEXT: addq $-1200, %rax # imm = 0xFB50 ; HASWELL-NEXT: addq $-1200, %rax # imm = 0xFB50
; HASWELL-NEXT: # sched: [1:0.25] ; HASWELL-NEXT: # sched: [1:0.25]
; HASWELL-NEXT: retq # sched: [1:1.00] ; HASWELL-NEXT: retq # sched: [1:1.00]
; ;
; BTVER2-LABEL: test_lea_add_scale_offset_big: ; BTVER2-LABEL: test_lea_add_scale_offset_big:
; BTVER2: # BB#0: ; BTVER2: # BB#0:
; BTVER2-NEXT: leaq -1200(%rdi,%rsi,8), %rax # sched: [1:0.50] ; BTVER2-NEXT: leaq -1200(%rdi,%rsi,8), %rax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00] ; BTVER2-NEXT: retq # sched: [4:1.00]
; ;
; ZNVER1-LABEL: test_lea_add_scale_offset_big: ; ZNVER1-LABEL: test_lea_add_scale_offset_big:
; ZNVER1: # BB#0: ; ZNVER1: # BB#0:
; ZNVER1-NEXT: leaq -1200(%rdi,%rsi,8), %rax # sched: [1:0.25] ; ZNVER1-NEXT: leaq -1200(%rdi,%rsi,8), %rax # sched: [1:0.25]
; ZNVER1-NEXT: retq # sched: [5:0.50] ; ZNVER1-NEXT: retq # sched: [1:0.50]
%3 = shl i64 %1, 3 %3 = shl i64 %1, 3
%4 = add i64 %0, -1200 %4 = add i64 %0, -1200
%5 = add i64 %4, %3 %5 = add i64 %4, %3
ret i64 %5 ret i64 %5
} }