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Differential D36617 Diff 111898 test/CodeGen/X86/lea32-schedule.ll

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test/CodeGen/X86/lea32-schedule.ll

Show First 20 Lines • Show All 50 Lines • ▼ Show 20 Lines
; BTVER2: # BB#0: ; BTVER2: # BB#0:
; BTVER2-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def> ; BTVER2-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
; BTVER2-NEXT: leal -24(%rdi), %eax # sched: [1:0.50] ; BTVER2-NEXT: leal -24(%rdi), %eax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00] ; BTVER2-NEXT: retq # sched: [4:1.00]
; ;
; ZNVER1-LABEL: test_lea_offset: ; ZNVER1-LABEL: test_lea_offset:
; ZNVER1: # BB#0: ; ZNVER1: # BB#0:
; ZNVER1-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def> ; ZNVER1-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
; ZNVER1-NEXT: leal -24(%rdi), %eax # sched: [1:0.25] ; ZNVER1-NEXT: leal -24(%rdi), %eax # sched: [1:0.25]
; ZNVER1-NEXT: retq # sched: [5:0.50] ; ZNVER1-NEXT: retq # sched: [1:0.50]
%2 = add nsw i32 %0, -24 %2 = add nsw i32 %0, -24
ret i32 %2 ret i32 %2
} }
define i32 @test_lea_offset_big(i32) { define i32 @test_lea_offset_big(i32) {
; GENERIC-LABEL: test_lea_offset_big: ; GENERIC-LABEL: test_lea_offset_big:
; GENERIC: # BB#0: ; GENERIC: # BB#0:
; GENERIC-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def> ; GENERIC-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
Show All 33 Lines
; BTVER2-LABEL: test_lea_offset_big: ; BTVER2-LABEL: test_lea_offset_big:
; BTVER2: # BB#0: ; BTVER2: # BB#0:
; BTVER2-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def> ; BTVER2-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
; BTVER2-NEXT: leal 1024(%rdi), %eax # sched: [1:0.50] ; BTVER2-NEXT: leal 1024(%rdi), %eax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00] ; BTVER2-NEXT: retq # sched: [4:1.00]
; ;
; ZNVER1-LABEL: test_lea_offset_big: ; ZNVER1-LABEL: test_lea_offset_big:
; ZNVER1: # BB#0: ; ZNVER1: # BB#0:
; ZNVER1-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def> ; ZNVER1-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
; ZNVER1-NEXT: leal 1024(%rdi), %eax # sched: [1:0.25] ; ZNVER1-NEXT: leal 1024(%rdi), %eax # sched: [1:0.25]
; ZNVER1-NEXT: retq # sched: [5:0.50] ; ZNVER1-NEXT: retq # sched: [1:0.50]
%2 = add nsw i32 %0, 1024 %2 = add nsw i32 %0, 1024
ret i32 %2 ret i32 %2
} }
; Function Attrs: norecurse nounwind readnone uwtable ; Function Attrs: norecurse nounwind readnone uwtable
define i32 @test_lea_add(i32, i32) { define i32 @test_lea_add(i32, i32) {
; GENERIC-LABEL: test_lea_add: ; GENERIC-LABEL: test_lea_add:
; GENERIC: # BB#0: ; GENERIC: # BB#0:
Show All 40 Lines
; BTVER2: # BB#0: ; BTVER2: # BB#0:
; BTVER2-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def> ; BTVER2-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
; BTVER2-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def> ; BTVER2-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
; BTVER2-NEXT: leal (%rdi,%rsi), %eax # sched: [1:0.50] ; BTVER2-NEXT: leal (%rdi,%rsi), %eax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00] ; BTVER2-NEXT: retq # sched: [4:1.00]
; ;
; ZNVER1-LABEL: test_lea_add: ; ZNVER1-LABEL: test_lea_add:
; ZNVER1: # BB#0: ; ZNVER1: # BB#0:
; ZNVER1-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def> ; ZNVER1-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
; ZNVER1-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def> ; ZNVER1-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
; ZNVER1-NEXT: leal (%rdi,%rsi), %eax # sched: [1:0.25] ; ZNVER1-NEXT: leal (%rdi,%rsi), %eax # sched: [1:0.25]
; ZNVER1-NEXT: retq # sched: [5:0.50] ; ZNVER1-NEXT: retq # sched: [1:0.50]
%3 = add nsw i32 %1, %0 %3 = add nsw i32 %1, %0
ret i32 %3 ret i32 %3
} }
define i32 @test_lea_add_offset(i32, i32) { define i32 @test_lea_add_offset(i32, i32) {
; GENERIC-LABEL: test_lea_add_offset: ; GENERIC-LABEL: test_lea_add_offset:
; GENERIC: # BB#0: ; GENERIC: # BB#0:
; GENERIC-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def> ; GENERIC-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
Show All 40 Lines
; BTVER2-LABEL: test_lea_add_offset: ; BTVER2-LABEL: test_lea_add_offset:
; BTVER2: # BB#0: ; BTVER2: # BB#0:
; BTVER2-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def> ; BTVER2-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
; BTVER2-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def> ; BTVER2-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
; BTVER2-NEXT: leal 16(%rdi,%rsi), %eax # sched: [1:0.50] ; BTVER2-NEXT: leal 16(%rdi,%rsi), %eax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00] ; BTVER2-NEXT: retq # sched: [4:1.00]
; ;
; ZNVER1-LABEL: test_lea_add_offset: ; ZNVER1-LABEL: test_lea_add_offset:
; ZNVER1: # BB#0: ; ZNVER1: # BB#0:
; ZNVER1-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def> ; ZNVER1-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
; ZNVER1-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def> ; ZNVER1-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
; ZNVER1-NEXT: leal 16(%rdi,%rsi), %eax # sched: [1:0.25] ; ZNVER1-NEXT: leal 16(%rdi,%rsi), %eax # sched: [1:0.25]
; ZNVER1-NEXT: retq # sched: [5:0.50] ; ZNVER1-NEXT: retq # sched: [1:0.50]
%3 = add i32 %0, 16 %3 = add i32 %0, 16
%4 = add i32 %3, %1 %4 = add i32 %3, %1
ret i32 %4 ret i32 %4
} }
define i32 @test_lea_add_offset_big(i32, i32) { define i32 @test_lea_add_offset_big(i32, i32) {
; GENERIC-LABEL: test_lea_add_offset_big: ; GENERIC-LABEL: test_lea_add_offset_big:
; GENERIC: # BB#0: ; GENERIC: # BB#0:
▲ Show 20 Lines • Show All 42 Lines • ▼ Show 20 Lines
; ;
; BTVER2-LABEL: test_lea_add_offset_big: ; BTVER2-LABEL: test_lea_add_offset_big:
; BTVER2: # BB#0: ; BTVER2: # BB#0:
; BTVER2-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def> ; BTVER2-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
; BTVER2-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def> ; BTVER2-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
; BTVER2-NEXT: leal -4096(%rdi,%rsi), %eax # sched: [1:0.50] ; BTVER2-NEXT: leal -4096(%rdi,%rsi), %eax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00] ; BTVER2-NEXT: retq # sched: [4:1.00]
; ;
; ZNVER1-LABEL: test_lea_add_offset_big: ; ZNVER1-LABEL: test_lea_add_offset_big:
; ZNVER1: # BB#0: ; ZNVER1: # BB#0:
; ZNVER1-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def> ; ZNVER1-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
; ZNVER1-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def> ; ZNVER1-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
; ZNVER1-NEXT: leal -4096(%rdi,%rsi), %eax # sched: [1:0.25] ; ZNVER1-NEXT: leal -4096(%rdi,%rsi), %eax # sched: [1:0.25]
; ZNVER1-NEXT: retq # sched: [5:0.50] ; ZNVER1-NEXT: retq # sched: [1:0.50]
%3 = add i32 %0, -4096 %3 = add i32 %0, -4096
%4 = add i32 %3, %1 %4 = add i32 %3, %1
ret i32 %4 ret i32 %4
} }
define i32 @test_lea_mul(i32) { define i32 @test_lea_mul(i32) {
; GENERIC-LABEL: test_lea_mul: ; GENERIC-LABEL: test_lea_mul:
; GENERIC: # BB#0: ; GENERIC: # BB#0:
Show All 30 Lines
; HASWELL-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def> ; HASWELL-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
; HASWELL-NEXT: leal (%rdi,%rdi,2), %eax # sched: [1:0.50] ; HASWELL-NEXT: leal (%rdi,%rdi,2), %eax # sched: [1:0.50]
; HASWELL-NEXT: retq # sched: [1:1.00] ; HASWELL-NEXT: retq # sched: [1:1.00]
; ;
; BTVER2-LABEL: test_lea_mul: ; BTVER2-LABEL: test_lea_mul:
; BTVER2: # BB#0: ; BTVER2: # BB#0:
; BTVER2-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def> ; BTVER2-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
; BTVER2-NEXT: leal (%rdi,%rdi,2), %eax # sched: [1:0.50] ; BTVER2-NEXT: leal (%rdi,%rdi,2), %eax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00] ; BTVER2-NEXT: retq # sched: [4:1.00]
; ;
; ZNVER1-LABEL: test_lea_mul: ; ZNVER1-LABEL: test_lea_mul:
; ZNVER1: # BB#0: ; ZNVER1: # BB#0:
; ZNVER1-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def> ; ZNVER1-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
; ZNVER1-NEXT: leal (%rdi,%rdi,2), %eax # sched: [1:0.25] ; ZNVER1-NEXT: leal (%rdi,%rdi,2), %eax # sched: [1:0.25]
; ZNVER1-NEXT: retq # sched: [5:0.50] ; ZNVER1-NEXT: retq # sched: [1:0.50]
%2 = mul nsw i32 %0, 3 %2 = mul nsw i32 %0, 3
ret i32 %2 ret i32 %2
} }
define i32 @test_lea_mul_offset(i32) { define i32 @test_lea_mul_offset(i32) {
; GENERIC-LABEL: test_lea_mul_offset: ; GENERIC-LABEL: test_lea_mul_offset:
; GENERIC: # BB#0: ; GENERIC: # BB#0:
; GENERIC-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def> ; GENERIC-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
Show All 30 Lines
; HASWELL-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def> ; HASWELL-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
; HASWELL-NEXT: leal (%rdi,%rdi,2), %eax # sched: [1:0.50] ; HASWELL-NEXT: leal (%rdi,%rdi,2), %eax # sched: [1:0.50]
; HASWELL-NEXT: addl $-32, %eax # sched: [1:0.25] ; HASWELL-NEXT: addl $-32, %eax # sched: [1:0.25]
; HASWELL-NEXT: retq # sched: [1:1.00] ; HASWELL-NEXT: retq # sched: [1:1.00]
; ;
; BTVER2-LABEL: test_lea_mul_offset: ; BTVER2-LABEL: test_lea_mul_offset:
; BTVER2: # BB#0: ; BTVER2: # BB#0:
; BTVER2-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def> ; BTVER2-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
; BTVER2-NEXT: leal -32(%rdi,%rdi,2), %eax # sched: [1:0.50] ; BTVER2-NEXT: leal -32(%rdi,%rdi,2), %eax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00] ; BTVER2-NEXT: retq # sched: [4:1.00]
; ;
; ZNVER1-LABEL: test_lea_mul_offset: ; ZNVER1-LABEL: test_lea_mul_offset:
; ZNVER1: # BB#0: ; ZNVER1: # BB#0:
; ZNVER1-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def> ; ZNVER1-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
; ZNVER1-NEXT: leal -32(%rdi,%rdi,2), %eax # sched: [1:0.25] ; ZNVER1-NEXT: leal -32(%rdi,%rdi,2), %eax # sched: [1:0.25]
; ZNVER1-NEXT: retq # sched: [5:0.50] ; ZNVER1-NEXT: retq # sched: [1:0.50]
%2 = mul nsw i32 %0, 3 %2 = mul nsw i32 %0, 3
%3 = add nsw i32 %2, -32 %3 = add nsw i32 %2, -32
ret i32 %3 ret i32 %3
} }
define i32 @test_lea_mul_offset_big(i32) { define i32 @test_lea_mul_offset_big(i32) {
; GENERIC-LABEL: test_lea_mul_offset_big: ; GENERIC-LABEL: test_lea_mul_offset_big:
; GENERIC: # BB#0: ; GENERIC: # BB#0:
Show All 32 Lines
; HASWELL-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def> ; HASWELL-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
; HASWELL-NEXT: leal (%rdi,%rdi,8), %eax # sched: [1:0.50] ; HASWELL-NEXT: leal (%rdi,%rdi,8), %eax # sched: [1:0.50]
; HASWELL-NEXT: addl $10000, %eax # imm = 0x2710 ; HASWELL-NEXT: addl $10000, %eax # imm = 0x2710
; HASWELL-NEXT: # sched: [1:0.25] ; HASWELL-NEXT: # sched: [1:0.25]
; HASWELL-NEXT: retq # sched: [1:1.00] ; HASWELL-NEXT: retq # sched: [1:1.00]
; ;
; BTVER2-LABEL: test_lea_mul_offset_big: ; BTVER2-LABEL: test_lea_mul_offset_big:
; BTVER2: # BB#0: ; BTVER2: # BB#0:
; BTVER2-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def> ; BTVER2-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
; BTVER2-NEXT: leal 10000(%rdi,%rdi,8), %eax # sched: [1:0.50] ; BTVER2-NEXT: leal 10000(%rdi,%rdi,8), %eax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00] ; BTVER2-NEXT: retq # sched: [4:1.00]
; ;
; ZNVER1-LABEL: test_lea_mul_offset_big: ; ZNVER1-LABEL: test_lea_mul_offset_big:
; ZNVER1: # BB#0: ; ZNVER1: # BB#0:
; ZNVER1-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def> ; ZNVER1-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
; ZNVER1-NEXT: leal 10000(%rdi,%rdi,8), %eax # sched: [1:0.25] ; ZNVER1-NEXT: leal 10000(%rdi,%rdi,8), %eax # sched: [1:0.25]
; ZNVER1-NEXT: retq # sched: [5:0.50] ; ZNVER1-NEXT: retq # sched: [1:0.50]
%2 = mul nsw i32 %0, 9 %2 = mul nsw i32 %0, 9
%3 = add nsw i32 %2, 10000 %3 = add nsw i32 %2, 10000
ret i32 %3 ret i32 %3
} }
define i32 @test_lea_add_scale(i32, i32) { define i32 @test_lea_add_scale(i32, i32) {
; GENERIC-LABEL: test_lea_add_scale: ; GENERIC-LABEL: test_lea_add_scale:
; GENERIC: # BB#0: ; GENERIC: # BB#0:
Show All 34 Lines
; HASWELL-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def> ; HASWELL-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
; HASWELL-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def> ; HASWELL-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
; HASWELL-NEXT: leal (%rdi,%rsi,2), %eax # sched: [1:0.50] ; HASWELL-NEXT: leal (%rdi,%rsi,2), %eax # sched: [1:0.50]
; HASWELL-NEXT: retq # sched: [1:1.00] ; HASWELL-NEXT: retq # sched: [1:1.00]
; ;
; BTVER2-LABEL: test_lea_add_scale: ; BTVER2-LABEL: test_lea_add_scale:
; BTVER2: # BB#0: ; BTVER2: # BB#0:
; BTVER2-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def> ; BTVER2-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
; BTVER2-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def> ; BTVER2-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
; BTVER2-NEXT: leal (%rdi,%rsi,2), %eax # sched: [1:0.50] ; BTVER2-NEXT: leal (%rdi,%rsi,2), %eax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00] ; BTVER2-NEXT: retq # sched: [4:1.00]
; ;
; ZNVER1-LABEL: test_lea_add_scale: ; ZNVER1-LABEL: test_lea_add_scale:
; ZNVER1: # BB#0: ; ZNVER1: # BB#0:
; ZNVER1-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def> ; ZNVER1-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
; ZNVER1-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def> ; ZNVER1-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
; ZNVER1-NEXT: leal (%rdi,%rsi,2), %eax # sched: [1:0.25] ; ZNVER1-NEXT: leal (%rdi,%rsi,2), %eax # sched: [1:0.25]
; ZNVER1-NEXT: retq # sched: [5:0.50] ; ZNVER1-NEXT: retq # sched: [1:0.50]
%3 = shl i32 %1, 1 %3 = shl i32 %1, 1
%4 = add nsw i32 %3, %0 %4 = add nsw i32 %3, %0
ret i32 %4 ret i32 %4
} }
define i32 @test_lea_add_scale_offset(i32, i32) { define i32 @test_lea_add_scale_offset(i32, i32) {
; GENERIC-LABEL: test_lea_add_scale_offset: ; GENERIC-LABEL: test_lea_add_scale_offset:
; GENERIC: # BB#0: ; GENERIC: # BB#0:
Show All 35 Lines
; HASWELL-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def> ; HASWELL-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
; HASWELL-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def> ; HASWELL-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
; HASWELL-NEXT: leal (%rdi,%rsi,4), %eax # sched: [1:0.50] ; HASWELL-NEXT: leal (%rdi,%rsi,4), %eax # sched: [1:0.50]
; HASWELL-NEXT: addl $96, %eax # sched: [1:0.25] ; HASWELL-NEXT: addl $96, %eax # sched: [1:0.25]
; HASWELL-NEXT: retq # sched: [1:1.00] ; HASWELL-NEXT: retq # sched: [1:1.00]
; ;
; BTVER2-LABEL: test_lea_add_scale_offset: ; BTVER2-LABEL: test_lea_add_scale_offset:
; BTVER2: # BB#0: ; BTVER2: # BB#0:
; BTVER2-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def> ; BTVER2-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
; BTVER2-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def> ; BTVER2-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
; BTVER2-NEXT: leal 96(%rdi,%rsi,4), %eax # sched: [1:0.50] ; BTVER2-NEXT: leal 96(%rdi,%rsi,4), %eax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00] ; BTVER2-NEXT: retq # sched: [4:1.00]
; ;
; ZNVER1-LABEL: test_lea_add_scale_offset: ; ZNVER1-LABEL: test_lea_add_scale_offset:
; ZNVER1: # BB#0: ; ZNVER1: # BB#0:
; ZNVER1-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def> ; ZNVER1-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
; ZNVER1-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def> ; ZNVER1-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
; ZNVER1-NEXT: leal 96(%rdi,%rsi,4), %eax # sched: [1:0.25] ; ZNVER1-NEXT: leal 96(%rdi,%rsi,4), %eax # sched: [1:0.25]
; ZNVER1-NEXT: retq # sched: [5:0.50] ; ZNVER1-NEXT: retq # sched: [1:0.50]
%3 = shl i32 %1, 2 %3 = shl i32 %1, 2
%4 = add i32 %0, 96 %4 = add i32 %0, 96
%5 = add i32 %4, %3 %5 = add i32 %4, %3
ret i32 %5 ret i32 %5
} }
define i32 @test_lea_add_scale_offset_big(i32, i32) { define i32 @test_lea_add_scale_offset_big(i32, i32) {
; GENERIC-LABEL: test_lea_add_scale_offset_big: ; GENERIC-LABEL: test_lea_add_scale_offset_big:
Show All 37 Lines
; HASWELL-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def> ; HASWELL-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
; HASWELL-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def> ; HASWELL-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
; HASWELL-NEXT: leal (%rdi,%rsi,8), %eax # sched: [1:0.50] ; HASWELL-NEXT: leal (%rdi,%rsi,8), %eax # sched: [1:0.50]
; HASWELL-NEXT: addl $-1200, %eax # imm = 0xFB50 ; HASWELL-NEXT: addl $-1200, %eax # imm = 0xFB50
; HASWELL-NEXT: # sched: [1:0.25] ; HASWELL-NEXT: # sched: [1:0.25]
; HASWELL-NEXT: retq # sched: [1:1.00] ; HASWELL-NEXT: retq # sched: [1:1.00]
; ;
; BTVER2-LABEL: test_lea_add_scale_offset_big: ; BTVER2-LABEL: test_lea_add_scale_offset_big:
; BTVER2: # BB#0: ; BTVER2: # BB#0:
; BTVER2-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def> ; BTVER2-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
; BTVER2-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def> ; BTVER2-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
; BTVER2-NEXT: leal -1200(%rdi,%rsi,8), %eax # sched: [1:0.50] ; BTVER2-NEXT: leal -1200(%rdi,%rsi,8), %eax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00] ; BTVER2-NEXT: retq # sched: [4:1.00]
; ;
; ZNVER1-LABEL: test_lea_add_scale_offset_big: ; ZNVER1-LABEL: test_lea_add_scale_offset_big:
; ZNVER1: # BB#0: ; ZNVER1: # BB#0:
; ZNVER1-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def> ; ZNVER1-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
; ZNVER1-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def> ; ZNVER1-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
; ZNVER1-NEXT: leal -1200(%rdi,%rsi,8), %eax # sched: [1:0.25] ; ZNVER1-NEXT: leal -1200(%rdi,%rsi,8), %eax # sched: [1:0.25]
; ZNVER1-NEXT: retq # sched: [5:0.50] ; ZNVER1-NEXT: retq # sched: [1:0.50]
%3 = shl i32 %1, 3 %3 = shl i32 %1, 3
%4 = add i32 %0, -1200 %4 = add i32 %0, -1200
%5 = add i32 %4, %3 %5 = add i32 %4, %3
ret i32 %5 ret i32 %5
} }