Changeset View
Changeset View
Standalone View
Standalone View
test/CodeGenCXX/bitfield.cpp
| Show First 20 Lines • Show All 472 Lines • ▼ Show 20 Lines | void write(B2* s, unsigned x) { | ||||
| // CHECK-PPC64-LABEL: define void @_ZN2N75write | // CHECK-PPC64-LABEL: define void @_ZN2N75write | ||||
| // CHECK-PPC64: %[[gep:.*]] = getelementptr inbounds {{.*}}, {{.*}}* %{{.*}}, i32 0, i32 1 | // CHECK-PPC64: %[[gep:.*]] = getelementptr inbounds {{.*}}, {{.*}}* %{{.*}}, i32 0, i32 1 | ||||
| // CHECK-PPC64: %[[ptr:.*]] = bitcast [3 x i8]* %[[gep]] to i24* | // CHECK-PPC64: %[[ptr:.*]] = bitcast [3 x i8]* %[[gep]] to i24* | ||||
| // CHECK-PPC64: %[[new:.*]] = trunc i32 %{{.*}} to i24 | // CHECK-PPC64: %[[new:.*]] = trunc i32 %{{.*}} to i24 | ||||
| // CHECK-PPC64: store i24 %[[new]], i24* %[[ptr]] | // CHECK-PPC64: store i24 %[[new]], i24* %[[ptr]] | ||||
| s->b = x; | s->b = x; | ||||
| } | } | ||||
| } | } | ||||
| namespace N8 { | |||||
| // If a bitfield is at the beginning of a group of bitfields, has the width of legal integer type | |||||
| // and it is natually aligned, the bitfield will be accessed like a separate memory location. | |||||
| struct S { | |||||
| unsigned b1 : 16; | |||||
| unsigned b2 : 6; | |||||
| unsigned b3 : 2; | |||||
| unsigned b4 : 3; | |||||
| }; | |||||
| unsigned read00(S* s) { | |||||
| // CHECK-X86-64-LABEL: define i32 @_ZN2N86read00EPNS_1SE | |||||
| // CHECK-X86-64: %[[cast:.*]] = bitcast %{{.*}} to i16* | |||||
| // CHECK-X86-64: %[[val:.*]] = load i16, i16* %[[cast]] | |||||
| // CHECK-X86-64: %[[ext:.*]] = zext i16 %[[val]] to i32 | |||||
| // CHECK-X86-64: ret i32 %[[ext]] | |||||
| // CHECK-PPC64-LABEL: define zeroext i32 @_ZN2N86read00EPNS_1SE | |||||
| // CHECK-PPC64: %[[val:.*]] = load i32, i32* {{.*}} | |||||
| // CHECK-PPC64: %[[shr:.*]] = lshr i32 %[[val]], 16 | |||||
| // CHECK-PPC64: ret i32 %[[shr]] | |||||
| return s->b1; | |||||
| } | |||||
| void write00(S* s, unsigned x) { | |||||
| // CHECK-X86-64-LABEL: define void @_ZN2N87write00EPNS_1SEj | |||||
| // CHECK-X86-64: %[[load:.*]] = load i32, i32* %{{.*}} | |||||
| // CHECK-X86-64: %[[cast:.*]] = bitcast %{{.*}} to i16* | |||||
| // CHECK-X86-64: %[[new:.*]] = trunc i32 %[[load]] to i16 | |||||
| // CHECK-X86-64: store i16 %[[new]], i16* %[[cast]] | |||||
| // CHECK-PPC64-LABEL: define void @_ZN2N87write00EPNS_1SEj | |||||
| // CHECK-PPC64: %[[load1:.*]] = load i32, i32* {{.*}} | |||||
| // CHECK-PPC64: %[[load2:.*]] = load i32, i32* {{.*}} | |||||
| // CHECK-PPC64: %[[and1:.*]] = and i32 %[[load1]], 65535 | |||||
| // CHECK-PPC64: %[[shl:.*]] = shl i32 %[[and1]], 16 | |||||
| // CHECK-PPC64: %[[and2:.*]] = and i32 %[[load2]], 65535 | |||||
| // CHECK-PPC64: %[[or:.*]] = or i32 %[[and2]], %[[shl]] | |||||
| // CHECK-PPC64: store i32 %[[or]], i32* {{.*}} | |||||
| s->b1 = x; | |||||
| } | |||||
| } | |||||