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Differential D32776 Diff 110607 test/CodeGen/PowerPC/select-i1-vs-i1.ll

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test/CodeGen/PowerPC/select-i1-vs-i1.ll

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define ppc_fp128 @testppc_fp128eq(ppc_fp128 %c1, ppc_fp128 %c2, ppc_fp128 %c3, ppc_fp128 %c4, ppc_fp128 %a1, ppc_fp128 %a2) #0 { define ppc_fp128 @testppc_fp128eq(ppc_fp128 %c1, ppc_fp128 %c2, ppc_fp128 %c3, ppc_fp128 %c4, ppc_fp128 %a1, ppc_fp128 %a2) #0 {
entry: entry:
%cmp1 = fcmp oeq ppc_fp128 %c3, %c4 %cmp1 = fcmp oeq ppc_fp128 %c3, %c4
%cmp3tmp = fcmp oeq ppc_fp128 %c1, %c2 %cmp3tmp = fcmp oeq ppc_fp128 %c1, %c2
%cmp3 = icmp eq i1 %cmp3tmp, %cmp1 %cmp3 = icmp eq i1 %cmp3tmp, %cmp1
%cond = select i1 %cmp3, ppc_fp128 %a1, ppc_fp128 %a2 %cond = select i1 %cmp3, ppc_fp128 %a1, ppc_fp128 %a2
ret ppc_fp128 %cond ret ppc_fp128 %cond
; FIXME: Because of the way that the late SELECT_* pseudo-instruction expansion
; works, we end up with two blocks with the same predicate. These could be
; combined.
; CHECK-LABEL: @testppc_fp128eq ; CHECK-LABEL: @testppc_fp128eq
nemanjaiUnsubmitted
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I don't think this comment is necessary here. It should suffice to just remove the FIXME comment. The reason I say that is that the user will not know that we once had this duplicate block issue.

nemanjai: I don't think this comment is necessary here. It should suffice to just remove the FIXME…
leiAuthorUnsubmitted
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k.

lei: k.
; CHECK-DAG: fcmpu {{[0-9]+}}, 6, 8 ; CHECK-DAG: fcmpu {{[0-9]+}}, 6, 8
; CHECK-DAG: fcmpu {{[0-9]+}}, 5, 7 ; CHECK-DAG: fcmpu {{[0-9]+}}, 5, 7
; CHECK-DAG: fcmpu {{[0-9]+}}, 2, 4 ; CHECK-DAG: fcmpu {{[0-9]+}}, 2, 4
; CHECK-DAG: fcmpu {{[0-9]+}}, 1, 3 ; CHECK-DAG: fcmpu {{[0-9]+}}, 1, 3
; CHECK: crand [[REG1:[0-9]+]], {{[0-9]+}}, {{[0-9]+}} ; CHECK: crand [[REG1:[0-9]+]], {{[0-9]+}}, {{[0-9]+}}
; CHECK: crand [[REG2:[0-9]+]], {{[0-9]+}}, {{[0-9]+}} ; CHECK: crand [[REG2:[0-9]+]], {{[0-9]+}}, {{[0-9]+}}
; CHECK: crxor [[REG3:[0-9]+]], [[REG2]], [[REG1]] ; CHECK: crxor [[REG3:[0-9]+]], [[REG2]], [[REG1]]
; CHECK: bc 12, [[REG3]], .LBB[[BB1:[0-9_]+]] ; CHECK: bc 12, [[REG3]], .LBB[[BB1:[0-9_]+]]
; CHECK: fmr 11, 9 ; CHECK: fmr 11, 9
; CHECK: .LBB[[BB1]]:
; CHECK: bc 12, [[REG3]], .LBB[[BB2:[0-9_]+]]
; CHECK: fmr 12, 10 ; CHECK: fmr 12, 10
; CHECK: .LBB[[BB2]]: ; CHECK: .LBB[[BB1]]:
; CHECK-DAG: fmr 1, 11 ; CHECK-DAG: fmr 1, 11
; CHECK-DAG: fmr 2, 12 ; CHECK-DAG: fmr 2, 12
; CHECK: blr ; CHECK: blr
} }
define <2 x double> @testv2doubleslt(float %c1, float %c2, float %c3, float %c4, <2 x double> %a1, <2 x double> %a2) #0 { define <2 x double> @testv2doubleslt(float %c1, float %c2, float %c3, float %c4, <2 x double> %a1, <2 x double> %a2) #0 {
entry: entry:
%cmp1 = fcmp oeq float %c3, %c4 %cmp1 = fcmp oeq float %c3, %c4
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