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lib/Target/PowerPC/PPCTargetMachine.cpp
| Show All 34 Lines | |||||
| 35 | #include "llvm/Target/TargetOptions.h" | 35 | #include "llvm/Target/TargetOptions.h" | ||
| 36 | #include "llvm/Transforms/Scalar.h" | 36 | #include "llvm/Transforms/Scalar.h" | ||
| 37 | #include <cassert> | 37 | #include <cassert> | ||
| 38 | #include <memory> | 38 | #include <memory> | ||
| 39 | #include <string> | 39 | #include <string> | ||
| 40 | 40 | | |||
| 41 | using namespace llvm; | 41 | using namespace llvm; | ||
| 42 | 42 | | |||
| 43 | | ||||
| 44 | static cl::opt<bool> | ||||
| 45 | DisableBranchCoalescing("disable-ppc-branch-coalesce", cl::Hidden, | ||||
| 46 | cl::desc("disable coalescing of duplicate branches for PPC")); | ||||
| 43 | static cl:: | 47 | static cl:: | ||
| 44 | opt<bool> DisableCTRLoops("disable-ppc-ctrloops", cl::Hidden, | 48 | opt<bool> DisableCTRLoops("disable-ppc-ctrloops", cl::Hidden, | ||
| 45 | cl::desc("Disable CTR loops for PPC")); | 49 | cl::desc("Disable CTR loops for PPC")); | ||
| 46 | 50 | | |||
| 47 | static cl:: | 51 | static cl:: | ||
| 48 | opt<bool> DisablePreIncPrep("disable-ppc-preinc-prep", cl::Hidden, | 52 | opt<bool> DisablePreIncPrep("disable-ppc-preinc-prep", cl::Hidden, | ||
| 49 | cl::desc("Disable PPC loop preinc prep")); | 53 | cl::desc("Disable PPC loop preinc prep")); | ||
| 50 | 54 | | |||
| ▲ Show 20 Lines • Show All 322 Lines • ▼ Show 20 Line(s) | 376 | if (!DisableCTRLoops && getOptLevel() != CodeGenOpt::None) | |||
| 373 | addPass(createPPCCTRLoopsVerify()); | 377 | addPass(createPPCCTRLoopsVerify()); | ||
| 374 | #endif | 378 | #endif | ||
| 375 | 379 | | |||
| 376 | addPass(createPPCVSXCopyPass()); | 380 | addPass(createPPCVSXCopyPass()); | ||
| 377 | return false; | 381 | return false; | ||
| 378 | } | 382 | } | ||
| 379 | 383 | | |||
| 380 | void PPCPassConfig::addMachineSSAOptimization() { | 384 | void PPCPassConfig::addMachineSSAOptimization() { | ||
| 385 | // PPCBranchCoalescingPass need to be done before machine sinking | ||||
| 386 | // since it merges empty blocks. | ||||
| 387 | if (!DisableBranchCoalescing && getOptLevel() != CodeGenOpt::None) | ||||
| 388 | addPass(createPPCBranchCoalescingPass()); | ||||
| 381 | TargetPassConfig::addMachineSSAOptimization(); | 389 | TargetPassConfig::addMachineSSAOptimization(); | ||
| 382 | // For little endian, remove where possible the vector swap instructions | 390 | // For little endian, remove where possible the vector swap instructions | ||
| 383 | // introduced at code generation to normalize vector element order. | 391 | // introduced at code generation to normalize vector element order. | ||
| 384 | if (TM->getTargetTriple().getArch() == Triple::ppc64le && | 392 | if (TM->getTargetTriple().getArch() == Triple::ppc64le && | ||
| 385 | !DisableVSXSwapRemoval) | 393 | !DisableVSXSwapRemoval) | ||
| 386 | addPass(createPPCVSXSwapRemovalPass()); | 394 | addPass(createPPCVSXSwapRemovalPass()); | ||
| 387 | // Target-specific peephole cleanups performed after instruction | 395 | // Target-specific peephole cleanups performed after instruction | ||
| 388 | // selection. | 396 | // selection. | ||
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