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Differential D35844 Diff 108098 test/CodeGen/X86/load-combine.ll

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test/CodeGen/X86/load-combine.ll

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; CHECK-NEXT: orl %ecx, %esi ; CHECK-NEXT: orl %ecx, %esi
; CHECK-NEXT: movzbl 2(%eax), %ecx ; CHECK-NEXT: movzbl 2(%eax), %ecx
; CHECK-NEXT: shll $8, %ecx ; CHECK-NEXT: shll $8, %ecx
; CHECK-NEXT: orl %esi, %ecx ; CHECK-NEXT: orl %esi, %ecx
; CHECK-NEXT: movzbl 3(%eax), %eax ; CHECK-NEXT: movzbl 3(%eax), %eax
; CHECK-NEXT: orl %ecx, %eax ; CHECK-NEXT: orl %ecx, %eax
; CHECK-NEXT: orl %edx, %eax ; CHECK-NEXT: orl %edx, %eax
; CHECK-NEXT: popl %esi ; CHECK-NEXT: popl %esi
; CHECK-NEXT: .Lcfi2:
; CHECK-NEXT: .cfi_def_cfa_offset 4
; CHECK-NEXT: retl ; CHECK-NEXT: retl
; ;
; CHECK64-LABEL: load_i32_by_i8_bswap_uses: ; CHECK64-LABEL: load_i32_by_i8_bswap_uses:
; CHECK64: # BB#0: ; CHECK64: # BB#0:
; CHECK64-NEXT: movzbl (%rdi), %eax ; CHECK64-NEXT: movzbl (%rdi), %eax
; CHECK64-NEXT: shll $24, %eax ; CHECK64-NEXT: shll $24, %eax
; CHECK64-NEXT: movzbl 1(%rdi), %ecx ; CHECK64-NEXT: movzbl 1(%rdi), %ecx
; CHECK64-NEXT: movl %ecx, %edx ; CHECK64-NEXT: movl %ecx, %edx
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; res1 = ((i32) p[0] << 24) | ((i32) p[1] << 16) ; res1 = ((i32) p[0] << 24) | ((i32) p[1] << 16)
; *q = 0; ; *q = 0;
; res2 = ((i32) p[2] << 8) | (i32) p[3] ; res2 = ((i32) p[2] << 8) | (i32) p[3]
; res1 | res2 ; res1 | res2
define i32 @load_i32_by_i8_bswap_store_in_between(i32* %arg, i32* %arg1) { define i32 @load_i32_by_i8_bswap_store_in_between(i32* %arg, i32* %arg1) {
; CHECK-LABEL: load_i32_by_i8_bswap_store_in_between: ; CHECK-LABEL: load_i32_by_i8_bswap_store_in_between:
; CHECK: # BB#0: ; CHECK: # BB#0:
; CHECK-NEXT: pushl %esi ; CHECK-NEXT: pushl %esi
; CHECK-NEXT: .Lcfi2:
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: .Lcfi3: ; CHECK-NEXT: .Lcfi3:
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: .Lcfi4:
; CHECK-NEXT: .cfi_offset %esi, -8 ; CHECK-NEXT: .cfi_offset %esi, -8
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx ; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
; CHECK-NEXT: movzbl (%ecx), %edx ; CHECK-NEXT: movzbl (%ecx), %edx
; CHECK-NEXT: shll $24, %edx ; CHECK-NEXT: shll $24, %edx
; CHECK-NEXT: movzbl 1(%ecx), %esi ; CHECK-NEXT: movzbl 1(%ecx), %esi
; CHECK-NEXT: movl $0, (%eax) ; CHECK-NEXT: movl $0, (%eax)
; CHECK-NEXT: shll $16, %esi ; CHECK-NEXT: shll $16, %esi
; CHECK-NEXT: orl %edx, %esi ; CHECK-NEXT: orl %edx, %esi
; CHECK-NEXT: movzbl 2(%ecx), %edx ; CHECK-NEXT: movzbl 2(%ecx), %edx
; CHECK-NEXT: shll $8, %edx ; CHECK-NEXT: shll $8, %edx
; CHECK-NEXT: orl %esi, %edx ; CHECK-NEXT: orl %esi, %edx
; CHECK-NEXT: movzbl 3(%ecx), %eax ; CHECK-NEXT: movzbl 3(%ecx), %eax
; CHECK-NEXT: orl %edx, %eax ; CHECK-NEXT: orl %edx, %eax
; CHECK-NEXT: popl %esi ; CHECK-NEXT: popl %esi
; CHECK-NEXT: .Lcfi5:
; CHECK-NEXT: .cfi_def_cfa_offset 4
; CHECK-NEXT: retl ; CHECK-NEXT: retl
; ;
; CHECK64-LABEL: load_i32_by_i8_bswap_store_in_between: ; CHECK64-LABEL: load_i32_by_i8_bswap_store_in_between:
; CHECK64: # BB#0: ; CHECK64: # BB#0:
; CHECK64-NEXT: movzbl (%rdi), %eax ; CHECK64-NEXT: movzbl (%rdi), %eax
; CHECK64-NEXT: shll $24, %eax ; CHECK64-NEXT: shll $24, %eax
; CHECK64-NEXT: movzbl 1(%rdi), %ecx ; CHECK64-NEXT: movzbl 1(%rdi), %ecx
; CHECK64-NEXT: movl $0, (%rsi) ; CHECK64-NEXT: movl $0, (%rsi)
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