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Differential D35844 Diff 108098 test/CodeGen/X86/haddsub-2.ll

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test/CodeGen/X86/haddsub-2.ll

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; SSE3-NEXT: punpcklwd {{.*#+}} xmm6 = xmm6[0],xmm12[0],xmm6[1],xmm12[1],xmm6[2],xmm12[2],xmm6[3],xmm12[3] ; SSE3-NEXT: punpcklwd {{.*#+}} xmm6 = xmm6[0],xmm12[0],xmm6[1],xmm12[1],xmm6[2],xmm12[2],xmm6[3],xmm12[3]
; SSE3-NEXT: punpcklwd {{.*#+}} xmm5 = xmm5[0],xmm13[0],xmm5[1],xmm13[1],xmm5[2],xmm13[2],xmm5[3],xmm13[3] ; SSE3-NEXT: punpcklwd {{.*#+}} xmm5 = xmm5[0],xmm13[0],xmm5[1],xmm13[1],xmm5[2],xmm13[2],xmm5[3],xmm13[3]
; SSE3-NEXT: punpckldq {{.*#+}} xmm5 = xmm5[0],xmm6[0],xmm5[1],xmm6[1] ; SSE3-NEXT: punpckldq {{.*#+}} xmm5 = xmm5[0],xmm6[0],xmm5[1],xmm6[1]
; SSE3-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm14[0],xmm2[1],xmm14[1],xmm2[2],xmm14[2],xmm2[3],xmm14[3] ; SSE3-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm14[0],xmm2[1],xmm14[1],xmm2[2],xmm14[2],xmm2[3],xmm14[3]
; SSE3-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm15[0],xmm1[1],xmm15[1],xmm1[2],xmm15[2],xmm1[3],xmm15[3] ; SSE3-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm15[0],xmm1[1],xmm15[1],xmm1[2],xmm15[2],xmm1[3],xmm15[3]
; SSE3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] ; SSE3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
; SSE3-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm5[0] ; SSE3-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm5[0]
; SSE3-NEXT: popq %rbx ; SSE3-NEXT: popq %rbx
; SSE3-NEXT: .Lcfi12:
; SSE3-NEXT: .cfi_def_cfa_offset 48
; SSE3-NEXT: popq %r12 ; SSE3-NEXT: popq %r12
; SSE3-NEXT: .Lcfi13:
; SSE3-NEXT: .cfi_def_cfa_offset 40
; SSE3-NEXT: popq %r13 ; SSE3-NEXT: popq %r13
; SSE3-NEXT: .Lcfi14:
; SSE3-NEXT: .cfi_def_cfa_offset 32
; SSE3-NEXT: popq %r14 ; SSE3-NEXT: popq %r14
; SSE3-NEXT: .Lcfi15:
; SSE3-NEXT: .cfi_def_cfa_offset 24
; SSE3-NEXT: popq %r15 ; SSE3-NEXT: popq %r15
; SSE3-NEXT: .Lcfi16:
; SSE3-NEXT: .cfi_def_cfa_offset 16
; SSE3-NEXT: popq %rbp ; SSE3-NEXT: popq %rbp
; SSE3-NEXT: .Lcfi17:
; SSE3-NEXT: .cfi_def_cfa_offset 8
; SSE3-NEXT: retq ; SSE3-NEXT: retq
; ;
; SSSE3-LABEL: avx2_vphadd_w_test: ; SSSE3-LABEL: avx2_vphadd_w_test:
; SSSE3: # BB#0: ; SSSE3: # BB#0:
; SSSE3-NEXT: phaddw %xmm1, %xmm0 ; SSSE3-NEXT: phaddw %xmm1, %xmm0
; SSSE3-NEXT: phaddw %xmm3, %xmm2 ; SSSE3-NEXT: phaddw %xmm3, %xmm2
; SSSE3-NEXT: movdqa %xmm2, %xmm1 ; SSSE3-NEXT: movdqa %xmm2, %xmm1
; SSSE3-NEXT: retq ; SSSE3-NEXT: retq
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%vecinit29 = insertelement <8 x i32> %vecinit25, i32 %add28, i32 7 %vecinit29 = insertelement <8 x i32> %vecinit25, i32 %add28, i32 7
ret <8 x i32> %vecinit29 ret <8 x i32> %vecinit29
} }
define <16 x i16> @avx2_hadd_w(<16 x i16> %a, <16 x i16> %b) { define <16 x i16> @avx2_hadd_w(<16 x i16> %a, <16 x i16> %b) {
; SSE3-LABEL: avx2_hadd_w: ; SSE3-LABEL: avx2_hadd_w:
; SSE3: # BB#0: ; SSE3: # BB#0:
; SSE3-NEXT: pushq %rbp ; SSE3-NEXT: pushq %rbp
; SSE3-NEXT: .Lcfi12: ; SSE3-NEXT: .Lcfi18:
; SSE3-NEXT: .cfi_def_cfa_offset 16 ; SSE3-NEXT: .cfi_def_cfa_offset 16
; SSE3-NEXT: pushq %r15 ; SSE3-NEXT: pushq %r15
; SSE3-NEXT: .Lcfi13: ; SSE3-NEXT: .Lcfi19:
; SSE3-NEXT: .cfi_def_cfa_offset 24 ; SSE3-NEXT: .cfi_def_cfa_offset 24
; SSE3-NEXT: pushq %r14 ; SSE3-NEXT: pushq %r14
; SSE3-NEXT: .Lcfi14: ; SSE3-NEXT: .Lcfi20:
; SSE3-NEXT: .cfi_def_cfa_offset 32 ; SSE3-NEXT: .cfi_def_cfa_offset 32
; SSE3-NEXT: pushq %r13 ; SSE3-NEXT: pushq %r13
; SSE3-NEXT: .Lcfi15: ; SSE3-NEXT: .Lcfi21:
; SSE3-NEXT: .cfi_def_cfa_offset 40 ; SSE3-NEXT: .cfi_def_cfa_offset 40
; SSE3-NEXT: pushq %r12 ; SSE3-NEXT: pushq %r12
; SSE3-NEXT: .Lcfi16: ; SSE3-NEXT: .Lcfi22:
; SSE3-NEXT: .cfi_def_cfa_offset 48 ; SSE3-NEXT: .cfi_def_cfa_offset 48
; SSE3-NEXT: pushq %rbx ; SSE3-NEXT: pushq %rbx
; SSE3-NEXT: .Lcfi17: ; SSE3-NEXT: .Lcfi23:
; SSE3-NEXT: .cfi_def_cfa_offset 56 ; SSE3-NEXT: .cfi_def_cfa_offset 56
; SSE3-NEXT: .Lcfi18: ; SSE3-NEXT: .Lcfi24:
; SSE3-NEXT: .cfi_offset %rbx, -56 ; SSE3-NEXT: .cfi_offset %rbx, -56
; SSE3-NEXT: .Lcfi19: ; SSE3-NEXT: .Lcfi25:
; SSE3-NEXT: .cfi_offset %r12, -48 ; SSE3-NEXT: .cfi_offset %r12, -48
; SSE3-NEXT: .Lcfi20: ; SSE3-NEXT: .Lcfi26:
; SSE3-NEXT: .cfi_offset %r13, -40 ; SSE3-NEXT: .cfi_offset %r13, -40
; SSE3-NEXT: .Lcfi21: ; SSE3-NEXT: .Lcfi27:
; SSE3-NEXT: .cfi_offset %r14, -32 ; SSE3-NEXT: .cfi_offset %r14, -32
; SSE3-NEXT: .Lcfi22: ; SSE3-NEXT: .Lcfi28:
; SSE3-NEXT: .cfi_offset %r15, -24 ; SSE3-NEXT: .cfi_offset %r15, -24
; SSE3-NEXT: .Lcfi23: ; SSE3-NEXT: .Lcfi29:
; SSE3-NEXT: .cfi_offset %rbp, -16 ; SSE3-NEXT: .cfi_offset %rbp, -16
; SSE3-NEXT: movd %xmm0, %eax ; SSE3-NEXT: movd %xmm0, %eax
; SSE3-NEXT: pextrw $1, %xmm0, %r10d ; SSE3-NEXT: pextrw $1, %xmm0, %r10d
; SSE3-NEXT: addl %eax, %r10d ; SSE3-NEXT: addl %eax, %r10d
; SSE3-NEXT: pextrw $2, %xmm0, %eax ; SSE3-NEXT: pextrw $2, %xmm0, %eax
; SSE3-NEXT: pextrw $3, %xmm0, %r11d ; SSE3-NEXT: pextrw $3, %xmm0, %r11d
; SSE3-NEXT: addl %eax, %r11d ; SSE3-NEXT: addl %eax, %r11d
; SSE3-NEXT: pextrw $4, %xmm0, %eax ; SSE3-NEXT: pextrw $4, %xmm0, %eax
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; SSE3-NEXT: punpcklwd {{.*#+}} xmm6 = xmm6[0],xmm12[0],xmm6[1],xmm12[1],xmm6[2],xmm12[2],xmm6[3],xmm12[3] ; SSE3-NEXT: punpcklwd {{.*#+}} xmm6 = xmm6[0],xmm12[0],xmm6[1],xmm12[1],xmm6[2],xmm12[2],xmm6[3],xmm12[3]
; SSE3-NEXT: punpcklwd {{.*#+}} xmm5 = xmm5[0],xmm13[0],xmm5[1],xmm13[1],xmm5[2],xmm13[2],xmm5[3],xmm13[3] ; SSE3-NEXT: punpcklwd {{.*#+}} xmm5 = xmm5[0],xmm13[0],xmm5[1],xmm13[1],xmm5[2],xmm13[2],xmm5[3],xmm13[3]
; SSE3-NEXT: punpckldq {{.*#+}} xmm5 = xmm5[0],xmm6[0],xmm5[1],xmm6[1] ; SSE3-NEXT: punpckldq {{.*#+}} xmm5 = xmm5[0],xmm6[0],xmm5[1],xmm6[1]
; SSE3-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm14[0],xmm2[1],xmm14[1],xmm2[2],xmm14[2],xmm2[3],xmm14[3] ; SSE3-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm14[0],xmm2[1],xmm14[1],xmm2[2],xmm14[2],xmm2[3],xmm14[3]
; SSE3-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm15[0],xmm1[1],xmm15[1],xmm1[2],xmm15[2],xmm1[3],xmm15[3] ; SSE3-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm15[0],xmm1[1],xmm15[1],xmm1[2],xmm15[2],xmm1[3],xmm15[3]
; SSE3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] ; SSE3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
; SSE3-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm5[0] ; SSE3-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm5[0]
; SSE3-NEXT: popq %rbx ; SSE3-NEXT: popq %rbx
; SSE3-NEXT: .Lcfi30:
; SSE3-NEXT: .cfi_def_cfa_offset 48
; SSE3-NEXT: popq %r12 ; SSE3-NEXT: popq %r12
; SSE3-NEXT: .Lcfi31:
; SSE3-NEXT: .cfi_def_cfa_offset 40
; SSE3-NEXT: popq %r13 ; SSE3-NEXT: popq %r13
; SSE3-NEXT: .Lcfi32:
; SSE3-NEXT: .cfi_def_cfa_offset 32
; SSE3-NEXT: popq %r14 ; SSE3-NEXT: popq %r14
; SSE3-NEXT: .Lcfi33:
; SSE3-NEXT: .cfi_def_cfa_offset 24
; SSE3-NEXT: popq %r15 ; SSE3-NEXT: popq %r15
; SSE3-NEXT: .Lcfi34:
; SSE3-NEXT: .cfi_def_cfa_offset 16
; SSE3-NEXT: popq %rbp ; SSE3-NEXT: popq %rbp
; SSE3-NEXT: .Lcfi35:
; SSE3-NEXT: .cfi_def_cfa_offset 8
; SSE3-NEXT: retq ; SSE3-NEXT: retq
; ;
; SSSE3-LABEL: avx2_hadd_w: ; SSSE3-LABEL: avx2_hadd_w:
; SSSE3: # BB#0: ; SSSE3: # BB#0:
; SSSE3-NEXT: phaddw %xmm2, %xmm0 ; SSSE3-NEXT: phaddw %xmm2, %xmm0
; SSSE3-NEXT: phaddw %xmm3, %xmm1 ; SSSE3-NEXT: phaddw %xmm3, %xmm1
; SSSE3-NEXT: retq ; SSSE3-NEXT: retq
; ;
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