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include/llvm/Target/TargetLowering.h
Show First 20 Lines • Show All 47 Lines • ▼ Show 20 Lines | |||||
#include "llvm/IR/Instructions.h" | #include "llvm/IR/Instructions.h" | ||||
#include "llvm/IR/Type.h" | #include "llvm/IR/Type.h" | ||||
#include "llvm/MC/MCRegisterInfo.h" | #include "llvm/MC/MCRegisterInfo.h" | ||||
#include "llvm/Support/AtomicOrdering.h" | #include "llvm/Support/AtomicOrdering.h" | ||||
#include "llvm/Support/Casting.h" | #include "llvm/Support/Casting.h" | ||||
#include "llvm/Support/ErrorHandling.h" | #include "llvm/Support/ErrorHandling.h" | ||||
#include "llvm/Target/TargetCallingConv.h" | #include "llvm/Target/TargetCallingConv.h" | ||||
#include "llvm/Target/TargetMachine.h" | #include "llvm/Target/TargetMachine.h" | ||||
#include "llvm/CodeGen/LiveInterval.h" | |||||
#include <algorithm> | #include <algorithm> | ||||
#include <cassert> | #include <cassert> | ||||
#include <climits> | #include <climits> | ||||
#include <cstdint> | #include <cstdint> | ||||
#include <iterator> | #include <iterator> | ||||
#include <map> | #include <map> | ||||
#include <string> | #include <string> | ||||
#include <utility> | #include <utility> | ||||
▲ Show 20 Lines • Show All 3,329 Lines • ▼ Show 20 Lines | virtual void AdjustInstrPostInstrSelection(MachineInstr &MI, | ||||
SDNode *Node) const; | SDNode *Node) const; | ||||
/// If this function returns true, SelectionDAGBuilder emits a | /// If this function returns true, SelectionDAGBuilder emits a | ||||
/// LOAD_STACK_GUARD node when it is lowering Intrinsic::stackprotector. | /// LOAD_STACK_GUARD node when it is lowering Intrinsic::stackprotector. | ||||
virtual bool useLoadStackGuardNode() const { | virtual bool useLoadStackGuardNode() const { | ||||
return false; | return false; | ||||
} | } | ||||
/// The target can specify whether a callee-saved register should be used | |||||
/// rather than spliting the live range. Default behaviour is yes. | |||||
virtual bool useCSRInsteadOfSplit(const LiveInterval &LI) const { | |||||
return true; | |||||
} | |||||
qcolombet: I don't think we should expose. Either regalloc can always do the right call or it cannot and… | |||||
/// The number of splits in user blocks which could be allowed to be traded | |||||
/// for the spill of the CSR in the entry block when detering the first use | |||||
/// of CSR is prefered. | |||||
virtual unsigned getNumberOfTradableSplitsAgainstCSR() const { | |||||
return 0; | |||||
qcolombetUnsubmitted Not Done ReplyInline ActionsI don't think we can have a simple numbers as in static number of instructions. The cost of splitting depends where it happens and not taking that into account would for sure lead to cases where we get it wrong. qcolombet: I don't think we can have a simple numbers as in static number of instructions. The cost of… | |||||
junbumlAuthorUnsubmitted Not Done ReplyInline ActionsI rename this to getWeightFactorToTheFirstCSRAllocation(). junbuml: I rename this to getWeightFactorToTheFirstCSRAllocation().
IIUC, the cost of splitting… | |||||
} | |||||
/// The number of spills in user blocks which could be allowed to be traded | |||||
/// for the spill of the CSR in the entry block when detering the first use | |||||
/// of CSR is prefered. | |||||
virtual unsigned getNumberOfTradableSpillsAgainstCSR() const { | |||||
return 0; | |||||
qcolombetUnsubmitted Not Done ReplyInline ActionsDitto. qcolombet: Ditto. | |||||
} | |||||
/// Lower TLS global address SDNode for target independent emulated TLS model. | /// Lower TLS global address SDNode for target independent emulated TLS model. | ||||
virtual SDValue LowerToTLSEmulatedModel(const GlobalAddressSDNode *GA, | virtual SDValue LowerToTLSEmulatedModel(const GlobalAddressSDNode *GA, | ||||
SelectionDAG &DAG) const; | SelectionDAG &DAG) const; | ||||
// seteq(x, 0) -> truncate(srl(ctlz(zext(x)), log2(#bits))) | // seteq(x, 0) -> truncate(srl(ctlz(zext(x)), log2(#bits))) | ||||
// If we're comparing for equality to zero and isCtlzFast is true, expose the | // If we're comparing for equality to zero and isCtlzFast is true, expose the | ||||
// fact that this can be implemented as a ctlz/srl pair, so that the dag | // fact that this can be implemented as a ctlz/srl pair, so that the dag | ||||
// combiner can fold the new nodes. | // combiner can fold the new nodes. | ||||
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I don't think we should expose. Either regalloc can always do the right call or it cannot and we shouldn't ask the target to decide if it wants to be lucky here.