Differential D32247 Diff 98464 llvm/trunk/lib/Target/AArch64/AArch64TargetTransformInfo.cpp

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	unsigned AArch64TTIImpl::getMinPrefetchStride() {			unsigned AArch64TTIImpl::getMinPrefetchStride() {
	return ST->getMinPrefetchStride();			return ST->getMinPrefetchStride();
	}			}

	unsigned AArch64TTIImpl::getMaxPrefetchIterationsAhead() {			unsigned AArch64TTIImpl::getMaxPrefetchIterationsAhead() {
	return ST->getMaxPrefetchIterationsAhead();			return ST->getMaxPrefetchIterationsAhead();
	}			}

				bool AArch64TTIImpl::useReductionIntrinsic(unsigned Opcode, Type *Ty,
				TTI::ReductionFlags Flags) const {
				assert(isa<VectorType>(Ty) && "Expected Ty to be a vector type");
				switch (Opcode) {
				case Instruction::FAdd:
				case Instruction::FMul:
				case Instruction::And:
				case Instruction::Or:
				case Instruction::Xor:
				case Instruction::Mul:
				return false;
				case Instruction::Add:
				return Ty->getScalarSizeInBits() * Ty->getVectorNumElements() >= 128;
				case Instruction::ICmp:
				return Ty->getScalarSizeInBits() < 64;
				case Instruction::FCmp:
				return Flags.NoNaN;
				default:
				llvm_unreachable("Unhandled reduction opcode");
				}
				return false;
				}