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# lib/Target/PowerPC/PPCISelLowering.cpp

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Show First 20 Lines • Show All 1893 Lines • ▼ Show 20 Line(s) | 1892 | } else if (N.getOperand(1).getOpcode() == PPCISD::Lo) { | |||
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1894 | assert(!cast<ConstantSDNode>(N.getOperand(1).getOperand(1))->getZExtValue() | 1894 | assert(!cast<ConstantSDNode>(N.getOperand(1).getOperand(1))->getZExtValue() | ||

1895 | && "Cannot handle constant offsets yet!"); | 1895 | && "Cannot handle constant offsets yet!"); | ||

1896 | Disp = N.getOperand(1).getOperand(0); // The global address. | 1896 | Disp = N.getOperand(1).getOperand(0); // The global address. | ||

1897 | assert(Disp.getOpcode() == ISD::TargetGlobalAddress || | 1897 | assert(Disp.getOpcode() == ISD::TargetGlobalAddress || | ||

1898 | Disp.getOpcode() == ISD::TargetGlobalTLSAddress || | 1898 | Disp.getOpcode() == ISD::TargetGlobalTLSAddress || | ||

1899 | Disp.getOpcode() == ISD::TargetConstantPool || | 1899 | Disp.getOpcode() == ISD::TargetConstantPool || | ||

1900 | Disp.getOpcode() == ISD::TargetJumpTable); | 1900 | Disp.getOpcode() == ISD::TargetJumpTable); | ||

1901 | Base = N.getOperand(0); | 1901 | Base = N.getOperand(0); | ||

1902 | | ||||

1903 | // Apply EABI small data relocation if eligible | ||||

1904 | if (getTargetMachine().getTargetTriple().isEABI()) { | ||||

1905 | if (GlobalAddressSDNode *GSDN = | ||||

1906 | dyn_cast<GlobalAddressSDNode>(Disp.getNode())) { | ||||

1907 | const GlobalValue *GV = GSDN->getGlobal(); | ||||

1908 | if (const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV)) { | ||||

1909 | if (TargetLoweringObjectFile::isGlobalInSmallSection( | ||||

1910 | GVar, getTargetMachine())) { | ||||

1911 | // This register selection is only relevant for ASM printing. | ||||

1912 | // MO_SDA_LO will ensure encoded register is R0, and the linker | ||||

1913 | // selects the actual base register during relocation. | ||||

1914 | Base = DAG.getRegister(GVar->isConstant() ? PPC::R2 : PPC::R13, | ||||

1915 | MVT::i32); | ||||

1916 | Disp = DAG.getTargetGlobalAddress(GV, SDLoc(GSDN), | ||||

1917 | Disp.getValueType(), | ||||

1918 | GSDN->getOffset(), | ||||

1919 | PPCII::MO_SDA_LO); | ||||

1920 | } | ||||

1921 | } | ||||

1922 | } | ||||

1923 | } | ||||

1924 | | ||||

1902 | return true; // [&g+r] | 1925 | return true; // [&g+r] | ||

1903 | } | 1926 | } | ||

1904 | } else if (N.getOpcode() == ISD::OR) { | 1927 | } else if (N.getOpcode() == ISD::OR) { | ||

1905 | short imm = 0; | 1928 | short imm = 0; | ||

1906 | if (isIntS16Immediate(N.getOperand(1), imm) && | 1929 | if (isIntS16Immediate(N.getOperand(1), imm) && | ||

1907 | (!Aligned || (imm & 3) == 0)) { | 1930 | (!Aligned || (imm & 3) == 0)) { | ||

1908 | // If this is an or of disjoint bitfields, we can codegen this as an add | 1931 | // If this is an or of disjoint bitfields, we can codegen this as an add | ||

1909 | // (for better address arithmetic) if the LHS and RHS of the OR are | 1932 | // (for better address arithmetic) if the LHS and RHS of the OR are | ||

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