Please use GitHub pull requests for new patches. Avoid migrating existing patches. Phabricator shutdown timeline

Differential D145088 Diff 518072 clang/test/CodeGen/riscv-rvv-vls-arith-ops.c

Changeset View

Standalone View

clang/test/CodeGen/riscv-rvv-vls-arith-ops.c

This file was added.

				// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
				// RUN: %clang_cc1 -triple riscv64-none-linux-gnu -target-feature +zve64d \
				// RUN: -target-feature +f -target-feature +d -disable-O0-optnone \
				// RUN: -mvscale-min=4 -mvscale-max=4 -emit-llvm -o - %s \| \
				// RUN: opt -S -passes=sroa \| FileCheck %s

				// REQUIRES: riscv-registered-target

				#include <stdint.h>

				typedef __rvv_int8m1_t vint8m1_t;
				typedef __rvv_uint8m1_t vuint8m1_t;
				typedef __rvv_int16m1_t vint16m1_t;
				typedef __rvv_uint16m1_t vuint16m1_t;
				typedef __rvv_int32m1_t vint32m1_t;
				typedef __rvv_uint32m1_t vuint32m1_t;
				typedef __rvv_int64m1_t vint64m1_t;
				typedef __rvv_uint64m1_t vuint64m1_t;
				typedef __rvv_float32m1_t vfloat32m1_t;
				typedef __rvv_float64m1_t vfloat64m1_t;

				typedef vint8m1_t fixed_int8m1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));
				typedef vint16m1_t fixed_int16m1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));
				typedef vint32m1_t fixed_int32m1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));
				typedef vint64m1_t fixed_int64m1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));

				typedef vuint8m1_t fixed_uint8m1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));
				typedef vuint16m1_t fixed_uint16m1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));
				typedef vuint32m1_t fixed_uint32m1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));
				typedef vuint64m1_t fixed_uint64m1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));

				typedef vfloat32m1_t fixed_float32m1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));
				typedef vfloat64m1_t fixed_float64m1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));

				// ADDITION

				// CHECK-LABEL: @add_i8(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[ADD:%.*]] = add <32 x i8> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> undef, <32 x i8> [[ADD]], i64 0)
				// CHECK-NEXT: ret <vscale x 8 x i8> [[CASTSCALABLESVE]]
				//
				fixed_int8m1_t add_i8(fixed_int8m1_t a, fixed_int8m1_t b) {
				return a + b;
				}

				// CHECK-LABEL: @add_i16(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[ADD:%.*]] = add <16 x i16> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> undef, <16 x i16> [[ADD]], i64 0)
				// CHECK-NEXT: ret <vscale x 4 x i16> [[CASTSCALABLESVE]]
				//
				fixed_int16m1_t add_i16(fixed_int16m1_t a, fixed_int16m1_t b) {
				return a + b;
				}

				// CHECK-LABEL: @add_i32(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[ADD:%.*]] = add <8 x i32> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> undef, <8 x i32> [[ADD]], i64 0)
				// CHECK-NEXT: ret <vscale x 2 x i32> [[CASTSCALABLESVE]]
				//
				fixed_int32m1_t add_i32(fixed_int32m1_t a, fixed_int32m1_t b) {
				return a + b;
				}

				// CHECK-LABEL: @add_i64(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[ADD:%.*]] = add <4 x i64> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> undef, <4 x i64> [[ADD]], i64 0)
				// CHECK-NEXT: ret <vscale x 1 x i64> [[CASTSCALABLESVE]]
				//
				fixed_int64m1_t add_i64(fixed_int64m1_t a, fixed_int64m1_t b) {
				return a + b;
				}

				// CHECK-LABEL: @add_u8(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[ADD:%.*]] = add <32 x i8> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> undef, <32 x i8> [[ADD]], i64 0)
				// CHECK-NEXT: ret <vscale x 8 x i8> [[CASTSCALABLESVE]]
				//
				fixed_uint8m1_t add_u8(fixed_uint8m1_t a, fixed_uint8m1_t b) {
				return a + b;
				}

				// CHECK-LABEL: @add_u16(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[ADD:%.*]] = add <16 x i16> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> undef, <16 x i16> [[ADD]], i64 0)
				// CHECK-NEXT: ret <vscale x 4 x i16> [[CASTSCALABLESVE]]
				//
				fixed_uint16m1_t add_u16(fixed_uint16m1_t a, fixed_uint16m1_t b) {
				return a + b;
				}

				// CHECK-LABEL: @add_u32(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[ADD:%.*]] = add <8 x i32> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> undef, <8 x i32> [[ADD]], i64 0)
				// CHECK-NEXT: ret <vscale x 2 x i32> [[CASTSCALABLESVE]]
				//
				fixed_uint32m1_t add_u32(fixed_uint32m1_t a, fixed_uint32m1_t b) {
				return a + b;
				}

				// CHECK-LABEL: @add_u64(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[ADD:%.*]] = add <4 x i64> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> undef, <4 x i64> [[ADD]], i64 0)
				// CHECK-NEXT: ret <vscale x 1 x i64> [[CASTSCALABLESVE]]
				//
				fixed_uint64m1_t add_u64(fixed_uint64m1_t a, fixed_uint64m1_t b) {
				return a + b;
				}

				// CHECK-LABEL: @add_f32(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <8 x float> @llvm.vector.extract.v8f32.nxv2f32(<vscale x 2 x float> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <8 x float> @llvm.vector.extract.v8f32.nxv2f32(<vscale x 2 x float> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[ADD:%.*]] = fadd <8 x float> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 2 x float> @llvm.vector.insert.nxv2f32.v8f32(<vscale x 2 x float> undef, <8 x float> [[ADD]], i64 0)
				// CHECK-NEXT: ret <vscale x 2 x float> [[CASTSCALABLESVE]]
				//
				fixed_float32m1_t add_f32(fixed_float32m1_t a, fixed_float32m1_t b) {
				return a + b;
				}

				// CHECK-LABEL: @add_f64(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <4 x double> @llvm.vector.extract.v4f64.nxv1f64(<vscale x 1 x double> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <4 x double> @llvm.vector.extract.v4f64.nxv1f64(<vscale x 1 x double> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[ADD:%.*]] = fadd <4 x double> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 1 x double> @llvm.vector.insert.nxv1f64.v4f64(<vscale x 1 x double> undef, <4 x double> [[ADD]], i64 0)
				// CHECK-NEXT: ret <vscale x 1 x double> [[CASTSCALABLESVE]]
				//
				fixed_float64m1_t add_f64(fixed_float64m1_t a, fixed_float64m1_t b) {
				return a + b;
				}

				// CHECK-LABEL: @add_inplace_i8(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[ADD:%.*]] = add <32 x i8> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> undef, <32 x i8> [[ADD]], i64 0)
				// CHECK-NEXT: ret <vscale x 8 x i8> [[CASTSCALABLESVE]]
				//
				fixed_int8m1_t add_inplace_i8(fixed_int8m1_t a, fixed_int8m1_t b) {
				return a += b;
				}

				// CHECK-LABEL: @add_inplace_i16(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[ADD:%.*]] = add <16 x i16> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> undef, <16 x i16> [[ADD]], i64 0)
				// CHECK-NEXT: ret <vscale x 4 x i16> [[CASTSCALABLESVE]]
				//
				fixed_int16m1_t add_inplace_i16(fixed_int16m1_t a, fixed_int16m1_t b) {
				return a += b;
				}

				// CHECK-LABEL: @add_inplace_i32(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[ADD:%.*]] = add <8 x i32> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> undef, <8 x i32> [[ADD]], i64 0)
				// CHECK-NEXT: ret <vscale x 2 x i32> [[CASTSCALABLESVE]]
				//
				fixed_int32m1_t add_inplace_i32(fixed_int32m1_t a, fixed_int32m1_t b) {
				return a += b;
				}

				// CHECK-LABEL: @add_inplace_i64(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[ADD:%.*]] = add <4 x i64> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> undef, <4 x i64> [[ADD]], i64 0)
				// CHECK-NEXT: ret <vscale x 1 x i64> [[CASTSCALABLESVE]]
				//
				fixed_int64m1_t add_inplace_i64(fixed_int64m1_t a, fixed_int64m1_t b) {
				return a += b;
				}

				// CHECK-LABEL: @add_inplace_u8(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[ADD:%.*]] = add <32 x i8> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> undef, <32 x i8> [[ADD]], i64 0)
				// CHECK-NEXT: ret <vscale x 8 x i8> [[CASTSCALABLESVE]]
				//
				fixed_uint8m1_t add_inplace_u8(fixed_uint8m1_t a, fixed_uint8m1_t b) {
				return a += b;
				}

				// CHECK-LABEL: @add_inplace_u16(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[ADD:%.*]] = add <16 x i16> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> undef, <16 x i16> [[ADD]], i64 0)
				// CHECK-NEXT: ret <vscale x 4 x i16> [[CASTSCALABLESVE]]
				//
				fixed_uint16m1_t add_inplace_u16(fixed_uint16m1_t a, fixed_uint16m1_t b) {
				return a += b;
				}

				// CHECK-LABEL: @add_inplace_u32(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[ADD:%.*]] = add <8 x i32> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> undef, <8 x i32> [[ADD]], i64 0)
				// CHECK-NEXT: ret <vscale x 2 x i32> [[CASTSCALABLESVE]]
				//
				fixed_uint32m1_t add_inplace_u32(fixed_uint32m1_t a, fixed_uint32m1_t b) {
				return a += b;
				}

				// CHECK-LABEL: @add_inplace_u64(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[ADD:%.*]] = add <4 x i64> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> undef, <4 x i64> [[ADD]], i64 0)
				// CHECK-NEXT: ret <vscale x 1 x i64> [[CASTSCALABLESVE]]
				//
				fixed_uint64m1_t add_inplace_u64(fixed_uint64m1_t a, fixed_uint64m1_t b) {
				return a += b;
				}

				// CHECK-LABEL: @add_inplace_f32(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <8 x float> @llvm.vector.extract.v8f32.nxv2f32(<vscale x 2 x float> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <8 x float> @llvm.vector.extract.v8f32.nxv2f32(<vscale x 2 x float> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[ADD:%.*]] = fadd <8 x float> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 2 x float> @llvm.vector.insert.nxv2f32.v8f32(<vscale x 2 x float> undef, <8 x float> [[ADD]], i64 0)
				// CHECK-NEXT: ret <vscale x 2 x float> [[CASTSCALABLESVE]]
				//
				fixed_float32m1_t add_inplace_f32(fixed_float32m1_t a, fixed_float32m1_t b) {
				return a += b;
				}

				// CHECK-LABEL: @add_inplace_f64(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <4 x double> @llvm.vector.extract.v4f64.nxv1f64(<vscale x 1 x double> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <4 x double> @llvm.vector.extract.v4f64.nxv1f64(<vscale x 1 x double> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[ADD:%.*]] = fadd <4 x double> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 1 x double> @llvm.vector.insert.nxv1f64.v4f64(<vscale x 1 x double> undef, <4 x double> [[ADD]], i64 0)
				// CHECK-NEXT: ret <vscale x 1 x double> [[CASTSCALABLESVE]]
				//
				fixed_float64m1_t add_inplace_f64(fixed_float64m1_t a, fixed_float64m1_t b) {
				return a += b;
				}

				// CHECK-LABEL: @add_scalar_i8(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.]] = insertelement <32 x i8> poison, i8 [[B:%.]], i64 0
				// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <32 x i8> [[SPLAT_SPLATINSERT]], <32 x i8> poison, <32 x i32> zeroinitializer
				// CHECK-NEXT: [[ADD:%.*]] = add <32 x i8> [[A]], [[SPLAT_SPLAT]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> undef, <32 x i8> [[ADD]], i64 0)
				// CHECK-NEXT: ret <vscale x 8 x i8> [[CASTSCALABLESVE]]
				//
				fixed_int8m1_t add_scalar_i8(fixed_int8m1_t a, int8_t b) {
				return a + b;
				}

				// CHECK-LABEL: @add_scalar_i16(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.]] = insertelement <16 x i16> poison, i16 [[B:%.]], i64 0
				// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <16 x i16> [[SPLAT_SPLATINSERT]], <16 x i16> poison, <16 x i32> zeroinitializer
				// CHECK-NEXT: [[ADD:%.*]] = add <16 x i16> [[A]], [[SPLAT_SPLAT]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> undef, <16 x i16> [[ADD]], i64 0)
				// CHECK-NEXT: ret <vscale x 4 x i16> [[CASTSCALABLESVE]]
				//
				fixed_int16m1_t add_scalar_i16(fixed_int16m1_t a, int16_t b) {
				return a + b;
				}

				// CHECK-LABEL: @add_scalar_i32(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.]] = insertelement <8 x i32> poison, i32 [[B:%.]], i64 0
				// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <8 x i32> [[SPLAT_SPLATINSERT]], <8 x i32> poison, <8 x i32> zeroinitializer
				// CHECK-NEXT: [[ADD:%.*]] = add <8 x i32> [[A]], [[SPLAT_SPLAT]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> undef, <8 x i32> [[ADD]], i64 0)
				// CHECK-NEXT: ret <vscale x 2 x i32> [[CASTSCALABLESVE]]
				//
				fixed_int32m1_t add_scalar_i32(fixed_int32m1_t a, int32_t b) {
				return a + b;
				}

				// CHECK-LABEL: @add_scalar_i64(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.]] = insertelement <4 x i64> poison, i64 [[B:%.]], i64 0
				// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <4 x i64> [[SPLAT_SPLATINSERT]], <4 x i64> poison, <4 x i32> zeroinitializer
				// CHECK-NEXT: [[ADD:%.*]] = add <4 x i64> [[A]], [[SPLAT_SPLAT]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> undef, <4 x i64> [[ADD]], i64 0)
				// CHECK-NEXT: ret <vscale x 1 x i64> [[CASTSCALABLESVE]]
				//
				fixed_int64m1_t add_scalar_i64(fixed_int64m1_t a, int64_t b) {
				return a + b;
				}

				// CHECK-LABEL: @add_scalar_u8(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.]] = insertelement <32 x i8> poison, i8 [[B:%.]], i64 0
				// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <32 x i8> [[SPLAT_SPLATINSERT]], <32 x i8> poison, <32 x i32> zeroinitializer
				// CHECK-NEXT: [[ADD:%.*]] = add <32 x i8> [[A]], [[SPLAT_SPLAT]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> undef, <32 x i8> [[ADD]], i64 0)
				// CHECK-NEXT: ret <vscale x 8 x i8> [[CASTSCALABLESVE]]
				//
				fixed_uint8m1_t add_scalar_u8(fixed_uint8m1_t a, uint8_t b) {
				return a + b;
				}

				// CHECK-LABEL: @add_scalar_u16(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.]] = insertelement <16 x i16> poison, i16 [[B:%.]], i64 0
				// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <16 x i16> [[SPLAT_SPLATINSERT]], <16 x i16> poison, <16 x i32> zeroinitializer
				// CHECK-NEXT: [[ADD:%.*]] = add <16 x i16> [[A]], [[SPLAT_SPLAT]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> undef, <16 x i16> [[ADD]], i64 0)
				// CHECK-NEXT: ret <vscale x 4 x i16> [[CASTSCALABLESVE]]
				//
				fixed_uint16m1_t add_scalar_u16(fixed_uint16m1_t a, uint16_t b) {
				return a + b;
				}

				// CHECK-LABEL: @add_scalar_u32(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.]] = insertelement <8 x i32> poison, i32 [[B:%.]], i64 0
				// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <8 x i32> [[SPLAT_SPLATINSERT]], <8 x i32> poison, <8 x i32> zeroinitializer
				// CHECK-NEXT: [[ADD:%.*]] = add <8 x i32> [[A]], [[SPLAT_SPLAT]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> undef, <8 x i32> [[ADD]], i64 0)
				// CHECK-NEXT: ret <vscale x 2 x i32> [[CASTSCALABLESVE]]
				//
				fixed_uint32m1_t add_scalar_u32(fixed_uint32m1_t a, uint32_t b) {
				return a + b;
				}

				// CHECK-LABEL: @add_scalar_u64(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.]] = insertelement <4 x i64> poison, i64 [[B:%.]], i64 0
				// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <4 x i64> [[SPLAT_SPLATINSERT]], <4 x i64> poison, <4 x i32> zeroinitializer
				// CHECK-NEXT: [[ADD:%.*]] = add <4 x i64> [[A]], [[SPLAT_SPLAT]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> undef, <4 x i64> [[ADD]], i64 0)
				// CHECK-NEXT: ret <vscale x 1 x i64> [[CASTSCALABLESVE]]
				//
				fixed_uint64m1_t add_scalar_u64(fixed_uint64m1_t a, uint64_t b) {
				return a + b;
				}

				// CHECK-LABEL: @add_scalar_f32(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <8 x float> @llvm.vector.extract.v8f32.nxv2f32(<vscale x 2 x float> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.]] = insertelement <8 x float> poison, float [[B:%.]], i64 0
				// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <8 x float> [[SPLAT_SPLATINSERT]], <8 x float> poison, <8 x i32> zeroinitializer
				// CHECK-NEXT: [[ADD:%.*]] = fadd <8 x float> [[A]], [[SPLAT_SPLAT]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 2 x float> @llvm.vector.insert.nxv2f32.v8f32(<vscale x 2 x float> undef, <8 x float> [[ADD]], i64 0)
				// CHECK-NEXT: ret <vscale x 2 x float> [[CASTSCALABLESVE]]
				//
				fixed_float32m1_t add_scalar_f32(fixed_float32m1_t a, float b) {
				return a + b;
				}

				// CHECK-LABEL: @add_scalar_f64(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <4 x double> @llvm.vector.extract.v4f64.nxv1f64(<vscale x 1 x double> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.]] = insertelement <4 x double> poison, double [[B:%.]], i64 0
				// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <4 x double> [[SPLAT_SPLATINSERT]], <4 x double> poison, <4 x i32> zeroinitializer
				// CHECK-NEXT: [[ADD:%.*]] = fadd <4 x double> [[A]], [[SPLAT_SPLAT]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 1 x double> @llvm.vector.insert.nxv1f64.v4f64(<vscale x 1 x double> undef, <4 x double> [[ADD]], i64 0)
				// CHECK-NEXT: ret <vscale x 1 x double> [[CASTSCALABLESVE]]
				//
				fixed_float64m1_t add_scalar_f64(fixed_float64m1_t a, double b) {
				return a + b;
				}

				// SUBTRACTION

				// CHECK-LABEL: @sub_i8(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SUB:%.*]] = sub <32 x i8> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> undef, <32 x i8> [[SUB]], i64 0)
				// CHECK-NEXT: ret <vscale x 8 x i8> [[CASTSCALABLESVE]]
				//
				fixed_int8m1_t sub_i8(fixed_int8m1_t a, fixed_int8m1_t b) {
				return a - b;
				}

				// CHECK-LABEL: @sub_i16(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SUB:%.*]] = sub <16 x i16> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> undef, <16 x i16> [[SUB]], i64 0)
				// CHECK-NEXT: ret <vscale x 4 x i16> [[CASTSCALABLESVE]]
				//
				fixed_int16m1_t sub_i16(fixed_int16m1_t a, fixed_int16m1_t b) {
				return a - b;
				}

				// CHECK-LABEL: @sub_i32(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SUB:%.*]] = sub <8 x i32> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> undef, <8 x i32> [[SUB]], i64 0)
				// CHECK-NEXT: ret <vscale x 2 x i32> [[CASTSCALABLESVE]]
				//
				fixed_int32m1_t sub_i32(fixed_int32m1_t a, fixed_int32m1_t b) {
				return a - b;
				}

				// CHECK-LABEL: @sub_i64(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SUB:%.*]] = sub <4 x i64> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> undef, <4 x i64> [[SUB]], i64 0)
				// CHECK-NEXT: ret <vscale x 1 x i64> [[CASTSCALABLESVE]]
				//
				fixed_int64m1_t sub_i64(fixed_int64m1_t a, fixed_int64m1_t b) {
				return a - b;
				}

				// CHECK-LABEL: @sub_u8(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SUB:%.*]] = sub <32 x i8> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> undef, <32 x i8> [[SUB]], i64 0)
				// CHECK-NEXT: ret <vscale x 8 x i8> [[CASTSCALABLESVE]]
				//
				fixed_uint8m1_t sub_u8(fixed_uint8m1_t a, fixed_uint8m1_t b) {
				return a - b;
				}

				// CHECK-LABEL: @sub_u16(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SUB:%.*]] = sub <16 x i16> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> undef, <16 x i16> [[SUB]], i64 0)
				// CHECK-NEXT: ret <vscale x 4 x i16> [[CASTSCALABLESVE]]
				//
				fixed_uint16m1_t sub_u16(fixed_uint16m1_t a, fixed_uint16m1_t b) {
				return a - b;
				}

				// CHECK-LABEL: @sub_u32(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SUB:%.*]] = sub <8 x i32> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> undef, <8 x i32> [[SUB]], i64 0)
				// CHECK-NEXT: ret <vscale x 2 x i32> [[CASTSCALABLESVE]]
				//
				fixed_uint32m1_t sub_u32(fixed_uint32m1_t a, fixed_uint32m1_t b) {
				return a - b;
				}

				// CHECK-LABEL: @sub_u64(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SUB:%.*]] = sub <4 x i64> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> undef, <4 x i64> [[SUB]], i64 0)
				// CHECK-NEXT: ret <vscale x 1 x i64> [[CASTSCALABLESVE]]
				//
				fixed_uint64m1_t sub_u64(fixed_uint64m1_t a, fixed_uint64m1_t b) {
				return a - b;
				}

				// CHECK-LABEL: @sub_f32(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <8 x float> @llvm.vector.extract.v8f32.nxv2f32(<vscale x 2 x float> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <8 x float> @llvm.vector.extract.v8f32.nxv2f32(<vscale x 2 x float> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SUB:%.*]] = fsub <8 x float> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 2 x float> @llvm.vector.insert.nxv2f32.v8f32(<vscale x 2 x float> undef, <8 x float> [[SUB]], i64 0)
				// CHECK-NEXT: ret <vscale x 2 x float> [[CASTSCALABLESVE]]
				//
				fixed_float32m1_t sub_f32(fixed_float32m1_t a, fixed_float32m1_t b) {
				return a - b;
				}

				// CHECK-LABEL: @sub_f64(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <4 x double> @llvm.vector.extract.v4f64.nxv1f64(<vscale x 1 x double> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <4 x double> @llvm.vector.extract.v4f64.nxv1f64(<vscale x 1 x double> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SUB:%.*]] = fsub <4 x double> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 1 x double> @llvm.vector.insert.nxv1f64.v4f64(<vscale x 1 x double> undef, <4 x double> [[SUB]], i64 0)
				// CHECK-NEXT: ret <vscale x 1 x double> [[CASTSCALABLESVE]]
				//
				fixed_float64m1_t sub_f64(fixed_float64m1_t a, fixed_float64m1_t b) {
				return a - b;
				}

				// CHECK-LABEL: @sub_inplace_i8(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SUB:%.*]] = sub <32 x i8> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> undef, <32 x i8> [[SUB]], i64 0)
				// CHECK-NEXT: ret <vscale x 8 x i8> [[CASTSCALABLESVE]]
				//
				fixed_int8m1_t sub_inplace_i8(fixed_int8m1_t a, fixed_int8m1_t b) {
				return a - b;
				}

				// CHECK-LABEL: @sub_inplace_i16(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SUB:%.*]] = sub <16 x i16> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> undef, <16 x i16> [[SUB]], i64 0)
				// CHECK-NEXT: ret <vscale x 4 x i16> [[CASTSCALABLESVE]]
				//
				fixed_int16m1_t sub_inplace_i16(fixed_int16m1_t a, fixed_int16m1_t b) {
				return a - b;
				}

				// CHECK-LABEL: @sub_inplace_i32(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SUB:%.*]] = sub <8 x i32> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> undef, <8 x i32> [[SUB]], i64 0)
				// CHECK-NEXT: ret <vscale x 2 x i32> [[CASTSCALABLESVE]]
				//
				fixed_int32m1_t sub_inplace_i32(fixed_int32m1_t a, fixed_int32m1_t b) {
				return a - b;
				}

				// CHECK-LABEL: @sub_inplace_i64(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SUB:%.*]] = sub <4 x i64> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> undef, <4 x i64> [[SUB]], i64 0)
				// CHECK-NEXT: ret <vscale x 1 x i64> [[CASTSCALABLESVE]]
				//
				fixed_int64m1_t sub_inplace_i64(fixed_int64m1_t a, fixed_int64m1_t b) {
				return a - b;
				}

				// CHECK-LABEL: @sub_inplace_u8(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SUB:%.*]] = sub <32 x i8> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> undef, <32 x i8> [[SUB]], i64 0)
				// CHECK-NEXT: ret <vscale x 8 x i8> [[CASTSCALABLESVE]]
				//
				fixed_uint8m1_t sub_inplace_u8(fixed_uint8m1_t a, fixed_uint8m1_t b) {
				return a - b;
				}

				// CHECK-LABEL: @sub_inplace_u16(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SUB:%.*]] = sub <16 x i16> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> undef, <16 x i16> [[SUB]], i64 0)
				// CHECK-NEXT: ret <vscale x 4 x i16> [[CASTSCALABLESVE]]
				//
				fixed_uint16m1_t sub_inplace_u16(fixed_uint16m1_t a, fixed_uint16m1_t b) {
				return a - b;
				}

				// CHECK-LABEL: @sub_inplace_u32(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SUB:%.*]] = sub <8 x i32> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> undef, <8 x i32> [[SUB]], i64 0)
				// CHECK-NEXT: ret <vscale x 2 x i32> [[CASTSCALABLESVE]]
				//
				fixed_uint32m1_t sub_inplace_u32(fixed_uint32m1_t a, fixed_uint32m1_t b) {
				return a - b;
				}

				// CHECK-LABEL: @sub_inplace_u64(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SUB:%.*]] = sub <4 x i64> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> undef, <4 x i64> [[SUB]], i64 0)
				// CHECK-NEXT: ret <vscale x 1 x i64> [[CASTSCALABLESVE]]
				//
				fixed_uint64m1_t sub_inplace_u64(fixed_uint64m1_t a, fixed_uint64m1_t b) {
				return a - b;
				}

				// CHECK-LABEL: @sub_inplace_f32(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <8 x float> @llvm.vector.extract.v8f32.nxv2f32(<vscale x 2 x float> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <8 x float> @llvm.vector.extract.v8f32.nxv2f32(<vscale x 2 x float> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SUB:%.*]] = fsub <8 x float> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 2 x float> @llvm.vector.insert.nxv2f32.v8f32(<vscale x 2 x float> undef, <8 x float> [[SUB]], i64 0)
				// CHECK-NEXT: ret <vscale x 2 x float> [[CASTSCALABLESVE]]
				//
				fixed_float32m1_t sub_inplace_f32(fixed_float32m1_t a, fixed_float32m1_t b) {
				return a - b;
				}

				// CHECK-LABEL: @sub_inplace_f64(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <4 x double> @llvm.vector.extract.v4f64.nxv1f64(<vscale x 1 x double> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <4 x double> @llvm.vector.extract.v4f64.nxv1f64(<vscale x 1 x double> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SUB:%.*]] = fsub <4 x double> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 1 x double> @llvm.vector.insert.nxv1f64.v4f64(<vscale x 1 x double> undef, <4 x double> [[SUB]], i64 0)
				// CHECK-NEXT: ret <vscale x 1 x double> [[CASTSCALABLESVE]]
				//
				fixed_float64m1_t sub_inplace_f64(fixed_float64m1_t a, fixed_float64m1_t b) {
				return a - b;
				}

				// CHECK-LABEL: @sub_scalar_i8(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.]] = insertelement <32 x i8> poison, i8 [[B:%.]], i64 0
				// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <32 x i8> [[SPLAT_SPLATINSERT]], <32 x i8> poison, <32 x i32> zeroinitializer
				// CHECK-NEXT: [[SUB:%.*]] = sub <32 x i8> [[A]], [[SPLAT_SPLAT]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> undef, <32 x i8> [[SUB]], i64 0)
				// CHECK-NEXT: ret <vscale x 8 x i8> [[CASTSCALABLESVE]]
				//
				fixed_int8m1_t sub_scalar_i8(fixed_int8m1_t a, int8_t b) {
				return a - b;
				}

				// CHECK-LABEL: @sub_scalar_i16(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.]] = insertelement <16 x i16> poison, i16 [[B:%.]], i64 0
				// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <16 x i16> [[SPLAT_SPLATINSERT]], <16 x i16> poison, <16 x i32> zeroinitializer
				// CHECK-NEXT: [[SUB:%.*]] = sub <16 x i16> [[A]], [[SPLAT_SPLAT]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> undef, <16 x i16> [[SUB]], i64 0)
				// CHECK-NEXT: ret <vscale x 4 x i16> [[CASTSCALABLESVE]]
				//
				fixed_int16m1_t sub_scalar_i16(fixed_int16m1_t a, int16_t b) {
				return a - b;
				}

				// CHECK-LABEL: @sub_scalar_i32(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.]] = insertelement <8 x i32> poison, i32 [[B:%.]], i64 0
				// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <8 x i32> [[SPLAT_SPLATINSERT]], <8 x i32> poison, <8 x i32> zeroinitializer
				// CHECK-NEXT: [[SUB:%.*]] = sub <8 x i32> [[A]], [[SPLAT_SPLAT]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> undef, <8 x i32> [[SUB]], i64 0)
				// CHECK-NEXT: ret <vscale x 2 x i32> [[CASTSCALABLESVE]]
				//
				fixed_int32m1_t sub_scalar_i32(fixed_int32m1_t a, int32_t b) {
				return a - b;
				}

				// CHECK-LABEL: @sub_scalar_i64(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.]] = insertelement <4 x i64> poison, i64 [[B:%.]], i64 0
				// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <4 x i64> [[SPLAT_SPLATINSERT]], <4 x i64> poison, <4 x i32> zeroinitializer
				// CHECK-NEXT: [[SUB:%.*]] = sub <4 x i64> [[A]], [[SPLAT_SPLAT]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> undef, <4 x i64> [[SUB]], i64 0)
				// CHECK-NEXT: ret <vscale x 1 x i64> [[CASTSCALABLESVE]]
				//
				fixed_int64m1_t sub_scalar_i64(fixed_int64m1_t a, int64_t b) {
				return a - b;
				}

				// CHECK-LABEL: @sub_scalar_u8(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.]] = insertelement <32 x i8> poison, i8 [[B:%.]], i64 0
				// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <32 x i8> [[SPLAT_SPLATINSERT]], <32 x i8> poison, <32 x i32> zeroinitializer
				// CHECK-NEXT: [[SUB:%.*]] = sub <32 x i8> [[A]], [[SPLAT_SPLAT]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> undef, <32 x i8> [[SUB]], i64 0)
				// CHECK-NEXT: ret <vscale x 8 x i8> [[CASTSCALABLESVE]]
				//
				fixed_uint8m1_t sub_scalar_u8(fixed_uint8m1_t a, uint8_t b) {
				return a - b;
				}

				// CHECK-LABEL: @sub_scalar_u16(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.]] = insertelement <16 x i16> poison, i16 [[B:%.]], i64 0
				// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <16 x i16> [[SPLAT_SPLATINSERT]], <16 x i16> poison, <16 x i32> zeroinitializer
				// CHECK-NEXT: [[SUB:%.*]] = sub <16 x i16> [[A]], [[SPLAT_SPLAT]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> undef, <16 x i16> [[SUB]], i64 0)
				// CHECK-NEXT: ret <vscale x 4 x i16> [[CASTSCALABLESVE]]
				//
				fixed_uint16m1_t sub_scalar_u16(fixed_uint16m1_t a, uint16_t b) {
				return a - b;
				}

				// CHECK-LABEL: @sub_scalar_u32(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.]] = insertelement <8 x i32> poison, i32 [[B:%.]], i64 0
				// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <8 x i32> [[SPLAT_SPLATINSERT]], <8 x i32> poison, <8 x i32> zeroinitializer
				// CHECK-NEXT: [[SUB:%.*]] = sub <8 x i32> [[A]], [[SPLAT_SPLAT]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> undef, <8 x i32> [[SUB]], i64 0)
				// CHECK-NEXT: ret <vscale x 2 x i32> [[CASTSCALABLESVE]]
				//
				fixed_uint32m1_t sub_scalar_u32(fixed_uint32m1_t a, uint32_t b) {
				return a - b;
				}

				// CHECK-LABEL: @sub_scalar_u64(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.]] = insertelement <4 x i64> poison, i64 [[B:%.]], i64 0
				// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <4 x i64> [[SPLAT_SPLATINSERT]], <4 x i64> poison, <4 x i32> zeroinitializer
				// CHECK-NEXT: [[SUB:%.*]] = sub <4 x i64> [[A]], [[SPLAT_SPLAT]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> undef, <4 x i64> [[SUB]], i64 0)
				// CHECK-NEXT: ret <vscale x 1 x i64> [[CASTSCALABLESVE]]
				//
				fixed_uint64m1_t sub_scalar_u64(fixed_uint64m1_t a, uint64_t b) {
				return a - b;
				}

				// CHECK-LABEL: @sub_scalar_f32(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <8 x float> @llvm.vector.extract.v8f32.nxv2f32(<vscale x 2 x float> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.]] = insertelement <8 x float> poison, float [[B:%.]], i64 0
				// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <8 x float> [[SPLAT_SPLATINSERT]], <8 x float> poison, <8 x i32> zeroinitializer
				// CHECK-NEXT: [[SUB:%.*]] = fsub <8 x float> [[A]], [[SPLAT_SPLAT]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 2 x float> @llvm.vector.insert.nxv2f32.v8f32(<vscale x 2 x float> undef, <8 x float> [[SUB]], i64 0)
				// CHECK-NEXT: ret <vscale x 2 x float> [[CASTSCALABLESVE]]
				//
				fixed_float32m1_t sub_scalar_f32(fixed_float32m1_t a, float b) {
				return a - b;
				}

				// CHECK-LABEL: @sub_scalar_f64(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <4 x double> @llvm.vector.extract.v4f64.nxv1f64(<vscale x 1 x double> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.]] = insertelement <4 x double> poison, double [[B:%.]], i64 0
				// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <4 x double> [[SPLAT_SPLATINSERT]], <4 x double> poison, <4 x i32> zeroinitializer
				// CHECK-NEXT: [[SUB:%.*]] = fsub <4 x double> [[A]], [[SPLAT_SPLAT]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 1 x double> @llvm.vector.insert.nxv1f64.v4f64(<vscale x 1 x double> undef, <4 x double> [[SUB]], i64 0)
				// CHECK-NEXT: ret <vscale x 1 x double> [[CASTSCALABLESVE]]
				//
				fixed_float64m1_t sub_scalar_f64(fixed_float64m1_t a, double b) {
				return a - b;
				}

				// MULTIPLICATION

				// CHECK-LABEL: @mul_i8(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[MUL:%.*]] = mul <32 x i8> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> undef, <32 x i8> [[MUL]], i64 0)
				// CHECK-NEXT: ret <vscale x 8 x i8> [[CASTSCALABLESVE]]
				//
				fixed_int8m1_t mul_i8(fixed_int8m1_t a, fixed_int8m1_t b) {
				return a * b;
				}

				// CHECK-LABEL: @mul_i16(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[MUL:%.*]] = mul <16 x i16> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> undef, <16 x i16> [[MUL]], i64 0)
				// CHECK-NEXT: ret <vscale x 4 x i16> [[CASTSCALABLESVE]]
				//
				fixed_int16m1_t mul_i16(fixed_int16m1_t a, fixed_int16m1_t b) {
				return a * b;
				}

				// CHECK-LABEL: @mul_i32(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[MUL:%.*]] = mul <8 x i32> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> undef, <8 x i32> [[MUL]], i64 0)
				// CHECK-NEXT: ret <vscale x 2 x i32> [[CASTSCALABLESVE]]
				//
				fixed_int32m1_t mul_i32(fixed_int32m1_t a, fixed_int32m1_t b) {
				return a * b;
				}

				// CHECK-LABEL: @mul_i64(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[MUL:%.*]] = mul <4 x i64> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> undef, <4 x i64> [[MUL]], i64 0)
				// CHECK-NEXT: ret <vscale x 1 x i64> [[CASTSCALABLESVE]]
				//
				fixed_int64m1_t mul_i64(fixed_int64m1_t a, fixed_int64m1_t b) {
				return a * b;
				}

				// CHECK-LABEL: @mul_u8(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[MUL:%.*]] = mul <32 x i8> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> undef, <32 x i8> [[MUL]], i64 0)
				// CHECK-NEXT: ret <vscale x 8 x i8> [[CASTSCALABLESVE]]
				//
				fixed_uint8m1_t mul_u8(fixed_uint8m1_t a, fixed_uint8m1_t b) {
				return a * b;
				}

				// CHECK-LABEL: @mul_u16(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[MUL:%.*]] = mul <16 x i16> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> undef, <16 x i16> [[MUL]], i64 0)
				// CHECK-NEXT: ret <vscale x 4 x i16> [[CASTSCALABLESVE]]
				//
				fixed_uint16m1_t mul_u16(fixed_uint16m1_t a, fixed_uint16m1_t b) {
				return a * b;
				}

				// CHECK-LABEL: @mul_u32(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[MUL:%.*]] = mul <8 x i32> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> undef, <8 x i32> [[MUL]], i64 0)
				// CHECK-NEXT: ret <vscale x 2 x i32> [[CASTSCALABLESVE]]
				//
				fixed_uint32m1_t mul_u32(fixed_uint32m1_t a, fixed_uint32m1_t b) {
				return a * b;
				}

				// CHECK-LABEL: @mul_u64(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[MUL:%.*]] = mul <4 x i64> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> undef, <4 x i64> [[MUL]], i64 0)
				// CHECK-NEXT: ret <vscale x 1 x i64> [[CASTSCALABLESVE]]
				//
				fixed_uint64m1_t mul_u64(fixed_uint64m1_t a, fixed_uint64m1_t b) {
				return a * b;
				}

				// CHECK-LABEL: @mul_f32(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <8 x float> @llvm.vector.extract.v8f32.nxv2f32(<vscale x 2 x float> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <8 x float> @llvm.vector.extract.v8f32.nxv2f32(<vscale x 2 x float> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[MUL:%.*]] = fmul <8 x float> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 2 x float> @llvm.vector.insert.nxv2f32.v8f32(<vscale x 2 x float> undef, <8 x float> [[MUL]], i64 0)
				// CHECK-NEXT: ret <vscale x 2 x float> [[CASTSCALABLESVE]]
				//
				fixed_float32m1_t mul_f32(fixed_float32m1_t a, fixed_float32m1_t b) {
				return a * b;
				}

				// CHECK-LABEL: @mul_f64(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <4 x double> @llvm.vector.extract.v4f64.nxv1f64(<vscale x 1 x double> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <4 x double> @llvm.vector.extract.v4f64.nxv1f64(<vscale x 1 x double> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[MUL:%.*]] = fmul <4 x double> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 1 x double> @llvm.vector.insert.nxv1f64.v4f64(<vscale x 1 x double> undef, <4 x double> [[MUL]], i64 0)
				// CHECK-NEXT: ret <vscale x 1 x double> [[CASTSCALABLESVE]]
				//
				fixed_float64m1_t mul_f64(fixed_float64m1_t a, fixed_float64m1_t b) {
				return a * b;
				}

				// CHECK-LABEL: @mul_inplace_i8(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[MUL:%.*]] = mul <32 x i8> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> undef, <32 x i8> [[MUL]], i64 0)
				// CHECK-NEXT: ret <vscale x 8 x i8> [[CASTSCALABLESVE]]
				//
				fixed_int8m1_t mul_inplace_i8(fixed_int8m1_t a, fixed_int8m1_t b) {
				return a * b;
				}

				// CHECK-LABEL: @mul_inplace_i16(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[MUL:%.*]] = mul <16 x i16> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> undef, <16 x i16> [[MUL]], i64 0)
				// CHECK-NEXT: ret <vscale x 4 x i16> [[CASTSCALABLESVE]]
				//
				fixed_int16m1_t mul_inplace_i16(fixed_int16m1_t a, fixed_int16m1_t b) {
				return a * b;
				}

				// CHECK-LABEL: @mul_inplace_i32(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[MUL:%.*]] = mul <8 x i32> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> undef, <8 x i32> [[MUL]], i64 0)
				// CHECK-NEXT: ret <vscale x 2 x i32> [[CASTSCALABLESVE]]
				//
				fixed_int32m1_t mul_inplace_i32(fixed_int32m1_t a, fixed_int32m1_t b) {
				return a * b;
				}

				// CHECK-LABEL: @mul_inplace_i64(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[MUL:%.*]] = mul <4 x i64> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> undef, <4 x i64> [[MUL]], i64 0)
				// CHECK-NEXT: ret <vscale x 1 x i64> [[CASTSCALABLESVE]]
				//
				fixed_int64m1_t mul_inplace_i64(fixed_int64m1_t a, fixed_int64m1_t b) {
				return a * b;
				}

				// CHECK-LABEL: @mul_inplace_u8(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[MUL:%.*]] = mul <32 x i8> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> undef, <32 x i8> [[MUL]], i64 0)
				// CHECK-NEXT: ret <vscale x 8 x i8> [[CASTSCALABLESVE]]
				//
				fixed_uint8m1_t mul_inplace_u8(fixed_uint8m1_t a, fixed_uint8m1_t b) {
				return a * b;
				}

				// CHECK-LABEL: @mul_inplace_u16(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[MUL:%.*]] = mul <16 x i16> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> undef, <16 x i16> [[MUL]], i64 0)
				// CHECK-NEXT: ret <vscale x 4 x i16> [[CASTSCALABLESVE]]
				//
				fixed_uint16m1_t mul_inplace_u16(fixed_uint16m1_t a, fixed_uint16m1_t b) {
				return a * b;
				}

				// CHECK-LABEL: @mul_inplace_u32(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[MUL:%.*]] = mul <8 x i32> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> undef, <8 x i32> [[MUL]], i64 0)
				// CHECK-NEXT: ret <vscale x 2 x i32> [[CASTSCALABLESVE]]
				//
				fixed_uint32m1_t mul_inplace_u32(fixed_uint32m1_t a, fixed_uint32m1_t b) {
				return a * b;
				}

				// CHECK-LABEL: @mul_inplace_u64(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[MUL:%.*]] = mul <4 x i64> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> undef, <4 x i64> [[MUL]], i64 0)
				// CHECK-NEXT: ret <vscale x 1 x i64> [[CASTSCALABLESVE]]
				//
				fixed_uint64m1_t mul_inplace_u64(fixed_uint64m1_t a, fixed_uint64m1_t b) {
				return a * b;
				}

				// CHECK-LABEL: @mul_inplace_f32(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <8 x float> @llvm.vector.extract.v8f32.nxv2f32(<vscale x 2 x float> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <8 x float> @llvm.vector.extract.v8f32.nxv2f32(<vscale x 2 x float> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[MUL:%.*]] = fmul <8 x float> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 2 x float> @llvm.vector.insert.nxv2f32.v8f32(<vscale x 2 x float> undef, <8 x float> [[MUL]], i64 0)
				// CHECK-NEXT: ret <vscale x 2 x float> [[CASTSCALABLESVE]]
				//
				fixed_float32m1_t mul_inplace_f32(fixed_float32m1_t a, fixed_float32m1_t b) {
				return a * b;
				}

				// CHECK-LABEL: @mul_inplace_f64(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <4 x double> @llvm.vector.extract.v4f64.nxv1f64(<vscale x 1 x double> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <4 x double> @llvm.vector.extract.v4f64.nxv1f64(<vscale x 1 x double> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[MUL:%.*]] = fmul <4 x double> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 1 x double> @llvm.vector.insert.nxv1f64.v4f64(<vscale x 1 x double> undef, <4 x double> [[MUL]], i64 0)
				// CHECK-NEXT: ret <vscale x 1 x double> [[CASTSCALABLESVE]]
				//
				fixed_float64m1_t mul_inplace_f64(fixed_float64m1_t a, fixed_float64m1_t b) {
				return a * b;
				}

				// CHECK-LABEL: @mul_scalar_i8(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.]] = insertelement <32 x i8> poison, i8 [[B:%.]], i64 0
				// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <32 x i8> [[SPLAT_SPLATINSERT]], <32 x i8> poison, <32 x i32> zeroinitializer
				// CHECK-NEXT: [[MUL:%.*]] = mul <32 x i8> [[A]], [[SPLAT_SPLAT]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> undef, <32 x i8> [[MUL]], i64 0)
				// CHECK-NEXT: ret <vscale x 8 x i8> [[CASTSCALABLESVE]]
				//
				fixed_int8m1_t mul_scalar_i8(fixed_int8m1_t a, int8_t b) {
				return a * b;
				}

				// CHECK-LABEL: @mul_scalar_i16(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.]] = insertelement <16 x i16> poison, i16 [[B:%.]], i64 0
				// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <16 x i16> [[SPLAT_SPLATINSERT]], <16 x i16> poison, <16 x i32> zeroinitializer
				// CHECK-NEXT: [[MUL:%.*]] = mul <16 x i16> [[A]], [[SPLAT_SPLAT]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> undef, <16 x i16> [[MUL]], i64 0)
				// CHECK-NEXT: ret <vscale x 4 x i16> [[CASTSCALABLESVE]]
				//
				fixed_int16m1_t mul_scalar_i16(fixed_int16m1_t a, int16_t b) {
				return a * b;
				}

				// CHECK-LABEL: @mul_scalar_i32(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.]] = insertelement <8 x i32> poison, i32 [[B:%.]], i64 0
				// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <8 x i32> [[SPLAT_SPLATINSERT]], <8 x i32> poison, <8 x i32> zeroinitializer
				// CHECK-NEXT: [[MUL:%.*]] = mul <8 x i32> [[A]], [[SPLAT_SPLAT]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> undef, <8 x i32> [[MUL]], i64 0)
				// CHECK-NEXT: ret <vscale x 2 x i32> [[CASTSCALABLESVE]]
				//
				fixed_int32m1_t mul_scalar_i32(fixed_int32m1_t a, int32_t b) {
				return a * b;
				}

				// CHECK-LABEL: @mul_scalar_i64(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.]] = insertelement <4 x i64> poison, i64 [[B:%.]], i64 0
				// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <4 x i64> [[SPLAT_SPLATINSERT]], <4 x i64> poison, <4 x i32> zeroinitializer
				// CHECK-NEXT: [[MUL:%.*]] = mul <4 x i64> [[A]], [[SPLAT_SPLAT]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> undef, <4 x i64> [[MUL]], i64 0)
				// CHECK-NEXT: ret <vscale x 1 x i64> [[CASTSCALABLESVE]]
				//
				fixed_int64m1_t mul_scalar_i64(fixed_int64m1_t a, int64_t b) {
				return a * b;
				}

				// CHECK-LABEL: @mul_scalar_u8(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.]] = insertelement <32 x i8> poison, i8 [[B:%.]], i64 0
				// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <32 x i8> [[SPLAT_SPLATINSERT]], <32 x i8> poison, <32 x i32> zeroinitializer
				// CHECK-NEXT: [[MUL:%.*]] = mul <32 x i8> [[A]], [[SPLAT_SPLAT]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> undef, <32 x i8> [[MUL]], i64 0)
				// CHECK-NEXT: ret <vscale x 8 x i8> [[CASTSCALABLESVE]]
				//
				fixed_uint8m1_t mul_scalar_u8(fixed_uint8m1_t a, uint8_t b) {
				return a * b;
				}

				// CHECK-LABEL: @mul_scalar_u16(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.]] = insertelement <16 x i16> poison, i16 [[B:%.]], i64 0
				// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <16 x i16> [[SPLAT_SPLATINSERT]], <16 x i16> poison, <16 x i32> zeroinitializer
				// CHECK-NEXT: [[MUL:%.*]] = mul <16 x i16> [[A]], [[SPLAT_SPLAT]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> undef, <16 x i16> [[MUL]], i64 0)
				// CHECK-NEXT: ret <vscale x 4 x i16> [[CASTSCALABLESVE]]
				//
				fixed_uint16m1_t mul_scalar_u16(fixed_uint16m1_t a, uint16_t b) {
				return a * b;
				}

				// CHECK-LABEL: @mul_scalar_u32(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.]] = insertelement <8 x i32> poison, i32 [[B:%.]], i64 0
				// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <8 x i32> [[SPLAT_SPLATINSERT]], <8 x i32> poison, <8 x i32> zeroinitializer
				// CHECK-NEXT: [[MUL:%.*]] = mul <8 x i32> [[A]], [[SPLAT_SPLAT]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> undef, <8 x i32> [[MUL]], i64 0)
				// CHECK-NEXT: ret <vscale x 2 x i32> [[CASTSCALABLESVE]]
				//
				fixed_uint32m1_t mul_scalar_u32(fixed_uint32m1_t a, uint32_t b) {
				return a * b;
				}

				// CHECK-LABEL: @mul_scalar_u64(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.]] = insertelement <4 x i64> poison, i64 [[B:%.]], i64 0
				// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <4 x i64> [[SPLAT_SPLATINSERT]], <4 x i64> poison, <4 x i32> zeroinitializer
				// CHECK-NEXT: [[MUL:%.*]] = mul <4 x i64> [[A]], [[SPLAT_SPLAT]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> undef, <4 x i64> [[MUL]], i64 0)
				// CHECK-NEXT: ret <vscale x 1 x i64> [[CASTSCALABLESVE]]
				//
				fixed_uint64m1_t mul_scalar_u64(fixed_uint64m1_t a, uint64_t b) {
				return a * b;
				}

				// CHECK-LABEL: @mul_scalar_f32(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <8 x float> @llvm.vector.extract.v8f32.nxv2f32(<vscale x 2 x float> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.]] = insertelement <8 x float> poison, float [[B:%.]], i64 0
				// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <8 x float> [[SPLAT_SPLATINSERT]], <8 x float> poison, <8 x i32> zeroinitializer
				// CHECK-NEXT: [[MUL:%.*]] = fmul <8 x float> [[A]], [[SPLAT_SPLAT]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 2 x float> @llvm.vector.insert.nxv2f32.v8f32(<vscale x 2 x float> undef, <8 x float> [[MUL]], i64 0)
				// CHECK-NEXT: ret <vscale x 2 x float> [[CASTSCALABLESVE]]
				//
				fixed_float32m1_t mul_scalar_f32(fixed_float32m1_t a, float b) {
				return a * b;
				}

				// CHECK-LABEL: @mul_scalar_f64(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <4 x double> @llvm.vector.extract.v4f64.nxv1f64(<vscale x 1 x double> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.]] = insertelement <4 x double> poison, double [[B:%.]], i64 0
				// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <4 x double> [[SPLAT_SPLATINSERT]], <4 x double> poison, <4 x i32> zeroinitializer
				// CHECK-NEXT: [[MUL:%.*]] = fmul <4 x double> [[A]], [[SPLAT_SPLAT]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 1 x double> @llvm.vector.insert.nxv1f64.v4f64(<vscale x 1 x double> undef, <4 x double> [[MUL]], i64 0)
				// CHECK-NEXT: ret <vscale x 1 x double> [[CASTSCALABLESVE]]
				//
				fixed_float64m1_t mul_scalar_f64(fixed_float64m1_t a, double b) {
				return a * b;
				}

				// DIVISION

				// CHECK-LABEL: @div_i8(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[DIV:%.*]] = sdiv <32 x i8> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> undef, <32 x i8> [[DIV]], i64 0)
				// CHECK-NEXT: ret <vscale x 8 x i8> [[CASTSCALABLESVE]]
				//
				fixed_int8m1_t div_i8(fixed_int8m1_t a, fixed_int8m1_t b) {
				return a / b;
				}

				// CHECK-LABEL: @div_i16(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[DIV:%.*]] = sdiv <16 x i16> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> undef, <16 x i16> [[DIV]], i64 0)
				// CHECK-NEXT: ret <vscale x 4 x i16> [[CASTSCALABLESVE]]
				//
				fixed_int16m1_t div_i16(fixed_int16m1_t a, fixed_int16m1_t b) {
				return a / b;
				}

				// CHECK-LABEL: @div_i32(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[DIV:%.*]] = sdiv <8 x i32> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> undef, <8 x i32> [[DIV]], i64 0)
				// CHECK-NEXT: ret <vscale x 2 x i32> [[CASTSCALABLESVE]]
				//
				fixed_int32m1_t div_i32(fixed_int32m1_t a, fixed_int32m1_t b) {
				return a / b;
				}

				// CHECK-LABEL: @div_i64(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[DIV:%.*]] = sdiv <4 x i64> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> undef, <4 x i64> [[DIV]], i64 0)
				// CHECK-NEXT: ret <vscale x 1 x i64> [[CASTSCALABLESVE]]
				//
				fixed_int64m1_t div_i64(fixed_int64m1_t a, fixed_int64m1_t b) {
				return a / b;
				}

				// CHECK-LABEL: @div_u8(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[DIV:%.*]] = udiv <32 x i8> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> undef, <32 x i8> [[DIV]], i64 0)
				// CHECK-NEXT: ret <vscale x 8 x i8> [[CASTSCALABLESVE]]
				//
				fixed_uint8m1_t div_u8(fixed_uint8m1_t a, fixed_uint8m1_t b) {
				return a / b;
				}

				// CHECK-LABEL: @div_u16(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[DIV:%.*]] = udiv <16 x i16> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> undef, <16 x i16> [[DIV]], i64 0)
				// CHECK-NEXT: ret <vscale x 4 x i16> [[CASTSCALABLESVE]]
				//
				fixed_uint16m1_t div_u16(fixed_uint16m1_t a, fixed_uint16m1_t b) {
				return a / b;
				}

				// CHECK-LABEL: @div_u32(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[DIV:%.*]] = udiv <8 x i32> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> undef, <8 x i32> [[DIV]], i64 0)
				// CHECK-NEXT: ret <vscale x 2 x i32> [[CASTSCALABLESVE]]
				//
				fixed_uint32m1_t div_u32(fixed_uint32m1_t a, fixed_uint32m1_t b) {
				return a / b;
				}

				// CHECK-LABEL: @div_u64(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[DIV:%.*]] = udiv <4 x i64> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> undef, <4 x i64> [[DIV]], i64 0)
				// CHECK-NEXT: ret <vscale x 1 x i64> [[CASTSCALABLESVE]]
				//
				fixed_uint64m1_t div_u64(fixed_uint64m1_t a, fixed_uint64m1_t b) {
				return a / b;
				}

				// CHECK-LABEL: @div_f32(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <8 x float> @llvm.vector.extract.v8f32.nxv2f32(<vscale x 2 x float> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <8 x float> @llvm.vector.extract.v8f32.nxv2f32(<vscale x 2 x float> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[DIV:%.*]] = fdiv <8 x float> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 2 x float> @llvm.vector.insert.nxv2f32.v8f32(<vscale x 2 x float> undef, <8 x float> [[DIV]], i64 0)
				// CHECK-NEXT: ret <vscale x 2 x float> [[CASTSCALABLESVE]]
				//
				fixed_float32m1_t div_f32(fixed_float32m1_t a, fixed_float32m1_t b) {
				return a / b;
				}

				// CHECK-LABEL: @div_f64(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <4 x double> @llvm.vector.extract.v4f64.nxv1f64(<vscale x 1 x double> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <4 x double> @llvm.vector.extract.v4f64.nxv1f64(<vscale x 1 x double> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[DIV:%.*]] = fdiv <4 x double> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 1 x double> @llvm.vector.insert.nxv1f64.v4f64(<vscale x 1 x double> undef, <4 x double> [[DIV]], i64 0)
				// CHECK-NEXT: ret <vscale x 1 x double> [[CASTSCALABLESVE]]
				//
				fixed_float64m1_t div_f64(fixed_float64m1_t a, fixed_float64m1_t b) {
				return a / b;
				}

				// CHECK-LABEL: @div_inplace_i8(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[DIV:%.*]] = sdiv <32 x i8> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> undef, <32 x i8> [[DIV]], i64 0)
				// CHECK-NEXT: ret <vscale x 8 x i8> [[CASTSCALABLESVE]]
				//
				fixed_int8m1_t div_inplace_i8(fixed_int8m1_t a, fixed_int8m1_t b) {
				return a / b;
				}

				// CHECK-LABEL: @div_inplace_i16(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[DIV:%.*]] = sdiv <16 x i16> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> undef, <16 x i16> [[DIV]], i64 0)
				// CHECK-NEXT: ret <vscale x 4 x i16> [[CASTSCALABLESVE]]
				//
				fixed_int16m1_t div_inplace_i16(fixed_int16m1_t a, fixed_int16m1_t b) {
				return a / b;
				}

				// CHECK-LABEL: @div_inplace_i32(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[DIV:%.*]] = sdiv <8 x i32> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> undef, <8 x i32> [[DIV]], i64 0)
				// CHECK-NEXT: ret <vscale x 2 x i32> [[CASTSCALABLESVE]]
				//
				fixed_int32m1_t div_inplace_i32(fixed_int32m1_t a, fixed_int32m1_t b) {
				return a / b;
				}

				// CHECK-LABEL: @div_inplace_i64(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[DIV:%.*]] = sdiv <4 x i64> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> undef, <4 x i64> [[DIV]], i64 0)
				// CHECK-NEXT: ret <vscale x 1 x i64> [[CASTSCALABLESVE]]
				//
				fixed_int64m1_t div_inplace_i64(fixed_int64m1_t a, fixed_int64m1_t b) {
				return a / b;
				}

				// CHECK-LABEL: @div_inplace_u8(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[DIV:%.*]] = udiv <32 x i8> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> undef, <32 x i8> [[DIV]], i64 0)
				// CHECK-NEXT: ret <vscale x 8 x i8> [[CASTSCALABLESVE]]
				//
				fixed_uint8m1_t div_inplace_u8(fixed_uint8m1_t a, fixed_uint8m1_t b) {
				return a / b;
				}

				// CHECK-LABEL: @div_inplace_u16(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[DIV:%.*]] = udiv <16 x i16> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> undef, <16 x i16> [[DIV]], i64 0)
				// CHECK-NEXT: ret <vscale x 4 x i16> [[CASTSCALABLESVE]]
				//
				fixed_uint16m1_t div_inplace_u16(fixed_uint16m1_t a, fixed_uint16m1_t b) {
				return a / b;
				}

				// CHECK-LABEL: @div_inplace_u32(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[DIV:%.*]] = udiv <8 x i32> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> undef, <8 x i32> [[DIV]], i64 0)
				// CHECK-NEXT: ret <vscale x 2 x i32> [[CASTSCALABLESVE]]
				//
				fixed_uint32m1_t div_inplace_u32(fixed_uint32m1_t a, fixed_uint32m1_t b) {
				return a / b;
				}

				// CHECK-LABEL: @div_inplace_u64(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[DIV:%.*]] = udiv <4 x i64> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> undef, <4 x i64> [[DIV]], i64 0)
				// CHECK-NEXT: ret <vscale x 1 x i64> [[CASTSCALABLESVE]]
				//
				fixed_uint64m1_t div_inplace_u64(fixed_uint64m1_t a, fixed_uint64m1_t b) {
				return a / b;
				}

				// CHECK-LABEL: @div_inplace_f32(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <8 x float> @llvm.vector.extract.v8f32.nxv2f32(<vscale x 2 x float> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <8 x float> @llvm.vector.extract.v8f32.nxv2f32(<vscale x 2 x float> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[DIV:%.*]] = fdiv <8 x float> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 2 x float> @llvm.vector.insert.nxv2f32.v8f32(<vscale x 2 x float> undef, <8 x float> [[DIV]], i64 0)
				// CHECK-NEXT: ret <vscale x 2 x float> [[CASTSCALABLESVE]]
				//
				fixed_float32m1_t div_inplace_f32(fixed_float32m1_t a, fixed_float32m1_t b) {
				return a / b;
				}

				// CHECK-LABEL: @div_inplace_f64(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <4 x double> @llvm.vector.extract.v4f64.nxv1f64(<vscale x 1 x double> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <4 x double> @llvm.vector.extract.v4f64.nxv1f64(<vscale x 1 x double> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[DIV:%.*]] = fdiv <4 x double> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 1 x double> @llvm.vector.insert.nxv1f64.v4f64(<vscale x 1 x double> undef, <4 x double> [[DIV]], i64 0)
				// CHECK-NEXT: ret <vscale x 1 x double> [[CASTSCALABLESVE]]
				//
				fixed_float64m1_t div_inplace_f64(fixed_float64m1_t a, fixed_float64m1_t b) {
				return a / b;
				}

				// CHECK-LABEL: @div_scalar_i8(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.]] = insertelement <32 x i8> poison, i8 [[B:%.]], i64 0
				// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <32 x i8> [[SPLAT_SPLATINSERT]], <32 x i8> poison, <32 x i32> zeroinitializer
				// CHECK-NEXT: [[DIV:%.*]] = sdiv <32 x i8> [[A]], [[SPLAT_SPLAT]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> undef, <32 x i8> [[DIV]], i64 0)
				// CHECK-NEXT: ret <vscale x 8 x i8> [[CASTSCALABLESVE]]
				//
				fixed_int8m1_t div_scalar_i8(fixed_int8m1_t a, int8_t b) {
				return a / b;
				}

				// CHECK-LABEL: @div_scalar_i16(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.]] = insertelement <16 x i16> poison, i16 [[B:%.]], i64 0
				// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <16 x i16> [[SPLAT_SPLATINSERT]], <16 x i16> poison, <16 x i32> zeroinitializer
				// CHECK-NEXT: [[DIV:%.*]] = sdiv <16 x i16> [[A]], [[SPLAT_SPLAT]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> undef, <16 x i16> [[DIV]], i64 0)
				// CHECK-NEXT: ret <vscale x 4 x i16> [[CASTSCALABLESVE]]
				//
				fixed_int16m1_t div_scalar_i16(fixed_int16m1_t a, int16_t b) {
				return a / b;
				}

				// CHECK-LABEL: @div_scalar_i32(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.]] = insertelement <8 x i32> poison, i32 [[B:%.]], i64 0
				// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <8 x i32> [[SPLAT_SPLATINSERT]], <8 x i32> poison, <8 x i32> zeroinitializer
				// CHECK-NEXT: [[DIV:%.*]] = sdiv <8 x i32> [[A]], [[SPLAT_SPLAT]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> undef, <8 x i32> [[DIV]], i64 0)
				// CHECK-NEXT: ret <vscale x 2 x i32> [[CASTSCALABLESVE]]
				//
				fixed_int32m1_t div_scalar_i32(fixed_int32m1_t a, int32_t b) {
				return a / b;
				}

				// CHECK-LABEL: @div_scalar_i64(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.]] = insertelement <4 x i64> poison, i64 [[B:%.]], i64 0
				// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <4 x i64> [[SPLAT_SPLATINSERT]], <4 x i64> poison, <4 x i32> zeroinitializer
				// CHECK-NEXT: [[DIV:%.*]] = sdiv <4 x i64> [[A]], [[SPLAT_SPLAT]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> undef, <4 x i64> [[DIV]], i64 0)
				// CHECK-NEXT: ret <vscale x 1 x i64> [[CASTSCALABLESVE]]
				//
				fixed_int64m1_t div_scalar_i64(fixed_int64m1_t a, int64_t b) {
				return a / b;
				}

				// CHECK-LABEL: @div_scalar_u8(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.]] = insertelement <32 x i8> poison, i8 [[B:%.]], i64 0
				// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <32 x i8> [[SPLAT_SPLATINSERT]], <32 x i8> poison, <32 x i32> zeroinitializer
				// CHECK-NEXT: [[DIV:%.*]] = udiv <32 x i8> [[A]], [[SPLAT_SPLAT]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> undef, <32 x i8> [[DIV]], i64 0)
				// CHECK-NEXT: ret <vscale x 8 x i8> [[CASTSCALABLESVE]]
				//
				fixed_uint8m1_t div_scalar_u8(fixed_uint8m1_t a, uint8_t b) {
				return a / b;
				}

				// CHECK-LABEL: @div_scalar_u16(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.]] = insertelement <16 x i16> poison, i16 [[B:%.]], i64 0
				// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <16 x i16> [[SPLAT_SPLATINSERT]], <16 x i16> poison, <16 x i32> zeroinitializer
				// CHECK-NEXT: [[DIV:%.*]] = udiv <16 x i16> [[A]], [[SPLAT_SPLAT]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> undef, <16 x i16> [[DIV]], i64 0)
				// CHECK-NEXT: ret <vscale x 4 x i16> [[CASTSCALABLESVE]]
				//
				fixed_uint16m1_t div_scalar_u16(fixed_uint16m1_t a, uint16_t b) {
				return a / b;
				}

				// CHECK-LABEL: @div_scalar_u32(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.]] = insertelement <8 x i32> poison, i32 [[B:%.]], i64 0
				// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <8 x i32> [[SPLAT_SPLATINSERT]], <8 x i32> poison, <8 x i32> zeroinitializer
				// CHECK-NEXT: [[DIV:%.*]] = udiv <8 x i32> [[A]], [[SPLAT_SPLAT]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> undef, <8 x i32> [[DIV]], i64 0)
				// CHECK-NEXT: ret <vscale x 2 x i32> [[CASTSCALABLESVE]]
				//
				fixed_uint32m1_t div_scalar_u32(fixed_uint32m1_t a, uint32_t b) {
				return a / b;
				}

				// CHECK-LABEL: @div_scalar_u64(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.]] = insertelement <4 x i64> poison, i64 [[B:%.]], i64 0
				// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <4 x i64> [[SPLAT_SPLATINSERT]], <4 x i64> poison, <4 x i32> zeroinitializer
				// CHECK-NEXT: [[DIV:%.*]] = udiv <4 x i64> [[A]], [[SPLAT_SPLAT]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> undef, <4 x i64> [[DIV]], i64 0)
				// CHECK-NEXT: ret <vscale x 1 x i64> [[CASTSCALABLESVE]]
				//
				fixed_uint64m1_t div_scalar_u64(fixed_uint64m1_t a, uint64_t b) {
				return a / b;
				}

				// CHECK-LABEL: @div_scalar_f32(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <8 x float> @llvm.vector.extract.v8f32.nxv2f32(<vscale x 2 x float> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.]] = insertelement <8 x float> poison, float [[B:%.]], i64 0
				// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <8 x float> [[SPLAT_SPLATINSERT]], <8 x float> poison, <8 x i32> zeroinitializer
				// CHECK-NEXT: [[DIV:%.*]] = fdiv <8 x float> [[A]], [[SPLAT_SPLAT]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 2 x float> @llvm.vector.insert.nxv2f32.v8f32(<vscale x 2 x float> undef, <8 x float> [[DIV]], i64 0)
				// CHECK-NEXT: ret <vscale x 2 x float> [[CASTSCALABLESVE]]
				//
				fixed_float32m1_t div_scalar_f32(fixed_float32m1_t a, float b) {
				return a / b;
				}

				// CHECK-LABEL: @div_scalar_f64(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <4 x double> @llvm.vector.extract.v4f64.nxv1f64(<vscale x 1 x double> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.]] = insertelement <4 x double> poison, double [[B:%.]], i64 0
				// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <4 x double> [[SPLAT_SPLATINSERT]], <4 x double> poison, <4 x i32> zeroinitializer
				// CHECK-NEXT: [[DIV:%.*]] = fdiv <4 x double> [[A]], [[SPLAT_SPLAT]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 1 x double> @llvm.vector.insert.nxv1f64.v4f64(<vscale x 1 x double> undef, <4 x double> [[DIV]], i64 0)
				// CHECK-NEXT: ret <vscale x 1 x double> [[CASTSCALABLESVE]]
				//
				fixed_float64m1_t div_scalar_f64(fixed_float64m1_t a, double b) {
				return a / b;
				}

				// REMAINDER

				// CHECK-LABEL: @rem_i8(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[REM:%.*]] = srem <32 x i8> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> undef, <32 x i8> [[REM]], i64 0)
				// CHECK-NEXT: ret <vscale x 8 x i8> [[CASTSCALABLESVE]]
				//
				fixed_int8m1_t rem_i8(fixed_int8m1_t a, fixed_int8m1_t b) {
				return a % b;
				}

				// CHECK-LABEL: @rem_i16(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[REM:%.*]] = srem <16 x i16> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> undef, <16 x i16> [[REM]], i64 0)
				// CHECK-NEXT: ret <vscale x 4 x i16> [[CASTSCALABLESVE]]
				//
				fixed_int16m1_t rem_i16(fixed_int16m1_t a, fixed_int16m1_t b) {
				return a % b;
				}

				// CHECK-LABEL: @rem_i32(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[REM:%.*]] = srem <8 x i32> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> undef, <8 x i32> [[REM]], i64 0)
				// CHECK-NEXT: ret <vscale x 2 x i32> [[CASTSCALABLESVE]]
				//
				fixed_int32m1_t rem_i32(fixed_int32m1_t a, fixed_int32m1_t b) {
				return a % b;
				}

				// CHECK-LABEL: @rem_i64(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[REM:%.*]] = srem <4 x i64> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> undef, <4 x i64> [[REM]], i64 0)
				// CHECK-NEXT: ret <vscale x 1 x i64> [[CASTSCALABLESVE]]
				//
				fixed_int64m1_t rem_i64(fixed_int64m1_t a, fixed_int64m1_t b) {
				return a % b;
				}

				// CHECK-LABEL: @rem_u8(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[REM:%.*]] = urem <32 x i8> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> undef, <32 x i8> [[REM]], i64 0)
				// CHECK-NEXT: ret <vscale x 8 x i8> [[CASTSCALABLESVE]]
				//
				fixed_uint8m1_t rem_u8(fixed_uint8m1_t a, fixed_uint8m1_t b) {
				return a % b;
				}

				// CHECK-LABEL: @rem_u16(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[REM:%.*]] = urem <16 x i16> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> undef, <16 x i16> [[REM]], i64 0)
				// CHECK-NEXT: ret <vscale x 4 x i16> [[CASTSCALABLESVE]]
				//
				fixed_uint16m1_t rem_u16(fixed_uint16m1_t a, fixed_uint16m1_t b) {
				return a % b;
				}

				// CHECK-LABEL: @rem_u32(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[REM:%.*]] = urem <8 x i32> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> undef, <8 x i32> [[REM]], i64 0)
				// CHECK-NEXT: ret <vscale x 2 x i32> [[CASTSCALABLESVE]]
				//
				fixed_uint32m1_t rem_u32(fixed_uint32m1_t a, fixed_uint32m1_t b) {
				return a % b;
				}

				// CHECK-LABEL: @rem_u64(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[REM:%.*]] = urem <4 x i64> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> undef, <4 x i64> [[REM]], i64 0)
				// CHECK-NEXT: ret <vscale x 1 x i64> [[CASTSCALABLESVE]]
				//
				fixed_uint64m1_t rem_u64(fixed_uint64m1_t a, fixed_uint64m1_t b) {
				return a % b;
				}

				// CHECK-LABEL: @rem_inplace_i8(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[REM:%.*]] = srem <32 x i8> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> undef, <32 x i8> [[REM]], i64 0)
				// CHECK-NEXT: ret <vscale x 8 x i8> [[CASTSCALABLESVE]]
				//
				fixed_int8m1_t rem_inplace_i8(fixed_int8m1_t a, fixed_int8m1_t b) {
				return a % b;
				}

				// CHECK-LABEL: @rem_inplace_i16(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[REM:%.*]] = srem <16 x i16> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> undef, <16 x i16> [[REM]], i64 0)
				// CHECK-NEXT: ret <vscale x 4 x i16> [[CASTSCALABLESVE]]
				//
				fixed_int16m1_t rem_inplace_i16(fixed_int16m1_t a, fixed_int16m1_t b) {
				return a % b;
				}

				// CHECK-LABEL: @rem_inplace_i32(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[REM:%.*]] = srem <8 x i32> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> undef, <8 x i32> [[REM]], i64 0)
				// CHECK-NEXT: ret <vscale x 2 x i32> [[CASTSCALABLESVE]]
				//
				fixed_int32m1_t rem_inplace_i32(fixed_int32m1_t a, fixed_int32m1_t b) {
				return a % b;
				}

				// CHECK-LABEL: @rem_inplace_i64(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[REM:%.*]] = srem <4 x i64> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> undef, <4 x i64> [[REM]], i64 0)
				// CHECK-NEXT: ret <vscale x 1 x i64> [[CASTSCALABLESVE]]
				//
				fixed_int64m1_t rem_inplace_i64(fixed_int64m1_t a, fixed_int64m1_t b) {
				return a % b;
				}

				// CHECK-LABEL: @rem_inplace_u8(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[REM:%.*]] = urem <32 x i8> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> undef, <32 x i8> [[REM]], i64 0)
				// CHECK-NEXT: ret <vscale x 8 x i8> [[CASTSCALABLESVE]]
				//
				fixed_uint8m1_t rem_inplace_u8(fixed_uint8m1_t a, fixed_uint8m1_t b) {
				return a % b;
				}

				// CHECK-LABEL: @rem_inplace_u16(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[REM:%.*]] = urem <16 x i16> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> undef, <16 x i16> [[REM]], i64 0)
				// CHECK-NEXT: ret <vscale x 4 x i16> [[CASTSCALABLESVE]]
				//
				fixed_uint16m1_t rem_inplace_u16(fixed_uint16m1_t a, fixed_uint16m1_t b) {
				return a % b;
				}

				// CHECK-LABEL: @rem_inplace_u32(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[REM:%.*]] = urem <8 x i32> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> undef, <8 x i32> [[REM]], i64 0)
				// CHECK-NEXT: ret <vscale x 2 x i32> [[CASTSCALABLESVE]]
				//
				fixed_uint32m1_t rem_inplace_u32(fixed_uint32m1_t a, fixed_uint32m1_t b) {
				return a % b;
				}

				// CHECK-LABEL: @rem_inplace_u64(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[B:%.]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[B_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[REM:%.*]] = urem <4 x i64> [[A]], [[B]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> undef, <4 x i64> [[REM]], i64 0)
				// CHECK-NEXT: ret <vscale x 1 x i64> [[CASTSCALABLESVE]]
				//
				fixed_uint64m1_t rem_inplace_u64(fixed_uint64m1_t a, fixed_uint64m1_t b) {
				return a % b;
				}

				// CHECK-LABEL: @rem_scalar_i8(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.]] = insertelement <32 x i8> poison, i8 [[B:%.]], i64 0
				// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <32 x i8> [[SPLAT_SPLATINSERT]], <32 x i8> poison, <32 x i32> zeroinitializer
				// CHECK-NEXT: [[REM:%.*]] = srem <32 x i8> [[A]], [[SPLAT_SPLAT]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> undef, <32 x i8> [[REM]], i64 0)
				// CHECK-NEXT: ret <vscale x 8 x i8> [[CASTSCALABLESVE]]
				//
				fixed_int8m1_t rem_scalar_i8(fixed_int8m1_t a, int8_t b) {
				return a % b;
				}

				// CHECK-LABEL: @rem_scalar_i16(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.]] = insertelement <16 x i16> poison, i16 [[B:%.]], i64 0
				// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <16 x i16> [[SPLAT_SPLATINSERT]], <16 x i16> poison, <16 x i32> zeroinitializer
				// CHECK-NEXT: [[REM:%.*]] = srem <16 x i16> [[A]], [[SPLAT_SPLAT]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> undef, <16 x i16> [[REM]], i64 0)
				// CHECK-NEXT: ret <vscale x 4 x i16> [[CASTSCALABLESVE]]
				//
				fixed_int16m1_t rem_scalar_i16(fixed_int16m1_t a, int16_t b) {
				return a % b;
				}

				// CHECK-LABEL: @rem_scalar_i32(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.]] = insertelement <8 x i32> poison, i32 [[B:%.]], i64 0
				// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <8 x i32> [[SPLAT_SPLATINSERT]], <8 x i32> poison, <8 x i32> zeroinitializer
				// CHECK-NEXT: [[REM:%.*]] = srem <8 x i32> [[A]], [[SPLAT_SPLAT]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> undef, <8 x i32> [[REM]], i64 0)
				// CHECK-NEXT: ret <vscale x 2 x i32> [[CASTSCALABLESVE]]
				//
				fixed_int32m1_t rem_scalar_i32(fixed_int32m1_t a, int32_t b) {
				return a % b;
				}

				// CHECK-LABEL: @rem_scalar_i64(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.]] = insertelement <4 x i64> poison, i64 [[B:%.]], i64 0
				// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <4 x i64> [[SPLAT_SPLATINSERT]], <4 x i64> poison, <4 x i32> zeroinitializer
				// CHECK-NEXT: [[REM:%.*]] = srem <4 x i64> [[A]], [[SPLAT_SPLAT]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> undef, <4 x i64> [[REM]], i64 0)
				// CHECK-NEXT: ret <vscale x 1 x i64> [[CASTSCALABLESVE]]
				//
				fixed_int64m1_t rem_scalar_i64(fixed_int64m1_t a, int64_t b) {
				return a % b;
				}

				// CHECK-LABEL: @rem_scalar_u8(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.]] = insertelement <32 x i8> poison, i8 [[B:%.]], i64 0
				// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <32 x i8> [[SPLAT_SPLATINSERT]], <32 x i8> poison, <32 x i32> zeroinitializer
				// CHECK-NEXT: [[REM:%.*]] = urem <32 x i8> [[A]], [[SPLAT_SPLAT]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> undef, <32 x i8> [[REM]], i64 0)
				// CHECK-NEXT: ret <vscale x 8 x i8> [[CASTSCALABLESVE]]
				//
				fixed_uint8m1_t rem_scalar_u8(fixed_uint8m1_t a, uint8_t b) {
				return a % b;
				}

				// CHECK-LABEL: @rem_scalar_u16(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.]] = insertelement <16 x i16> poison, i16 [[B:%.]], i64 0
				// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <16 x i16> [[SPLAT_SPLATINSERT]], <16 x i16> poison, <16 x i32> zeroinitializer
				// CHECK-NEXT: [[REM:%.*]] = urem <16 x i16> [[A]], [[SPLAT_SPLAT]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> undef, <16 x i16> [[REM]], i64 0)
				// CHECK-NEXT: ret <vscale x 4 x i16> [[CASTSCALABLESVE]]
				//
				fixed_uint16m1_t rem_scalar_u16(fixed_uint16m1_t a, uint16_t b) {
				return a % b;
				}

				// CHECK-LABEL: @rem_scalar_u32(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.]] = insertelement <8 x i32> poison, i32 [[B:%.]], i64 0
				// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <8 x i32> [[SPLAT_SPLATINSERT]], <8 x i32> poison, <8 x i32> zeroinitializer
				// CHECK-NEXT: [[REM:%.*]] = urem <8 x i32> [[A]], [[SPLAT_SPLAT]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> undef, <8 x i32> [[REM]], i64 0)
				// CHECK-NEXT: ret <vscale x 2 x i32> [[CASTSCALABLESVE]]
				//
				fixed_uint32m1_t rem_scalar_u32(fixed_uint32m1_t a, uint32_t b) {
				return a % b;
				}

				// CHECK-LABEL: @rem_scalar_u64(
				// CHECK-NEXT: entry:
				// CHECK-NEXT: [[A:%.]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.]], i64 0)
				// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.]] = insertelement <4 x i64> poison, i64 [[B:%.]], i64 0
				// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <4 x i64> [[SPLAT_SPLATINSERT]], <4 x i64> poison, <4 x i32> zeroinitializer
				// CHECK-NEXT: [[REM:%.*]] = urem <4 x i64> [[A]], [[SPLAT_SPLAT]]
				// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> undef, <4 x i64> [[REM]], i64 0)
				// CHECK-NEXT: ret <vscale x 1 x i64> [[CASTSCALABLESVE]]
				//
				fixed_uint64m1_t rem_scalar_u64(fixed_uint64m1_t a, uint64_t b) {
				return a % b;
				}