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clang/include/clang/Driver/Options.td
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| Show First 20 Lines • Show All 3,640 Lines • ▼ Show 20 Lines | def mcmodel_EQ_medlow : Flag<["-"], "mcmodel=medlow">, Group<m_Group>, | ||||
| Flags<[CC1Option]>, Alias<mcmodel_EQ>, AliasArgs<["small"]>, | Flags<[CC1Option]>, Alias<mcmodel_EQ>, AliasArgs<["small"]>, | ||||
| HelpText<"Equivalent to -mcmodel=small, compatible with RISC-V gcc.">; | HelpText<"Equivalent to -mcmodel=small, compatible with RISC-V gcc.">; | ||||
| def mcmodel_EQ_medany : Flag<["-"], "mcmodel=medany">, Group<m_Group>, | def mcmodel_EQ_medany : Flag<["-"], "mcmodel=medany">, Group<m_Group>, | ||||
| Flags<[CC1Option]>, Alias<mcmodel_EQ>, AliasArgs<["medium"]>, | Flags<[CC1Option]>, Alias<mcmodel_EQ>, AliasArgs<["medium"]>, | ||||
| HelpText<"Equivalent to -mcmodel=medium, compatible with RISC-V gcc.">; | HelpText<"Equivalent to -mcmodel=medium, compatible with RISC-V gcc.">; | ||||
| def menable_experimental_extensions : Flag<["-"], "menable-experimental-extensions">, Group<m_Group>, | def menable_experimental_extensions : Flag<["-"], "menable-experimental-extensions">, Group<m_Group>, | ||||
| HelpText<"Enable use of experimental RISC-V extensions.">; | HelpText<"Enable use of experimental RISC-V extensions.">; | ||||
| def mrvv_vector_bits_EQ : Joined<["-"], "mrvv-vector-bits=">, Group<m_Group>, | def mrvv_vector_bits_EQ : Joined<["-"], "mrvv-vector-bits=">, Group<m_Group>, | ||||
| HelpText<"Specify the size in bits of an RVV vector register. Defaults to the" | HelpText<"Specify the size in bits of an RVV vector register. Defaults to " | ||||
| " vector length agnostic value of \"scalable\". Also accepts \"zvl\"" | "the vector length agnostic value of \"scalable\". Accepts power of " | ||||
| " to use the value implied by -march/-mcpu (RISC-V only)">; | "2 values between 64 and 65536. Also accepts \"zvl\" " | ||||
| "to use the value implied by -march/-mcpu. Value will be reflected " | |||||
| "in __riscv_v_fixed_vlen preprocessor define (RISC-V only)">; | |||||
| def munaligned_access : Flag<["-"], "munaligned-access">, Group<m_arm_Features_Group>, | def munaligned_access : Flag<["-"], "munaligned-access">, Group<m_arm_Features_Group>, | ||||
| HelpText<"Allow memory accesses to be unaligned (AArch32/AArch64 only)">; | HelpText<"Allow memory accesses to be unaligned (AArch32/AArch64 only)">; | ||||
| def mno_unaligned_access : Flag<["-"], "mno-unaligned-access">, Group<m_arm_Features_Group>, | def mno_unaligned_access : Flag<["-"], "mno-unaligned-access">, Group<m_arm_Features_Group>, | ||||
| HelpText<"Force all memory accesses to be aligned (AArch32/AArch64 only)">; | HelpText<"Force all memory accesses to be aligned (AArch32/AArch64 only)">; | ||||
| def mstrict_align : Flag<["-"], "mstrict-align">, Alias<mno_unaligned_access>, Flags<[CC1Option,HelpHidden]>, | def mstrict_align : Flag<["-"], "mstrict-align">, Alias<mno_unaligned_access>, Flags<[CC1Option,HelpHidden]>, | ||||
| HelpText<"Force all memory accesses to be aligned (same as mno-unaligned-access)">; | HelpText<"Force all memory accesses to be aligned (same as mno-unaligned-access)">; | ||||
| def mno_thumb : Flag<["-"], "mno-thumb">, Group<m_arm_Features_Group>; | def mno_thumb : Flag<["-"], "mno-thumb">, Group<m_arm_Features_Group>; | ||||
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