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llvm/test/Transforms/Coroutines/coro-split-musttail-ppc64le.ll
; Tests that some target (e.g. ppc) can support tail call under condition. | ; Tests that some target (e.g. ppc) can support tail call under condition. | ||||
; RUN: opt < %s -passes='cgscc(coro-split),simplifycfg,early-cse' -S \ | ; RUN: opt < %s -passes='cgscc(coro-split),simplifycfg,early-cse' -S \ | ||||
; RUN: -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr9 | FileCheck %s | ; RUN: -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr9 | FileCheck %s | ||||
; RUN: opt < %s -passes='cgscc(coro-split),simplifycfg,early-cse' -S \ | ; RUN: opt < %s -passes='cgscc(coro-split),simplifycfg,early-cse' -S \ | ||||
; RUN: -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr10 --code-model=medium \ | ; RUN: -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr10 --code-model=medium \ | ||||
; RUN: | FileCheck %s --check-prefix=CHECK-PCREL | ; RUN: | FileCheck %s | ||||
; RUN: opt < %s -passes='cgscc(coro-split),simplifycfg,early-cse' -S \ | |||||
; RUN: -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr10 --code-model=medium -mattr=+longcall \ | |||||
; RUN: | FileCheck %s | |||||
; RUN: opt < %s -passes='cgscc(coro-split),simplifycfg,early-cse' -S \ | |||||
; RUN: -mtriple=ppc32-- | FileCheck %s | |||||
define void @f() #0 { | define void @f() #0 { | ||||
shchenz: nit: `ppc32--` and `powerpc--` should both be for PPC arch (32 bit, BE), I think just one line… | |||||
entry: | entry: | ||||
Why asserts is required? I don't see checks of debug logs? shchenz: Why `asserts` is required? I don't see checks of debug logs? | |||||
Good catch. Thank you! tingwang: Good catch. Thank you! | |||||
%id = call token @llvm.coro.id(i32 0, ptr null, ptr null, ptr null) | %id = call token @llvm.coro.id(i32 0, ptr null, ptr null, ptr null) | ||||
%alloc = call ptr @malloc(i64 16) #3 | %alloc = call ptr @malloc(i64 16) #3 | ||||
%vFrame = call noalias nonnull ptr @llvm.coro.begin(token %id, ptr %alloc) | %vFrame = call noalias nonnull ptr @llvm.coro.begin(token %id, ptr %alloc) | ||||
%save = call token @llvm.coro.save(ptr null) | %save = call token @llvm.coro.save(ptr null) | ||||
%addr1 = call ptr @llvm.coro.subfn.addr(ptr null, i8 0) | %addr1 = call ptr @llvm.coro.subfn.addr(ptr null, i8 0) | ||||
call fastcc void %addr1(ptr null) | call fastcc void %addr1(ptr null) | ||||
Show All 22 Lines | |||||
; CHECK: %[[addr1:.+]] = call ptr @llvm.coro.subfn.addr(ptr null, i8 0) | ; CHECK: %[[addr1:.+]] = call ptr @llvm.coro.subfn.addr(ptr null, i8 0) | ||||
; CHECK-NOT: musttail call fastcc void %[[addr1]](ptr null) | ; CHECK-NOT: musttail call fastcc void %[[addr1]](ptr null) | ||||
; Verify that ppc target not using PC-Relative addressing in the resume part resume call is not marked with musttail. | ; Verify that ppc target not using PC-Relative addressing in the resume part resume call is not marked with musttail. | ||||
; CHECK-LABEL: @f.resume( | ; CHECK-LABEL: @f.resume( | ||||
; CHECK: %[[addr2:.+]] = call ptr @llvm.coro.subfn.addr(ptr null, i8 0) | ; CHECK: %[[addr2:.+]] = call ptr @llvm.coro.subfn.addr(ptr null, i8 0) | ||||
; CHECK-NEXT: call fastcc void %[[addr2]](ptr null) | ; CHECK-NEXT: call fastcc void %[[addr2]](ptr null) | ||||
; Verify that ppc target using PC-Relative addressing in the resume part resume call is marked with musttail. | |||||
; CHECK-PCREL-LABEL: @f.resume( | |||||
; CHECK-PCREL: %[[addr2:.+]] = call ptr @llvm.coro.subfn.addr(ptr null, i8 0) | |||||
; CHECK-PCREL-NEXT: musttail call fastcc void %[[addr2]](ptr null) | |||||
; CHECK-PCREL-NEXT: ret void | |||||
declare token @llvm.coro.id(i32, ptr readnone, ptr nocapture readonly, ptr) #1 | declare token @llvm.coro.id(i32, ptr readnone, ptr nocapture readonly, ptr) #1 | ||||
declare i1 @llvm.coro.alloc(token) #2 | declare i1 @llvm.coro.alloc(token) #2 | ||||
declare i64 @llvm.coro.size.i64() #3 | declare i64 @llvm.coro.size.i64() #3 | ||||
declare ptr @llvm.coro.begin(token, ptr writeonly) #2 | declare ptr @llvm.coro.begin(token, ptr writeonly) #2 | ||||
declare token @llvm.coro.save(ptr) #2 | declare token @llvm.coro.save(ptr) #2 | ||||
declare ptr @llvm.coro.frame() #3 | declare ptr @llvm.coro.frame() #3 | ||||
declare i8 @llvm.coro.suspend(token, i1) #2 | declare i8 @llvm.coro.suspend(token, i1) #2 | ||||
declare ptr @llvm.coro.free(token, ptr nocapture readonly) #1 | declare ptr @llvm.coro.free(token, ptr nocapture readonly) #1 | ||||
declare i1 @llvm.coro.end(ptr, i1) #2 | declare i1 @llvm.coro.end(ptr, i1) #2 | ||||
declare ptr @llvm.coro.subfn.addr(ptr nocapture readonly, i8) #1 | declare ptr @llvm.coro.subfn.addr(ptr nocapture readonly, i8) #1 | ||||
declare ptr @malloc(i64) | declare ptr @malloc(i64) | ||||
attributes #0 = { presplitcoroutine } | attributes #0 = { presplitcoroutine } | ||||
attributes #1 = { argmemonly nounwind readonly } | attributes #1 = { argmemonly nounwind readonly } | ||||
attributes #2 = { nounwind } | attributes #2 = { nounwind } | ||||
attributes #3 = { nounwind readnone } | attributes #3 = { nounwind readnone } |
nit: ppc32-- and powerpc-- should both be for PPC arch (32 bit, BE), I think just one line is needed.