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llvm/trunk/lib/Target/PowerPC/PPCScheduleP8.td
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// P8 has an 8 insn dispatch group (6 non-branch, 2 branch) and can issue up | // P8 has an 8 insn dispatch group (6 non-branch, 2 branch) and can issue up | ||||
// to 10 insns per cycle (2-LU, 2-LSU, 2-FXU, 2-FPU, 1-CRU, 1-BRU). | // to 10 insns per cycle (2-LU, 2-LSU, 2-FXU, 2-FPU, 1-CRU, 1-BRU). | ||||
def P8Model : SchedMachineModel { | def P8Model : SchedMachineModel { | ||||
let IssueWidth = 8; // up to 8 instructions dispatched per cycle. | let IssueWidth = 8; // up to 8 instructions dispatched per cycle. | ||||
// up to six non-branch instructions. | // up to six non-branch instructions. | ||||
// up to two branches in a dispatch group. | // up to two branches in a dispatch group. | ||||
let MinLatency = 0; // Out-of-order dispatch. | |||||
let LoadLatency = 3; // Optimistic load latency assuming bypass. | let LoadLatency = 3; // Optimistic load latency assuming bypass. | ||||
// This is overriden by OperandCycles if the | // This is overriden by OperandCycles if the | ||||
// Itineraries are queried instead. | // Itineraries are queried instead. | ||||
let MispredictPenalty = 16; | let MispredictPenalty = 16; | ||||
// Try to make sure we have at least 10 dispatch groups in a loop. | // Try to make sure we have at least 10 dispatch groups in a loop. | ||||
let LoopMicroOpBufferSize = 60; | let LoopMicroOpBufferSize = 60; | ||||
let CompleteModel = 0; | let CompleteModel = 0; | ||||
let Itineraries = P8Itineraries; | let Itineraries = P8Itineraries; | ||||
} | } | ||||