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llvm/lib/Target/AMDGPU/SIInstrInfo.h
Show First 20 Lines • Show All 835 Lines • ▼ Show 20 Lines | public: | ||||
} | } | ||||
/// \p returns true if \p UseMO is substituted with \p DefMO in \p MI it would | /// \p returns true if \p UseMO is substituted with \p DefMO in \p MI it would | ||||
/// be an inline immediate. | /// be an inline immediate. | ||||
bool isInlineConstant(const MachineInstr &MI, | bool isInlineConstant(const MachineInstr &MI, | ||||
const MachineOperand &UseMO, | const MachineOperand &UseMO, | ||||
const MachineOperand &DefMO) const { | const MachineOperand &DefMO) const { | ||||
assert(UseMO.getParent() == &MI); | assert(UseMO.getParent() == &MI); | ||||
int OpIdx = MI.getOperandNo(&UseMO); | int OpIdx = UseMO.getOperandNo(); | ||||
if (OpIdx >= MI.getDesc().NumOperands) | if (OpIdx >= MI.getDesc().NumOperands) | ||||
return false; | return false; | ||||
return isInlineConstant(DefMO, MI.getDesc().operands()[OpIdx]); | return isInlineConstant(DefMO, MI.getDesc().operands()[OpIdx]); | ||||
} | } | ||||
/// \p returns true if the operand \p OpIdx in \p MI is a valid inline | /// \p returns true if the operand \p OpIdx in \p MI is a valid inline | ||||
/// immediate. | /// immediate. | ||||
Show All 15 Lines | if (MI.isCopy()) { | ||||
AMDGPU::OPERAND_REG_IMM_INT64 : AMDGPU::OPERAND_REG_IMM_INT32; | AMDGPU::OPERAND_REG_IMM_INT64 : AMDGPU::OPERAND_REG_IMM_INT32; | ||||
return isInlineConstant(MO, OpType); | return isInlineConstant(MO, OpType); | ||||
} | } | ||||
return isInlineConstant(MO, MI.getDesc().operands()[OpIdx].OperandType); | return isInlineConstant(MO, MI.getDesc().operands()[OpIdx].OperandType); | ||||
} | } | ||||
bool isInlineConstant(const MachineOperand &MO) const { | bool isInlineConstant(const MachineOperand &MO) const { | ||||
const MachineInstr *Parent = MO.getParent(); | return isInlineConstant(*MO.getParent(), MO.getOperandNo()); | ||||
return isInlineConstant(*Parent, Parent->getOperandNo(&MO)); | |||||
} | } | ||||
bool isImmOperandLegal(const MachineInstr &MI, unsigned OpNo, | bool isImmOperandLegal(const MachineInstr &MI, unsigned OpNo, | ||||
const MachineOperand &MO) const; | const MachineOperand &MO) const; | ||||
/// Return true if this 64-bit VALU instruction has a 32-bit encoding. | /// Return true if this 64-bit VALU instruction has a 32-bit encoding. | ||||
/// This function will return false if you pass it a 32-bit instruction. | /// This function will return false if you pass it a 32-bit instruction. | ||||
bool hasVALU32BitEncoding(unsigned Opcode) const; | bool hasVALU32BitEncoding(unsigned Opcode) const; | ||||
▲ Show 20 Lines • Show All 464 Lines • Show Last 20 Lines |