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llvm/lib/Target/AMDGPU/AMDGPUInsertDelayAlu.cpp
| Show First 20 Lines • Show All 374 Lines • ▼ Show 20 Lines | for (auto &MI : MBB.instrs()) { | ||||
| LastDelayAlu = emitDelayAlu(MI, Delay, LastDelayAlu); | LastDelayAlu = emitDelayAlu(MI, Delay, LastDelayAlu); | ||||
| } | } | ||||
| } | } | ||||
| if (Type != OTHER) { | if (Type != OTHER) { | ||||
| // TODO: Scan implicit defs too? | // TODO: Scan implicit defs too? | ||||
| for (const auto &Op : MI.defs()) { | for (const auto &Op : MI.defs()) { | ||||
| unsigned Latency = SchedModel.computeOperandLatency( | unsigned Latency = SchedModel.computeOperandLatency( | ||||
| &MI, MI.getOperandNo(&Op), nullptr, 0); | &MI, Op.getOperandNo(), nullptr, 0); | ||||
| for (MCRegUnitIterator UI(Op.getReg(), TRI); UI.isValid(); ++UI) | for (MCRegUnitIterator UI(Op.getReg(), TRI); UI.isValid(); ++UI) | ||||
| State[*UI] = DelayInfo(Type, Latency); | State[*UI] = DelayInfo(Type, Latency); | ||||
| } | } | ||||
| } | } | ||||
| // Advance by the number of cycles it takes to issue this instruction. | // Advance by the number of cycles it takes to issue this instruction. | ||||
| // TODO: Use a more advanced model that accounts for instructions that | // TODO: Use a more advanced model that accounts for instructions that | ||||
| // take multiple cycles to issue on a particular pipeline. | // take multiple cycles to issue on a particular pipeline. | ||||
| ▲ Show 20 Lines • Show All 66 Lines • Show Last 20 Lines | |||||