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clang/test/OpenMP/parallel_for_codegen.cpp
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| Show First 20 Lines • Show All 1,285 Lines • ▼ Show 20 Lines | |||||
| // CHECK1-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] | // CHECK1-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] | ||||
| // CHECK1: omp.inner.for.cond.cleanup: | // CHECK1: omp.inner.for.cond.cleanup: | ||||
| // CHECK1-NEXT: br label [[OMP_INNER_FOR_END:%.*]] | // CHECK1-NEXT: br label [[OMP_INNER_FOR_END:%.*]] | ||||
| // CHECK1: omp.inner.for.body: | // CHECK1: omp.inner.for.body: | ||||
| // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 | // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 | ||||
| // CHECK1-NEXT: [[MUL:%.*]] = mul i32 [[TMP12]], 127 | // CHECK1-NEXT: [[MUL:%.*]] = mul i32 [[TMP12]], 127 | ||||
| // CHECK1-NEXT: [[ADD:%.*]] = add i32 131071, [[MUL]] | // CHECK1-NEXT: [[ADD:%.*]] = add i32 131071, [[MUL]] | ||||
| // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 | // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 | ||||
| // CHECK1-NEXT: [[CALL:%.*]] = invoke noundef i32 @_Z3foov() | // CHECK1-NEXT: [[CALL:%.*]] = call unwindabort noundef i32 @_Z3foov() | ||||
| // CHECK1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] | |||||
| // CHECK1: invoke.cont: | |||||
| // CHECK1-NEXT: [[CONV:%.*]] = sitofp i32 [[CALL]] to float | // CHECK1-NEXT: [[CONV:%.*]] = sitofp i32 [[CALL]] to float | ||||
| // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4 | // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4 | ||||
| // CHECK1-NEXT: [[IDXPROM:%.*]] = zext i32 [[TMP13]] to i64 | // CHECK1-NEXT: [[IDXPROM:%.*]] = zext i32 [[TMP13]] to i64 | ||||
| // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[VLA1]], i64 [[IDXPROM]] | // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[VLA1]], i64 [[IDXPROM]] | ||||
| // CHECK1-NEXT: [[TMP14:%.*]] = load float, ptr [[ARRAYIDX]], align 4 | // CHECK1-NEXT: [[TMP14:%.*]] = load float, ptr [[ARRAYIDX]], align 4 | ||||
| // CHECK1-NEXT: [[ADD4:%.*]] = fadd float [[CONV]], [[TMP14]] | // CHECK1-NEXT: [[ADD4:%.*]] = fadd float [[CONV]], [[TMP14]] | ||||
| // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[N_ADDR]], align 4 | // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[N_ADDR]], align 4 | ||||
| // CHECK1-NEXT: [[CONV5:%.*]] = sitofp i32 [[TMP15]] to float | // CHECK1-NEXT: [[CONV5:%.*]] = sitofp i32 [[TMP15]] to float | ||||
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| // CHECK1-NEXT: [[ADD12:%.*]] = add i32 [[TMP22]], [[TMP23]] | // CHECK1-NEXT: [[ADD12:%.*]] = add i32 [[TMP22]], [[TMP23]] | ||||
| // CHECK1-NEXT: store i32 [[ADD12]], ptr [[DOTOMP_UB]], align 4 | // CHECK1-NEXT: store i32 [[ADD12]], ptr [[DOTOMP_UB]], align 4 | ||||
| // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] | // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] | ||||
| // CHECK1: omp.dispatch.end: | // CHECK1: omp.dispatch.end: | ||||
| // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]]) | // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]]) | ||||
| // CHECK1-NEXT: [[TMP24:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8 | // CHECK1-NEXT: [[TMP24:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8 | ||||
| // CHECK1-NEXT: call void @llvm.stackrestore(ptr [[TMP24]]) | // CHECK1-NEXT: call void @llvm.stackrestore(ptr [[TMP24]]) | ||||
| // CHECK1-NEXT: ret void | // CHECK1-NEXT: ret void | ||||
| // CHECK1: terminate.lpad: | |||||
| // CHECK1-NEXT: [[TMP25:%.*]] = landingpad { ptr, i32 } | |||||
| // CHECK1-NEXT: catch ptr null | |||||
| // CHECK1-NEXT: [[TMP26:%.*]] = extractvalue { ptr, i32 } [[TMP25]], 0 | |||||
| // CHECK1-NEXT: call void @__clang_call_terminate(ptr [[TMP26]]) #[[ATTR7:[0-9]+]] | |||||
| // CHECK1-NEXT: unreachable | |||||
| // | |||||
| // | |||||
| // CHECK1-LABEL: define {{[^@]+}}@__clang_call_terminate | |||||
| // CHECK1-SAME: (ptr noundef [[TMP0:%.*]]) #[[ATTR6:[0-9]+]] comdat { | |||||
| // CHECK1-NEXT: [[TMP2:%.*]] = call ptr @__cxa_begin_catch(ptr [[TMP0]]) #[[ATTR2:[0-9]+]] | |||||
| // CHECK1-NEXT: call void @_ZSt9terminatev() #[[ATTR7]] | |||||
| // CHECK1-NEXT: unreachable | |||||
| // | // | ||||
| // | // | ||||
| // CHECK2-LABEL: define {{[^@]+}}@_Z17with_var_schedulev | // CHECK2-LABEL: define {{[^@]+}}@_Z17with_var_schedulev | ||||
| // CHECK2-SAME: () #[[ATTR0:[0-9]+]] { | // CHECK2-SAME: () #[[ATTR0:[0-9]+]] { | ||||
| // CHECK2-NEXT: entry: | // CHECK2-NEXT: entry: | ||||
| // CHECK2-NEXT: [[A:%.*]] = alloca double, align 8 | // CHECK2-NEXT: [[A:%.*]] = alloca double, align 8 | ||||
| // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 | // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 | ||||
| // CHECK2-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 | // CHECK2-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 | ||||
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| // CHECK2-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] | // CHECK2-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] | ||||
| // CHECK2: omp.inner.for.cond.cleanup: | // CHECK2: omp.inner.for.cond.cleanup: | ||||
| // CHECK2-NEXT: br label [[OMP_INNER_FOR_END:%.*]] | // CHECK2-NEXT: br label [[OMP_INNER_FOR_END:%.*]] | ||||
| // CHECK2: omp.inner.for.body: | // CHECK2: omp.inner.for.body: | ||||
| // CHECK2-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 | // CHECK2-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 | ||||
| // CHECK2-NEXT: [[MUL:%.*]] = mul i32 [[TMP12]], 127 | // CHECK2-NEXT: [[MUL:%.*]] = mul i32 [[TMP12]], 127 | ||||
| // CHECK2-NEXT: [[ADD:%.*]] = add i32 131071, [[MUL]] | // CHECK2-NEXT: [[ADD:%.*]] = add i32 131071, [[MUL]] | ||||
| // CHECK2-NEXT: store i32 [[ADD]], ptr [[I]], align 4 | // CHECK2-NEXT: store i32 [[ADD]], ptr [[I]], align 4 | ||||
| // CHECK2-NEXT: [[CALL:%.*]] = invoke noundef i32 @_Z3foov() | // CHECK2-NEXT: [[CALL:%.*]] = call unwindabort noundef i32 @_Z3foov() | ||||
| // CHECK2-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] | |||||
| // CHECK2: invoke.cont: | |||||
| // CHECK2-NEXT: [[CONV:%.*]] = sitofp i32 [[CALL]] to float | // CHECK2-NEXT: [[CONV:%.*]] = sitofp i32 [[CALL]] to float | ||||
| // CHECK2-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4 | // CHECK2-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4 | ||||
| // CHECK2-NEXT: [[IDXPROM:%.*]] = zext i32 [[TMP13]] to i64 | // CHECK2-NEXT: [[IDXPROM:%.*]] = zext i32 [[TMP13]] to i64 | ||||
| // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[VLA1]], i64 [[IDXPROM]] | // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[VLA1]], i64 [[IDXPROM]] | ||||
| // CHECK2-NEXT: [[TMP14:%.*]] = load float, ptr [[ARRAYIDX]], align 4 | // CHECK2-NEXT: [[TMP14:%.*]] = load float, ptr [[ARRAYIDX]], align 4 | ||||
| // CHECK2-NEXT: [[ADD4:%.*]] = fadd float [[CONV]], [[TMP14]] | // CHECK2-NEXT: [[ADD4:%.*]] = fadd float [[CONV]], [[TMP14]] | ||||
| // CHECK2-NEXT: [[TMP15:%.*]] = load i32, ptr [[N_ADDR]], align 4 | // CHECK2-NEXT: [[TMP15:%.*]] = load i32, ptr [[N_ADDR]], align 4 | ||||
| // CHECK2-NEXT: [[CONV5:%.*]] = sitofp i32 [[TMP15]] to float | // CHECK2-NEXT: [[CONV5:%.*]] = sitofp i32 [[TMP15]] to float | ||||
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| // CHECK2-NEXT: [[ADD12:%.*]] = add i32 [[TMP22]], [[TMP23]] | // CHECK2-NEXT: [[ADD12:%.*]] = add i32 [[TMP22]], [[TMP23]] | ||||
| // CHECK2-NEXT: store i32 [[ADD12]], ptr [[DOTOMP_UB]], align 4 | // CHECK2-NEXT: store i32 [[ADD12]], ptr [[DOTOMP_UB]], align 4 | ||||
| // CHECK2-NEXT: br label [[OMP_DISPATCH_COND]] | // CHECK2-NEXT: br label [[OMP_DISPATCH_COND]] | ||||
| // CHECK2: omp.dispatch.end: | // CHECK2: omp.dispatch.end: | ||||
| // CHECK2-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]]) | // CHECK2-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]]) | ||||
| // CHECK2-NEXT: [[TMP24:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8 | // CHECK2-NEXT: [[TMP24:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8 | ||||
| // CHECK2-NEXT: call void @llvm.stackrestore(ptr [[TMP24]]) | // CHECK2-NEXT: call void @llvm.stackrestore(ptr [[TMP24]]) | ||||
| // CHECK2-NEXT: ret void | // CHECK2-NEXT: ret void | ||||
| // CHECK2: terminate.lpad: | |||||
| // CHECK2-NEXT: [[TMP25:%.*]] = landingpad { ptr, i32 } | |||||
| // CHECK2-NEXT: catch ptr null | |||||
| // CHECK2-NEXT: [[TMP26:%.*]] = extractvalue { ptr, i32 } [[TMP25]], 0 | |||||
| // CHECK2-NEXT: call void @__clang_call_terminate(ptr [[TMP26]]) #[[ATTR7:[0-9]+]] | |||||
| // CHECK2-NEXT: unreachable | |||||
| // | |||||
| // | |||||
| // CHECK2-LABEL: define {{[^@]+}}@__clang_call_terminate | |||||
| // CHECK2-SAME: (ptr noundef [[TMP0:%.*]]) #[[ATTR6:[0-9]+]] comdat { | |||||
| // CHECK2-NEXT: [[TMP2:%.*]] = call ptr @__cxa_begin_catch(ptr [[TMP0]]) #[[ATTR2:[0-9]+]] | |||||
| // CHECK2-NEXT: call void @_ZSt9terminatev() #[[ATTR7]] | |||||
| // CHECK2-NEXT: unreachable | |||||
| // | // | ||||
| // | // | ||||
| // CHECK5-LABEL: define {{[^@]+}}@_Z17with_var_schedulev | // CHECK5-LABEL: define {{[^@]+}}@_Z17with_var_schedulev | ||||
| // CHECK5-SAME: () #[[ATTR0:[0-9]+]] !dbg [[DBG6:![0-9]+]] { | // CHECK5-SAME: () #[[ATTR0:[0-9]+]] !dbg [[DBG6:![0-9]+]] { | ||||
| // CHECK5-NEXT: entry: | // CHECK5-NEXT: entry: | ||||
| // CHECK5-NEXT: [[A:%.*]] = alloca double, align 8 | // CHECK5-NEXT: [[A:%.*]] = alloca double, align 8 | ||||
| // CHECK5-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 | // CHECK5-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 | ||||
| // CHECK5-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 | // CHECK5-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 | ||||
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| // CHECK5-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]], !dbg [[DBG109]] | // CHECK5-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]], !dbg [[DBG109]] | ||||
| // CHECK5: omp.inner.for.cond.cleanup: | // CHECK5: omp.inner.for.cond.cleanup: | ||||
| // CHECK5-NEXT: br label [[OMP_INNER_FOR_END:%.*]], !dbg [[DBG109]] | // CHECK5-NEXT: br label [[OMP_INNER_FOR_END:%.*]], !dbg [[DBG109]] | ||||
| // CHECK5: omp.inner.for.body: | // CHECK5: omp.inner.for.body: | ||||
| // CHECK5-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !dbg [[DBG110]] | // CHECK5-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !dbg [[DBG110]] | ||||
| // CHECK5-NEXT: [[MUL:%.*]] = mul i32 [[TMP12]], 127, !dbg [[DBG110]] | // CHECK5-NEXT: [[MUL:%.*]] = mul i32 [[TMP12]], 127, !dbg [[DBG110]] | ||||
| // CHECK5-NEXT: [[ADD:%.*]] = add i32 131071, [[MUL]], !dbg [[DBG110]] | // CHECK5-NEXT: [[ADD:%.*]] = add i32 131071, [[MUL]], !dbg [[DBG110]] | ||||
| // CHECK5-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !dbg [[DBG110]] | // CHECK5-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !dbg [[DBG110]] | ||||
| // CHECK5-NEXT: [[CALL:%.*]] = invoke noundef i32 @_Z3foov() | // CHECK5-NEXT: [[CALL:%.*]] = call unwindabort noundef i32 @_Z3foov(), !dbg [[DBG111:![0-9]+]] | ||||
| // CHECK5-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !dbg [[DBG111:![0-9]+]] | |||||
| // CHECK5: invoke.cont: | |||||
| // CHECK5-NEXT: [[CONV:%.*]] = sitofp i32 [[CALL]] to float, !dbg [[DBG111]] | // CHECK5-NEXT: [[CONV:%.*]] = sitofp i32 [[CALL]] to float, !dbg [[DBG111]] | ||||
| // CHECK5-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4, !dbg [[DBG111]] | // CHECK5-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4, !dbg [[DBG111]] | ||||
| // CHECK5-NEXT: [[IDXPROM:%.*]] = zext i32 [[TMP13]] to i64, !dbg [[DBG111]] | // CHECK5-NEXT: [[IDXPROM:%.*]] = zext i32 [[TMP13]] to i64, !dbg [[DBG111]] | ||||
| // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[VLA1]], i64 [[IDXPROM]], !dbg [[DBG111]] | // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[VLA1]], i64 [[IDXPROM]], !dbg [[DBG111]] | ||||
| // CHECK5-NEXT: [[TMP14:%.*]] = load float, ptr [[ARRAYIDX]], align 4, !dbg [[DBG111]] | // CHECK5-NEXT: [[TMP14:%.*]] = load float, ptr [[ARRAYIDX]], align 4, !dbg [[DBG111]] | ||||
| // CHECK5-NEXT: [[ADD4:%.*]] = fadd float [[CONV]], [[TMP14]], !dbg [[DBG111]] | // CHECK5-NEXT: [[ADD4:%.*]] = fadd float [[CONV]], [[TMP14]], !dbg [[DBG111]] | ||||
| // CHECK5-NEXT: [[TMP15:%.*]] = load i32, ptr [[N_ADDR]], align 4, !dbg [[DBG111]] | // CHECK5-NEXT: [[TMP15:%.*]] = load i32, ptr [[N_ADDR]], align 4, !dbg [[DBG111]] | ||||
| // CHECK5-NEXT: [[CONV5:%.*]] = sitofp i32 [[TMP15]] to float, !dbg [[DBG111]] | // CHECK5-NEXT: [[CONV5:%.*]] = sitofp i32 [[TMP15]] to float, !dbg [[DBG111]] | ||||
| Show All 25 Lines | |||||
| // CHECK5-NEXT: [[ADD12:%.*]] = add i32 [[TMP22]], [[TMP23]], !dbg [[DBG110]] | // CHECK5-NEXT: [[ADD12:%.*]] = add i32 [[TMP22]], [[TMP23]], !dbg [[DBG110]] | ||||
| // CHECK5-NEXT: store i32 [[ADD12]], ptr [[DOTOMP_UB]], align 4, !dbg [[DBG110]] | // CHECK5-NEXT: store i32 [[ADD12]], ptr [[DOTOMP_UB]], align 4, !dbg [[DBG110]] | ||||
| // CHECK5-NEXT: br label [[OMP_DISPATCH_COND]], !dbg [[DBG109]], !llvm.loop [[LOOP113:![0-9]+]] | // CHECK5-NEXT: br label [[OMP_DISPATCH_COND]], !dbg [[DBG109]], !llvm.loop [[LOOP113:![0-9]+]] | ||||
| // CHECK5: omp.dispatch.end: | // CHECK5: omp.dispatch.end: | ||||
| // CHECK5-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB31:[0-9]+]], i32 [[TMP4]]), !dbg [[DBG109]] | // CHECK5-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB31:[0-9]+]], i32 [[TMP4]]), !dbg [[DBG109]] | ||||
| // CHECK5-NEXT: [[TMP24:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8, !dbg [[DBG109]] | // CHECK5-NEXT: [[TMP24:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8, !dbg [[DBG109]] | ||||
| // CHECK5-NEXT: call void @llvm.stackrestore(ptr [[TMP24]]), !dbg [[DBG109]] | // CHECK5-NEXT: call void @llvm.stackrestore(ptr [[TMP24]]), !dbg [[DBG109]] | ||||
| // CHECK5-NEXT: ret void, !dbg [[DBG111]] | // CHECK5-NEXT: ret void, !dbg [[DBG111]] | ||||
| // CHECK5: terminate.lpad: | |||||
| // CHECK5-NEXT: [[TMP25:%.*]] = landingpad { ptr, i32 } | |||||
| // CHECK5-NEXT: catch ptr null, !dbg [[DBG111]] | |||||
| // CHECK5-NEXT: [[TMP26:%.*]] = extractvalue { ptr, i32 } [[TMP25]], 0, !dbg [[DBG111]] | |||||
| // CHECK5-NEXT: call void @__clang_call_terminate(ptr [[TMP26]]) #[[ATTR7:[0-9]+]], !dbg [[DBG111]] | |||||
| // CHECK5-NEXT: unreachable, !dbg [[DBG111]] | |||||
| // | |||||
| // | |||||
| // CHECK5-LABEL: define {{[^@]+}}@__clang_call_terminate | |||||
| // CHECK5-SAME: (ptr noundef [[TMP0:%.*]]) #[[ATTR6:[0-9]+]] { | |||||
| // CHECK5-NEXT: [[TMP2:%.*]] = call ptr @__cxa_begin_catch(ptr [[TMP0]]) #[[ATTR2:[0-9]+]] | |||||
| // CHECK5-NEXT: call void @_ZSt9terminatev() #[[ATTR7]] | |||||
| // CHECK5-NEXT: unreachable | |||||
| // | // | ||||
| // | // | ||||
| // CHECK6-LABEL: define {{[^@]+}}@_Z17with_var_schedulev | // CHECK6-LABEL: define {{[^@]+}}@_Z17with_var_schedulev | ||||
| // CHECK6-SAME: () #[[ATTR0:[0-9]+]] { | // CHECK6-SAME: () #[[ATTR0:[0-9]+]] { | ||||
| // CHECK6-NEXT: entry: | // CHECK6-NEXT: entry: | ||||
| // CHECK6-NEXT: [[A:%.*]] = alloca double, align 8 | // CHECK6-NEXT: [[A:%.*]] = alloca double, align 8 | ||||
| // CHECK6-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 | // CHECK6-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 | ||||
| // CHECK6-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 | // CHECK6-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 | ||||
| ▲ Show 20 Lines • Show All 1,515 Lines • Show Last 20 Lines | |||||