Please use GitHub pull requests for new patches. Avoid migrating existing patches. Phabricator shutdown timeline
Changeset View
Changeset View
Standalone View
Standalone View
clang/test/OpenMP/for_simd_codegen.cpp
Show First 20 Lines • Show All 121 Lines • ▼ Show 20 Lines | // CHECK: call void @__kmpc_barrier(%struct.ident_t* {{.+}}, i32 %{{.+}}) | ||||
int lin = 12; | int lin = 12; | ||||
#pragma omp for simd linear(lin : get_val()), linear(g_ptr) | #pragma omp for simd linear(lin : get_val()), linear(g_ptr) | ||||
// Init linear private var. | // Init linear private var. | ||||
// CHECK: store i32 12, i32* [[LIN_VAR:%[^,]+]] | // CHECK: store i32 12, i32* [[LIN_VAR:%[^,]+]] | ||||
// CHECK: [[LIN_LOAD:%.+]] = load i32, i32* [[LIN_VAR]] | // CHECK: [[LIN_LOAD:%.+]] = load i32, i32* [[LIN_VAR]] | ||||
// CHECK-NEXT: store i32 [[LIN_LOAD]], i32* [[LIN_START:%[^,]+]] | // CHECK-NEXT: store i32 [[LIN_LOAD]], i32* [[LIN_START:%[^,]+]] | ||||
// Remember linear step. | // Remember linear step. | ||||
// CHECK: [[CALL_VAL:%.+]] = invoke | // CHECK: [[CALL_VAL:%.+]] = call unwindabort | ||||
// CHECK: store i64 [[CALL_VAL]], i64* [[LIN_STEP:%[^,]+]] | // CHECK: store i64 [[CALL_VAL]], i64* [[LIN_STEP:%[^,]+]] | ||||
// CHECK: [[GLIN_LOAD:%.+]] = load double*, double** [[GLIN_VAR:@[^,]+]] | // CHECK: [[GLIN_LOAD:%.+]] = load double*, double** [[GLIN_VAR:@[^,]+]] | ||||
// CHECK-NEXT: store double* [[GLIN_LOAD]], double** [[GLIN_START:%[^,]+]] | // CHECK-NEXT: store double* [[GLIN_LOAD]], double** [[GLIN_START:%[^,]+]] | ||||
// CHECK: call void @__kmpc_for_static_init_8u(%struct.ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i64* [[LB:%[^,]+]], i64* [[UB:%[^,]+]], i64* [[STRIDE:%[^,]+]], i64 1, i64 1) | // CHECK: call void @__kmpc_for_static_init_8u(%struct.ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i64* [[LB:%[^,]+]], i64* [[UB:%[^,]+]], i64* [[STRIDE:%[^,]+]], i64 1, i64 1) | ||||
// CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]], | // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]], | ||||
// CHECK: [[CMP:%.+]] = icmp ugt i64 [[UB_VAL]], 3 | // CHECK: [[CMP:%.+]] = icmp ugt i64 [[UB_VAL]], 3 | ||||
▲ Show 20 Lines • Show All 380 Lines • ▼ Show 20 Lines | public: | ||||
///~IterDouble() {} | ///~IterDouble() {} | ||||
}; | }; | ||||
// CHECK-LABEL: define {{.*void}} @{{.*}}iter_simple{{.*}} | // CHECK-LABEL: define {{.*void}} @{{.*}}iter_simple{{.*}} | ||||
void iter_simple(IterDouble ia, IterDouble ib, IterDouble ic) { | void iter_simple(IterDouble ia, IterDouble ib, IterDouble ic) { | ||||
// | // | ||||
// Calculate number of iterations before the loop body. | // Calculate number of iterations before the loop body. | ||||
// CHECK: [[DIFF1:%.+]] = invoke {{.*}}i32 @{{.*}}IterDouble{{.*}} | // CHECK: [[DIFF1:%.+]] = call unwindabort {{.*}}i32 @{{.*}}IterDouble{{.*}} | ||||
// CHECK: [[DIFF2:%.+]] = sub nsw i32 [[DIFF1]], 1 | // CHECK: [[DIFF2:%.+]] = sub nsw i32 [[DIFF1]], 1 | ||||
// CHECK-NEXT: [[DIFF3:%.+]] = add nsw i32 [[DIFF2]], 1 | // CHECK-NEXT: [[DIFF3:%.+]] = add nsw i32 [[DIFF2]], 1 | ||||
// CHECK-NEXT: [[DIFF4:%.+]] = sdiv i32 [[DIFF3]], 1 | // CHECK-NEXT: [[DIFF4:%.+]] = sdiv i32 [[DIFF3]], 1 | ||||
// CHECK-NEXT: [[DIFF5:%.+]] = sub nsw i32 [[DIFF4]], 1 | // CHECK-NEXT: [[DIFF5:%.+]] = sub nsw i32 [[DIFF4]], 1 | ||||
// CHECK-NEXT: store i32 [[DIFF5]], i32* [[OMP_LAST_IT:%[^,]+]]{{.+}} | // CHECK-NEXT: store i32 [[DIFF5]], i32* [[OMP_LAST_IT:%[^,]+]]{{.+}} | ||||
#pragma omp for simd | #pragma omp for simd | ||||
// CHECK: call void @__kmpc_for_static_init_4(%struct.ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i32* [[LB:%[^,]+]], i32* [[UB:%[^,]+]], i32* [[STRIDE:%[^,]+]], i32 1, i32 1) | // CHECK: call void @__kmpc_for_static_init_4(%struct.ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i32* [[LB:%[^,]+]], i32* [[UB:%[^,]+]], i32* [[STRIDE:%[^,]+]], i32 1, i32 1) | ||||
Show All 17 Lines | |||||
// CHECK-NEXT: [[UB_VAL:%.+]] = load i32, i32* [[UB]] | // CHECK-NEXT: [[UB_VAL:%.+]] = load i32, i32* [[UB]] | ||||
// CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB_VAL]] | // CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB_VAL]] | ||||
// CHECK-NEXT: br i1 [[CMP]], label %[[IT_BODY:[^,]+]], label %[[IT_END:[^,]+]] | // CHECK-NEXT: br i1 [[CMP]], label %[[IT_BODY:[^,]+]], label %[[IT_END:[^,]+]] | ||||
for (IterDouble i = ia; i < ib; ++i) { | for (IterDouble i = ia; i < ib; ++i) { | ||||
// CHECK: [[IT_BODY]]: | // CHECK: [[IT_BODY]]: | ||||
// Start of body: calculate i from index: | // Start of body: calculate i from index: | ||||
// CHECK: [[IV1:%.+]] = load i32, i32* [[IT_OMP_IV]] | // CHECK: [[IV1:%.+]] = load i32, i32* [[IT_OMP_IV]] | ||||
// Call of operator+ (i, IV). | // Call of operator+ (i, IV). | ||||
// CHECK: {{%.+}} = invoke {{.+}} @{{.*}}IterDouble{{.*}} | // CHECK: {{%.+}} = call unwindabort {{.+}} @{{.*}}IterDouble{{.*}} | ||||
// ... loop body ... | // ... loop body ... | ||||
*i = *ic * 0.5; | *i = *ic * 0.5; | ||||
// Float multiply and save result. | // Float multiply and save result. | ||||
// CHECK: [[MULR:%.+]] = fmul double {{%.+}}, 5.000000e-01 | // CHECK: [[MULR:%.+]] = fmul double {{%.+}}, 5.000000e-01 | ||||
// CHECK-NEXT: invoke {{.+}} @{{.*}}IterDouble{{.*}} | // CHECK-NEXT: call unwindabort {{.+}} @{{.*}}IterDouble{{.*}} | ||||
// CHECK: store double [[MULR:%.+]], double* [[RESULT_ADDR:%.+]] | // CHECK: store double [[MULR:%.+]], double* [[RESULT_ADDR:%.+]] | ||||
++ic; | ++ic; | ||||
// | // | ||||
// CHECK: [[IV2:%.+]] = load i32, i32* [[IT_OMP_IV]] | // CHECK: [[IV2:%.+]] = load i32, i32* [[IT_OMP_IV]] | ||||
// CHECK-NEXT: [[ADD2:%.+]] = add nsw i32 [[IV2]], 1 | // CHECK-NEXT: [[ADD2:%.+]] = add nsw i32 [[IV2]], 1 | ||||
// CHECK-NEXT: store i32 [[ADD2]], i32* [[IT_OMP_IV]] | // CHECK-NEXT: store i32 [[ADD2]], i32* [[IT_OMP_IV]] | ||||
// br label %{{.*}}, !llvm.loop ![[ITER_LOOP_ID]] | // br label %{{.*}}, !llvm.loop ![[ITER_LOOP_ID]] | ||||
} | } | ||||
▲ Show 20 Lines • Show All 211 Lines • ▼ Show 20 Lines | |||||
// TERM_DEBUG-LABEL: bar | // TERM_DEBUG-LABEL: bar | ||||
int bar() { extern void mayThrow(); mayThrow(); return 0; }; | int bar() { extern void mayThrow(); mayThrow(); return 0; }; | ||||
// TERM_DEBUG-LABEL: parallel_simd | // TERM_DEBUG-LABEL: parallel_simd | ||||
void parallel_simd(float *a) { | void parallel_simd(float *a) { | ||||
#pragma omp parallel | #pragma omp parallel | ||||
#pragma omp for simd | #pragma omp for simd | ||||
// TERM_DEBUG-NOT: __kmpc_global_thread_num | // TERM_DEBUG-NOT: __kmpc_global_thread_num | ||||
// TERM_DEBUG: invoke noundef i32 {{.*}}bar{{.*}}() | // TERM_DEBUG: call unwindabort noundef i32 {{.*}}bar{{.*}}() | ||||
// TERM_DEBUG: unwind label %[[TERM_LPAD:[a-zA-Z0-9\.]+]], | |||||
// TERM_DEBUG-NOT: __kmpc_global_thread_num | // TERM_DEBUG-NOT: __kmpc_global_thread_num | ||||
// TERM_DEBUG: [[TERM_LPAD]] | |||||
// TERM_DEBUG: call void @__clang_call_terminate | |||||
// TERM_DEBUG: unreachable | |||||
for (unsigned i = 131071; i <= 2147483647; i += 127) | for (unsigned i = 131071; i <= 2147483647; i += 127) | ||||
a[i] += bar(); | a[i] += bar(); | ||||
} | } | ||||
// TERM_DEBUG: !{{[0-9]+}} = !DILocation(line: [[@LINE-11]], | // TERM_DEBUG: !{{[0-9]+}} = !DILocation(line: [[@LINE-7]], | ||||
// TERM_DEBUG-NOT: line: 0, | // TERM_DEBUG-NOT: line: 0, | ||||
// OMP45-NOT: !"llvm.loop.vectorize.enable", i1 false | // OMP45-NOT: !"llvm.loop.vectorize.enable", i1 false | ||||
// CHECK-DAG: ![[SIMD_LOOP]] = distinct !{![[SIMD_LOOP]], {{.*}}![[VECT_LOOP:[^,]+]]} | // CHECK-DAG: ![[SIMD_LOOP]] = distinct !{![[SIMD_LOOP]], {{.*}}![[VECT_LOOP:[^,]+]]} | ||||
// CHECK-DAG: ![[VECT_LOOP]] = !{!"llvm.loop.vectorize.enable", i1 true} | // CHECK-DAG: ![[VECT_LOOP]] = !{!"llvm.loop.vectorize.enable", i1 true} | ||||
// OMP45-NOT: !"llvm.loop.vectorize.enable", i1 false | // OMP45-NOT: !"llvm.loop.vectorize.enable", i1 false | ||||
// OMP50-DAG: ![[NOSIMD_LOOP]] = distinct !{![[NOSIMD_LOOP]], {{.*}}![[NOVECT_LOOP:[^,]+]]} | // OMP50-DAG: ![[NOSIMD_LOOP]] = distinct !{![[NOSIMD_LOOP]], {{.*}}![[NOVECT_LOOP:[^,]+]]} | ||||
// OMP50-DAG: ![[NOVECT_LOOP]] = !{!"llvm.loop.vectorize.enable", i1 false} | // OMP50-DAG: ![[NOVECT_LOOP]] = !{!"llvm.loop.vectorize.enable", i1 false} | ||||
#endif // HEADER | #endif // HEADER |