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llvm/lib/Target/RISCV/RISCVISelLowering.cpp
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| Show First 20 Lines • Show All 608 Lines • ▼ Show 20 Lines | for (MVT VT : IntVecVTs) { | ||||
| Legal); | Legal); | ||||
| setOperationAction({ISD::ROTL, ISD::ROTR}, VT, Expand); | setOperationAction({ISD::ROTL, ISD::ROTR}, VT, Expand); | ||||
| setOperationAction({ISD::CTTZ, ISD::CTLZ, ISD::CTPOP}, VT, Expand); | setOperationAction({ISD::CTTZ, ISD::CTLZ, ISD::CTPOP}, VT, Expand); | ||||
| setOperationAction(ISD::BSWAP, VT, Expand); | setOperationAction(ISD::BSWAP, VT, Expand); | ||||
| setOperationAction(ISD::VP_BSWAP, VT, Expand); | setOperationAction(ISD::VP_BSWAP, VT, Expand); | ||||
| setOperationAction({ISD::VP_FSHL, ISD::VP_FSHR}, VT, Expand); | |||||
| // Custom-lower extensions and truncations from/to mask types. | // Custom-lower extensions and truncations from/to mask types. | ||||
| setOperationAction({ISD::ANY_EXTEND, ISD::SIGN_EXTEND, ISD::ZERO_EXTEND}, | setOperationAction({ISD::ANY_EXTEND, ISD::SIGN_EXTEND, ISD::ZERO_EXTEND}, | ||||
| VT, Custom); | VT, Custom); | ||||
| // RVV has native int->float & float->int conversions where the | // RVV has native int->float & float->int conversions where the | ||||
| // element type sizes are within one power-of-two of each other. Any | // element type sizes are within one power-of-two of each other. Any | ||||
| // wider distances between type sizes have to be lowered as sequences | // wider distances between type sizes have to be lowered as sequences | ||||
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