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Differential D136263 Diff 480389 llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect-vp.ll

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llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect-vp.ll

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define <256 x i8> @select_v256i8(<256 x i1> %a, <256 x i8> %b, <256 x i8> %c, i32 zeroext %evl) { define <256 x i8> @select_v256i8(<256 x i1> %a, <256 x i8> %b, <256 x i8> %c, i32 zeroext %evl) {
; CHECK-LABEL: select_v256i8: ; CHECK-LABEL: select_v256i8:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: addi sp, sp, -16 ; CHECK-NEXT: addi sp, sp, -16
; CHECK-NEXT: .cfi_def_cfa_offset 16 ; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: csrr a2, vlenb ; CHECK-NEXT: csrr a2, vlenb
; CHECK-NEXT: slli a2, a2, 3 ; CHECK-NEXT: slli a2, a2, 3
; CHECK-NEXT: sub sp, sp, a2 ; CHECK-NEXT: sub sp, sp, a2
; CHECK-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb
; CHECK-NEXT: addi a2, sp, 16 ; CHECK-NEXT: addi a2, sp, 16
; CHECK-NEXT: vs8r.v v16, (a2) # Unknown-size Folded Spill ; CHECK-NEXT: vs8r.v v16, (a2) # Unknown-size Folded Spill
; CHECK-NEXT: vmv1r.v v2, v8 ; CHECK-NEXT: vmv1r.v v2, v8
; CHECK-NEXT: vmv1r.v v1, v0 ; CHECK-NEXT: vmv1r.v v1, v0
; CHECK-NEXT: li a2, 128 ; CHECK-NEXT: li a2, 128
; CHECK-NEXT: vsetvli zero, a2, e8, m8, ta, ma ; CHECK-NEXT: vsetvli zero, a2, e8, m8, ta, ma
; CHECK-NEXT: vle8.v v24, (a0) ; CHECK-NEXT: vle8.v v24, (a0)
; CHECK-NEXT: addi a0, a1, 128 ; CHECK-NEXT: addi a0, a1, 128
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; CHECK-LABEL: select_evl_v256i8: ; CHECK-LABEL: select_evl_v256i8:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: addi sp, sp, -16 ; CHECK-NEXT: addi sp, sp, -16
; CHECK-NEXT: .cfi_def_cfa_offset 16 ; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: csrr a2, vlenb ; CHECK-NEXT: csrr a2, vlenb
; CHECK-NEXT: li a3, 24 ; CHECK-NEXT: li a3, 24
; CHECK-NEXT: mul a2, a2, a3 ; CHECK-NEXT: mul a2, a2, a3
; CHECK-NEXT: sub sp, sp, a2 ; CHECK-NEXT: sub sp, sp, a2
; CHECK-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x18, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 24 * vlenb
; CHECK-NEXT: li a2, 128 ; CHECK-NEXT: li a2, 128
; CHECK-NEXT: vsetvli zero, a2, e8, m8, ta, ma ; CHECK-NEXT: vsetvli zero, a2, e8, m8, ta, ma
; CHECK-NEXT: vle8.v v24, (a0) ; CHECK-NEXT: vle8.v v24, (a0)
; CHECK-NEXT: csrr a0, vlenb ; CHECK-NEXT: csrr a0, vlenb
; CHECK-NEXT: slli a0, a0, 3 ; CHECK-NEXT: slli a0, a0, 3
; CHECK-NEXT: add a0, sp, a0 ; CHECK-NEXT: add a0, sp, a0
; CHECK-NEXT: addi a0, a0, 16 ; CHECK-NEXT: addi a0, a0, 16
; CHECK-NEXT: vs8r.v v24, (a0) # Unknown-size Folded Spill ; CHECK-NEXT: vs8r.v v24, (a0) # Unknown-size Folded Spill
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define <32 x i64> @select_v32i64(<32 x i1> %a, <32 x i64> %b, <32 x i64> %c, i32 zeroext %evl) { define <32 x i64> @select_v32i64(<32 x i1> %a, <32 x i64> %b, <32 x i64> %c, i32 zeroext %evl) {
; CHECK-LABEL: select_v32i64: ; CHECK-LABEL: select_v32i64:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: addi sp, sp, -16 ; CHECK-NEXT: addi sp, sp, -16
; CHECK-NEXT: .cfi_def_cfa_offset 16 ; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: csrr a1, vlenb ; CHECK-NEXT: csrr a1, vlenb
; CHECK-NEXT: slli a1, a1, 4 ; CHECK-NEXT: slli a1, a1, 4
; CHECK-NEXT: sub sp, sp, a1 ; CHECK-NEXT: sub sp, sp, a1
; CHECK-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x10, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 16 * vlenb
; CHECK-NEXT: csrr a1, vlenb ; CHECK-NEXT: csrr a1, vlenb
; CHECK-NEXT: slli a1, a1, 3 ; CHECK-NEXT: slli a1, a1, 3
; CHECK-NEXT: add a1, sp, a1 ; CHECK-NEXT: add a1, sp, a1
; CHECK-NEXT: addi a1, a1, 16 ; CHECK-NEXT: addi a1, a1, 16
; CHECK-NEXT: vs8r.v v8, (a1) # Unknown-size Folded Spill ; CHECK-NEXT: vs8r.v v8, (a1) # Unknown-size Folded Spill
; CHECK-NEXT: vmv1r.v v24, v0 ; CHECK-NEXT: vmv1r.v v24, v0
; CHECK-NEXT: addi a1, a2, -16 ; CHECK-NEXT: addi a1, a2, -16
; CHECK-NEXT: sltu a3, a2, a1 ; CHECK-NEXT: sltu a3, a2, a1
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define <64 x float> @select_v64f32(<64 x i1> %a, <64 x float> %b, <64 x float> %c, i32 zeroext %evl) { define <64 x float> @select_v64f32(<64 x i1> %a, <64 x float> %b, <64 x float> %c, i32 zeroext %evl) {
; CHECK-LABEL: select_v64f32: ; CHECK-LABEL: select_v64f32:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: addi sp, sp, -16 ; CHECK-NEXT: addi sp, sp, -16
; CHECK-NEXT: .cfi_def_cfa_offset 16 ; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: csrr a1, vlenb ; CHECK-NEXT: csrr a1, vlenb
; CHECK-NEXT: slli a1, a1, 4 ; CHECK-NEXT: slli a1, a1, 4
; CHECK-NEXT: sub sp, sp, a1 ; CHECK-NEXT: sub sp, sp, a1
; CHECK-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x10, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 16 * vlenb
; CHECK-NEXT: csrr a1, vlenb ; CHECK-NEXT: csrr a1, vlenb
; CHECK-NEXT: slli a1, a1, 3 ; CHECK-NEXT: slli a1, a1, 3
; CHECK-NEXT: add a1, sp, a1 ; CHECK-NEXT: add a1, sp, a1
; CHECK-NEXT: addi a1, a1, 16 ; CHECK-NEXT: addi a1, a1, 16
; CHECK-NEXT: vs8r.v v8, (a1) # Unknown-size Folded Spill ; CHECK-NEXT: vs8r.v v8, (a1) # Unknown-size Folded Spill
; CHECK-NEXT: vmv1r.v v24, v0 ; CHECK-NEXT: vmv1r.v v24, v0
; CHECK-NEXT: addi a1, a2, -32 ; CHECK-NEXT: addi a1, a2, -32
; CHECK-NEXT: sltu a3, a2, a1 ; CHECK-NEXT: sltu a3, a2, a1
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