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llvm/test/CodeGen/RISCV/rvv/bitreverse-sdnode.ll
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define <vscale x 8 x i64> @bitreverse_nxv8i64(<vscale x 8 x i64> %va) { | define <vscale x 8 x i64> @bitreverse_nxv8i64(<vscale x 8 x i64> %va) { | ||||
; RV32-LABEL: bitreverse_nxv8i64: | ; RV32-LABEL: bitreverse_nxv8i64: | ||||
; RV32: # %bb.0: | ; RV32: # %bb.0: | ||||
; RV32-NEXT: addi sp, sp, -16 | ; RV32-NEXT: addi sp, sp, -16 | ||||
; RV32-NEXT: .cfi_def_cfa_offset 16 | ; RV32-NEXT: .cfi_def_cfa_offset 16 | ||||
; RV32-NEXT: csrr a0, vlenb | ; RV32-NEXT: csrr a0, vlenb | ||||
; RV32-NEXT: slli a0, a0, 3 | ; RV32-NEXT: slli a0, a0, 3 | ||||
; RV32-NEXT: sub sp, sp, a0 | ; RV32-NEXT: sub sp, sp, a0 | ||||
; RV32-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb | |||||
; RV32-NEXT: sw zero, 12(sp) | ; RV32-NEXT: sw zero, 12(sp) | ||||
; RV32-NEXT: lui a0, 1044480 | ; RV32-NEXT: lui a0, 1044480 | ||||
; RV32-NEXT: sw a0, 8(sp) | ; RV32-NEXT: sw a0, 8(sp) | ||||
; RV32-NEXT: lui a0, 61681 | ; RV32-NEXT: lui a0, 61681 | ||||
; RV32-NEXT: addi a0, a0, -241 | ; RV32-NEXT: addi a0, a0, -241 | ||||
; RV32-NEXT: sw a0, 12(sp) | ; RV32-NEXT: sw a0, 12(sp) | ||||
; RV32-NEXT: sw a0, 8(sp) | ; RV32-NEXT: sw a0, 8(sp) | ||||
; RV32-NEXT: lui a0, 209715 | ; RV32-NEXT: lui a0, 209715 | ||||
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