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llvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp32_elts.ll
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| ; CHECK-P9-NEXT: mtvsrd v2, r3 | ; CHECK-P9-NEXT: mtvsrd v2, r3 | ||||
| ; CHECK-P9-NEXT: xxlxor v3, v3, v3 | ; CHECK-P9-NEXT: xxlxor v3, v3, v3 | ||||
| ; CHECK-P9-NEXT: vmrghh v2, v3, v2 | ; CHECK-P9-NEXT: vmrghh v2, v3, v2 | ||||
| ; CHECK-P9-NEXT: xvcvuxwsp v2, v2 | ; CHECK-P9-NEXT: xvcvuxwsp v2, v2 | ||||
| ; CHECK-P9-NEXT: blr | ; CHECK-P9-NEXT: blr | ||||
| ; | ; | ||||
| ; CHECK-BE-LABEL: test4elt: | ; CHECK-BE-LABEL: test4elt: | ||||
| ; CHECK-BE: # %bb.0: # %entry | ; CHECK-BE: # %bb.0: # %entry | ||||
| ; CHECK-BE-NEXT: mtfprd f1, r3 | ; CHECK-BE-NEXT: mtfprd f0, r3 | ||||
| ; CHECK-BE-NEXT: addis r3, r2, .LCPI1_0@toc@ha | ; CHECK-BE-NEXT: addis r3, r2, .LCPI1_0@toc@ha | ||||
| ; CHECK-BE-NEXT: xxlxor vs0, vs0, vs0 | ; CHECK-BE-NEXT: xxlxor vs2, vs2, vs2 | ||||
| ; CHECK-BE-NEXT: addi r3, r3, .LCPI1_0@toc@l | ; CHECK-BE-NEXT: addi r3, r3, .LCPI1_0@toc@l | ||||
| ; CHECK-BE-NEXT: lxv vs2, 0(r3) | ; CHECK-BE-NEXT: lxv vs1, 0(r3) | ||||
| ; CHECK-BE-NEXT: xxperm vs1, vs0, vs2 | ; CHECK-BE-NEXT: xxperm vs0, vs2, vs1 | ||||
| ; CHECK-BE-NEXT: xvcvuxwsp v2, vs1 | ; CHECK-BE-NEXT: xvcvuxwsp v2, vs0 | ||||
| ; CHECK-BE-NEXT: blr | ; CHECK-BE-NEXT: blr | ||||
| entry: | entry: | ||||
| %0 = bitcast i64 %a.coerce to <4 x i16> | %0 = bitcast i64 %a.coerce to <4 x i16> | ||||
| %1 = uitofp <4 x i16> %0 to <4 x float> | %1 = uitofp <4 x i16> %0 to <4 x float> | ||||
| ret <4 x float> %1 | ret <4 x float> %1 | ||||
| } | } | ||||
| define void @test8elt(ptr noalias nocapture sret(<8 x float>) %agg.result, <8 x i16> %a) local_unnamed_addr #2 { | define void @test8elt(ptr noalias nocapture sret(<8 x float>) %agg.result, <8 x i16> %a) local_unnamed_addr #2 { | ||||
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