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Differential D138736 Diff 478716 llvm/test/CodeGen/PowerPC/build-vector-tests.ll

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llvm/test/CodeGen/PowerPC/build-vector-tests.ll

Show First 20 Lines • Show All 1,052 Lines • ▼ Show 20 Lines
; P8BE-NEXT: addi r3, r3, -12 ; P8BE-NEXT: addi r3, r3, -12
; P8BE-NEXT: lxvw4x v3, 0, r4 ; P8BE-NEXT: lxvw4x v3, 0, r4
; P8BE-NEXT: lxvw4x v2, 0, r3 ; P8BE-NEXT: lxvw4x v2, 0, r3
; P8BE-NEXT: vperm v2, v2, v2, v3 ; P8BE-NEXT: vperm v2, v2, v2, v3
; P8BE-NEXT: blr ; P8BE-NEXT: blr
; ;
; P8LE-LABEL: fromDiffMemVarDi: ; P8LE-LABEL: fromDiffMemVarDi:
; P8LE: # %bb.0: # %entry ; P8LE: # %bb.0: # %entry
; P8LE-NEXT: addis r5, r2, .LCPI9_0@toc@ha
; P8LE-NEXT: sldi r4, r4, 2 ; P8LE-NEXT: sldi r4, r4, 2
; P8LE-NEXT: addi r5, r5, .LCPI9_0@toc@l ; P8LE-NEXT: addis r5, r2, .LCPI9_0@toc@ha
; P8LE-NEXT: add r3, r3, r4 ; P8LE-NEXT: add r3, r3, r4
; P8LE-NEXT: lxvd2x vs0, 0, r5 ; P8LE-NEXT: addi r4, r5, .LCPI9_0@toc@l
; P8LE-NEXT: addi r3, r3, -12 ; P8LE-NEXT: addi r3, r3, -12
; P8LE-NEXT: lxvd2x v2, 0, r3 ; P8LE-NEXT: lxvd2x vs1, 0, r4
; P8LE-NEXT: xxswapd v3, vs0 ; P8LE-NEXT: lxvd2x vs0, 0, r3
; P8LE-NEXT: xxswapd v3, vs1
; P8LE-NEXT: xxswapd v2, vs0
; P8LE-NEXT: vperm v2, v2, v2, v3 ; P8LE-NEXT: vperm v2, v2, v2, v3
; P8LE-NEXT: blr ; P8LE-NEXT: blr
entry: entry:
%idxprom = sext i32 %elem to i64 %idxprom = sext i32 %elem to i64
%arrayidx = getelementptr inbounds i32, ptr %arr, i64 %idxprom %arrayidx = getelementptr inbounds i32, ptr %arr, i64 %idxprom
%0 = load i32, ptr %arrayidx, align 4 %0 = load i32, ptr %arrayidx, align 4
%vecinit = insertelement <4 x i32> undef, i32 %0, i32 0 %vecinit = insertelement <4 x i32> undef, i32 %0, i32 0
%sub = add nsw i32 %elem, -1 %sub = add nsw i32 %elem, -1
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; P8BE-NEXT: lxvw4x v3, 0, r4 ; P8BE-NEXT: lxvw4x v3, 0, r4
; P8BE-NEXT: vperm v2, v2, v2, v3 ; P8BE-NEXT: vperm v2, v2, v2, v3
; P8BE-NEXT: xvcvspsxws v2, v2 ; P8BE-NEXT: xvcvspsxws v2, v2
; P8BE-NEXT: blr ; P8BE-NEXT: blr
; ;
; P8LE-LABEL: fromDiffMemConsDConvftoi: ; P8LE-LABEL: fromDiffMemConsDConvftoi:
; P8LE: # %bb.0: # %entry ; P8LE: # %bb.0: # %entry
; P8LE-NEXT: addis r4, r2, .LCPI18_0@toc@ha ; P8LE-NEXT: addis r4, r2, .LCPI18_0@toc@ha
; P8LE-NEXT: lxvd2x v2, 0, r3 ; P8LE-NEXT: lxvd2x vs0, 0, r3
; P8LE-NEXT: addi r4, r4, .LCPI18_0@toc@l ; P8LE-NEXT: addi r4, r4, .LCPI18_0@toc@l
; P8LE-NEXT: lxvd2x vs0, 0, r4 ; P8LE-NEXT: lxvd2x vs1, 0, r4
; P8LE-NEXT: xxswapd v3, vs0 ; P8LE-NEXT: xxswapd v2, vs0
; P8LE-NEXT: xxswapd v3, vs1
; P8LE-NEXT: vperm v2, v2, v2, v3 ; P8LE-NEXT: vperm v2, v2, v2, v3
; P8LE-NEXT: xvcvspsxws v2, v2 ; P8LE-NEXT: xvcvspsxws v2, v2
; P8LE-NEXT: blr ; P8LE-NEXT: blr
entry: entry:
%arrayidx = getelementptr inbounds float, ptr %ptr, i64 3 %arrayidx = getelementptr inbounds float, ptr %ptr, i64 3
%0 = load float, ptr %arrayidx, align 4 %0 = load float, ptr %arrayidx, align 4
%conv = fptosi float %0 to i32 %conv = fptosi float %0 to i32
%vecinit = insertelement <4 x i32> undef, i32 %conv, i32 0 %vecinit = insertelement <4 x i32> undef, i32 %conv, i32 0
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; P8BE-NEXT: addi r3, r3, -12 ; P8BE-NEXT: addi r3, r3, -12
; P8BE-NEXT: lxvw4x v3, 0, r4 ; P8BE-NEXT: lxvw4x v3, 0, r4
; P8BE-NEXT: lxvw4x v2, 0, r3 ; P8BE-NEXT: lxvw4x v2, 0, r3
; P8BE-NEXT: vperm v2, v2, v2, v3 ; P8BE-NEXT: vperm v2, v2, v2, v3
; P8BE-NEXT: blr ; P8BE-NEXT: blr
; ;
; P8LE-LABEL: fromDiffMemVarDui: ; P8LE-LABEL: fromDiffMemVarDui:
; P8LE: # %bb.0: # %entry ; P8LE: # %bb.0: # %entry
; P8LE-NEXT: addis r5, r2, .LCPI41_0@toc@ha
; P8LE-NEXT: sldi r4, r4, 2 ; P8LE-NEXT: sldi r4, r4, 2
; P8LE-NEXT: addi r5, r5, .LCPI41_0@toc@l ; P8LE-NEXT: addis r5, r2, .LCPI41_0@toc@ha
; P8LE-NEXT: add r3, r3, r4 ; P8LE-NEXT: add r3, r3, r4
; P8LE-NEXT: lxvd2x vs0, 0, r5 ; P8LE-NEXT: addi r4, r5, .LCPI41_0@toc@l
; P8LE-NEXT: addi r3, r3, -12 ; P8LE-NEXT: addi r3, r3, -12
; P8LE-NEXT: lxvd2x v2, 0, r3 ; P8LE-NEXT: lxvd2x vs1, 0, r4
; P8LE-NEXT: xxswapd v3, vs0 ; P8LE-NEXT: lxvd2x vs0, 0, r3
; P8LE-NEXT: xxswapd v3, vs1
; P8LE-NEXT: xxswapd v2, vs0
; P8LE-NEXT: vperm v2, v2, v2, v3 ; P8LE-NEXT: vperm v2, v2, v2, v3
; P8LE-NEXT: blr ; P8LE-NEXT: blr
entry: entry:
%idxprom = sext i32 %elem to i64 %idxprom = sext i32 %elem to i64
%arrayidx = getelementptr inbounds i32, ptr %arr, i64 %idxprom %arrayidx = getelementptr inbounds i32, ptr %arr, i64 %idxprom
%0 = load i32, ptr %arrayidx, align 4 %0 = load i32, ptr %arrayidx, align 4
%vecinit = insertelement <4 x i32> undef, i32 %0, i32 0 %vecinit = insertelement <4 x i32> undef, i32 %0, i32 0
%sub = add nsw i32 %elem, -1 %sub = add nsw i32 %elem, -1
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; P8BE-NEXT: lxvw4x v3, 0, r4 ; P8BE-NEXT: lxvw4x v3, 0, r4
; P8BE-NEXT: vperm v2, v2, v2, v3 ; P8BE-NEXT: vperm v2, v2, v2, v3
; P8BE-NEXT: xvcvspuxws v2, v2 ; P8BE-NEXT: xvcvspuxws v2, v2
; P8BE-NEXT: blr ; P8BE-NEXT: blr
; ;
; P8LE-LABEL: fromDiffMemConsDConvftoui: ; P8LE-LABEL: fromDiffMemConsDConvftoui:
; P8LE: # %bb.0: # %entry ; P8LE: # %bb.0: # %entry
; P8LE-NEXT: addis r4, r2, .LCPI50_0@toc@ha ; P8LE-NEXT: addis r4, r2, .LCPI50_0@toc@ha
; P8LE-NEXT: lxvd2x v2, 0, r3 ; P8LE-NEXT: lxvd2x vs0, 0, r3
; P8LE-NEXT: addi r4, r4, .LCPI50_0@toc@l ; P8LE-NEXT: addi r4, r4, .LCPI50_0@toc@l
; P8LE-NEXT: lxvd2x vs0, 0, r4 ; P8LE-NEXT: lxvd2x vs1, 0, r4
; P8LE-NEXT: xxswapd v3, vs0 ; P8LE-NEXT: xxswapd v2, vs0
; P8LE-NEXT: xxswapd v3, vs1
; P8LE-NEXT: vperm v2, v2, v2, v3 ; P8LE-NEXT: vperm v2, v2, v2, v3
; P8LE-NEXT: xvcvspuxws v2, v2 ; P8LE-NEXT: xvcvspuxws v2, v2
; P8LE-NEXT: blr ; P8LE-NEXT: blr
entry: entry:
%arrayidx = getelementptr inbounds float, ptr %ptr, i64 3 %arrayidx = getelementptr inbounds float, ptr %ptr, i64 3
%0 = load float, ptr %arrayidx, align 4 %0 = load float, ptr %arrayidx, align 4
%conv = fptoui float %0 to i32 %conv = fptoui float %0 to i32
%vecinit = insertelement <4 x i32> undef, i32 %conv, i32 0 %vecinit = insertelement <4 x i32> undef, i32 %conv, i32 0
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