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Differential D138809 Diff 478219 llvm/include/llvm/IR/IntrinsicsRISCV.td

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llvm/include/llvm/IR/IntrinsicsRISCV.td

Show First 20 Lines • Show All 323 Lines • ▼ Show 20 Lineslet TargetPrefix = "riscv" in {
// For destination vector type is the same as source vector. // For destination vector type is the same as source vector.
// Input: (passthru, vector_in, vl) // Input: (passthru, vector_in, vl)
class RISCVUnaryAAUnMasked class RISCVUnaryAAUnMasked
: Intrinsic<[llvm_anyvector_ty], : Intrinsic<[llvm_anyvector_ty],
[LLVMMatchType<0>, LLVMMatchType<0>, llvm_anyint_ty], [LLVMMatchType<0>, LLVMMatchType<0>, llvm_anyint_ty],
[IntrNoMem]>, RISCVVIntrinsic { [IntrNoMem]>, RISCVVIntrinsic {
let VLOperand = 2; let VLOperand = 2;
} }
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nit: destination vector type is the same as the source vector type

michaelmaitland: nit: `destination vector type is the same as the source vector type`
// For destination vector type is the same as source vector.
// Input: (passthru, vector_in, vl, policy)
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From @craig.topper's comment https://reviews.llvm.org/D138810#inline-1494421

What does P in this name mean? Is this because they use OP_P as their opcode? If so I don't think that should be part of how we name intrinsics.

Can we drop P here too and reuse RISCVUnaryAAUnMasked? After adding DefaultAttrsIntrinsic it may be the same? If not, I have two questions:

  1. Is P the most descriptive suffix to use?
  2. If so, can we at least document where P comes from?
michaelmaitland: From @craig.topper's comment https://reviews.llvm.org/D138810#inline-1494421 > What does P in…
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Yeah, I think you and Craig are right, I should change it to more descriptive name, thanks!

4vtomat: Yeah, I think you and Craig are right, I should change it to more descriptive name, thanks!
class RISCVUnaryAAUnMaskedP
: Intrinsic<[llvm_anyvector_ty],
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DefaultAttrsIntrinsic

craig.topper: DefaultAttrsIntrinsic
[LLVMMatchType<0>, LLVMMatchType<0>, llvm_anyint_ty,
LLVMMatchType<1>],
[ImmArg<ArgIndex<3>>, IntrNoMem]>, RISCVVIntrinsic {
let VLOperand = 2;
}
multiclass RISCVUnaryAAUnMaskedP<bit HasVV = 1, bit HasVS = 1> {
if HasVV then
def "int_riscv_" # NAME # "_vv" : RISCVUnaryAAUnMaskedP;
if HasVS then
def "int_riscv_" # NAME # "_vs" : RISCVUnaryAAUnMaskedP;
}
// For destination vector type is the same as first source vector (with mask). // For destination vector type is the same as first source vector (with mask).
// Input: (vector_in, vector_in, mask, vl, policy) // Input: (vector_in, vector_in, mask, vl, policy)
class RISCVUnaryAAMasked class RISCVUnaryAAMasked
: Intrinsic<[llvm_anyvector_ty], : Intrinsic<[llvm_anyvector_ty],
[LLVMMatchType<0>, LLVMMatchType<0>, [LLVMMatchType<0>, LLVMMatchType<0>,
LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>, llvm_anyint_ty, LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>, llvm_anyint_ty,
LLVMMatchType<1>], LLVMMatchType<1>],
[ImmArg<ArgIndex<4>>, IntrNoMem]>, RISCVVIntrinsic { [ImmArg<ArgIndex<4>>, IntrNoMem]>, RISCVVIntrinsic {
▲ Show 20 Lines • Show All 80 Lines • ▼ Show 20 Lineslet TargetPrefix = "riscv" in {
class RISCVBinaryAAXUnMasked class RISCVBinaryAAXUnMasked
: Intrinsic<[llvm_anyvector_ty], : Intrinsic<[llvm_anyvector_ty],
[LLVMMatchType<0>, LLVMMatchType<0>, llvm_any_ty, [LLVMMatchType<0>, LLVMMatchType<0>, llvm_any_ty,
llvm_anyint_ty], llvm_anyint_ty],
[IntrNoMem]>, RISCVVIntrinsic { [IntrNoMem]>, RISCVVIntrinsic {
let ScalarOperand = 2; let ScalarOperand = 2;
let VLOperand = 3; let VLOperand = 3;
} }
class RISCVBinaryAAXUnMaskedP
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Can you please add a docstring for this class?

michaelmaitland: Can you please add a docstring for this class?
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Sure, I just added a comment above

4vtomat: Sure, I just added a comment above
: Intrinsic<[llvm_anyvector_ty],
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DefaultAttrsIntrinsic

craig.topper: DefaultAttrsIntrinsic
[LLVMMatchType<0>, LLVMMatchType<0>, llvm_any_ty,
llvm_anyint_ty, LLVMMatchType<2>],
[ImmArg<ArgIndex<4>>, IntrNoMem]>, RISCVVIntrinsic {
let ScalarOperand = 2;
let VLOperand = 3;
}
// For destination vector type is the same as first source vector (with mask). // For destination vector type is the same as first source vector (with mask).
// Input: (maskedoff, vector_in, vector_in/scalar_in, mask, vl, policy) // Input: (maskedoff, vector_in, vector_in/scalar_in, mask, vl, policy)
class RISCVBinaryAAXMasked class RISCVBinaryAAXMasked
: Intrinsic<[llvm_anyvector_ty], : Intrinsic<[llvm_anyvector_ty],
[LLVMMatchType<0>, LLVMMatchType<0>, llvm_any_ty, [LLVMMatchType<0>, LLVMMatchType<0>, llvm_any_ty,
LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>, llvm_anyint_ty, LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>, llvm_anyint_ty,
LLVMMatchType<2>], LLVMMatchType<2>],
[ImmArg<ArgIndex<5>>, IntrNoMem]>, RISCVVIntrinsic { [ImmArg<ArgIndex<5>>, IntrNoMem]>, RISCVVIntrinsic {
▲ Show 20 Lines • Show All 1,141 Lines • ▼ Show 20 Lines
// Zksed // Zksed
def int_riscv_sm4ks : ScalarCryptoByteSelectAny; def int_riscv_sm4ks : ScalarCryptoByteSelectAny;
def int_riscv_sm4ed : ScalarCryptoByteSelectAny; def int_riscv_sm4ed : ScalarCryptoByteSelectAny;
// Zksh // Zksh
def int_riscv_sm3p0 : ScalarCryptoGprIntrinsicAny; def int_riscv_sm3p0 : ScalarCryptoGprIntrinsicAny;
def int_riscv_sm3p1 : ScalarCryptoGprIntrinsicAny; def int_riscv_sm3p1 : ScalarCryptoGprIntrinsicAny;
} // TargetPrefix = "riscv" } // TargetPrefix = "riscv"
//===----------------------------------------------------------------------===//
// Vector Cryptography
//
// These intrinsics will lower directly into the corresponding instructions
// added by the vector cyptography extension, if the extension is present.
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Capitalize the Z in extension names in comments.

craig.topper: Capitalize the Z in extension names in comments.
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Sure~

4vtomat: Sure~
let TargetPrefix = "riscv" in {
// zvkns
defm vaesdf : RISCVUnaryAAUnMaskedP;
defm vaesdm : RISCVUnaryAAUnMaskedP;
defm vaesef : RISCVUnaryAAUnMaskedP;
defm vaesem : RISCVUnaryAAUnMaskedP;
def int_riscv_vaeskf1 : RISCVBinaryAAXUnMaskedP;
def int_riscv_vaeskf2 : RISCVBinaryAAXUnMaskedP;
defm vaesz : RISCVUnaryAAUnMaskedP<0>;
// zvkb
defm vandn : RISCVBinaryAAX;
defm vbrev8 : RISCVUnaryAA;
defm vclmul : RISCVBinaryAAX;
defm vclmulh : RISCVBinaryAAX;
defm vrev8 : RISCVUnaryAA;
defm vrol : RISCVBinaryAAX;
defm vror : RISCVBinaryAAX;
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IsVS should be renamed to HasVS to match class definition. Do you need to pass HasVS since it defaults to 1?

michaelmaitland: `IsVS` should be renamed to `HasVS` to match class definition. Do you need to pass `HasVS`…
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For vgmul,
it uses the def which chooses the class instead of multiclass definition:

class RISCVUnaryAAUnMaskedP<bit IsVS>

And for the class definition, argument IsVS means: If this intrinsic is a VS intrinsic, then it will use llvm_anyvector_ty as it's 2nd input arg type and use LLVMMatchType<2> as 4th input arg type.

However for multiclass definition, argument HasVS means, If this intrinsic has VS, then define one for it.

4vtomat: For vgmul, it uses the **def** which chooses the **class** instead of **multiclass** definition…
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IsVS should be renamed to HasVS to match class definition. Do you need to pass HasVS since it defaults to 1?

4vtomat: > `IsVS` should be renamed to `HasVS` to match class definition. Do you need to pass `HasVS`…
// zvkg
def int_riscv_vghmac : RISCVBinaryAAXUnMaskedP;
// zvksed
def int_riscv_vsm4k : RISCVBinaryAAXUnMaskedP;
defm vsm4r : RISCVUnaryAAUnMaskedP<1, 0>;
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I think vaeskf1 needs something like ImmArg<ArgIndex<X>> for the immediate.

Same for any other instruction with constant arguments.

craig.topper: I think vaeskf1 needs something like `ImmArg<ArgIndex<X>>` for the immediate. Same for any…
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Oh, I forgot this part, thanks for reminding!

4vtomat: Oh, I forgot this part, thanks for reminding!
// zvksh
def int_riscv_vsm3c : RISCVBinaryAAXUnMaskedP;
def int_riscv_vsm3me : RISCVBinaryAAXUnMaskedP;
// zvknha or zvknhb
def int_riscv_vsha2ch : RISCVBinaryAAXUnMaskedP;
def int_riscv_vsha2cl : RISCVBinaryAAXUnMaskedP;
def int_riscv_vsha2ms : RISCVBinaryAAXUnMaskedP;
} // TargetPrefix = "riscv"