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Differential D130692 Diff 463563 llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

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llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

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Show First 20 Lines • Show All 18,281 Lines • ▼ Show 20 Lines if (auto Shift = DAG.getSplatValue(ShiftOp))
Add.getOperand(0), ShiftOp); Add.getOperand(0), ShiftOp);
return true; return true;
} }
} }
return false; return false;
} }
// Analyse the specified address returning true if a more optimal addressing // Analyse the specified address returning true if a more optimal addressing
paulwalker-armUnsubmitted
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I'll reserve judgement but it doesn't really seem worth breaking thus out into a separate function.

You do need to ensure N is treating Index as unsigned before you can shrink the extend. MaskedGatherScatterSDNode has a function to query this.

paulwalker-arm: I'll reserve judgement but it doesn't really seem worth breaking thus out into a separate…
// mode is available. When returning true all parameters are updated to reflect // mode is available. When returning true all parameters are updated to reflect
// their recommended values. // their recommended values.
static bool findMoreOptimalIndexType(const MaskedGatherScatterSDNode *N, static bool findMoreOptimalIndexType(const MaskedGatherScatterSDNode *N,
peterwaller-armUnsubmitted
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s/.getVectorElementType().getFixedSizeInBits()/.getScalarSizeInBits()/

peterwaller-arm: s/.getVectorElementType().getFixedSizeInBits()/.getScalarSizeInBits()/
SDValue &BasePtr, SDValue &Index, SDValue &BasePtr, SDValue &Index,
SelectionDAG &DAG) { SelectionDAG &DAG) {
// Try to iteratively fold parts of the index into the base pointer to // Try to iteratively fold parts of the index into the base pointer to
// simplify the index as much as possible. // simplify the index as much as possible.
DavidTrubyUnsubmitted
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Could you just have the following and remove one level of nesting?

if (Index.getOpcode() == ISD::ZERO_EXTEND && tryNarrowZExtGatherIndex(N, Index, DAG))
  return true;
DavidTruby: Could you just have the following and remove one level of nesting? ``` if (Index.getOpcode()…
bool Changed = false; bool Changed = false;
while (foldIndexIntoBase(BasePtr, Index, N->getScale(), SDLoc(N), DAG)) while (foldIndexIntoBase(BasePtr, Index, N->getScale(), SDLoc(N), DAG))
Changed = true; Changed = true;
// Only consider element types that are pointer sized as smaller types can // Only consider element types that are pointer sized as smaller types can
// be easily promoted. // be easily promoted.
EVT IndexVT = Index.getValueType(); EVT IndexVT = Index.getValueType();
if (IndexVT.getVectorElementType() != MVT::i64 || IndexVT == MVT::nxv2i64) if (IndexVT.getVectorElementType() != MVT::i64 || IndexVT == MVT::nxv2i64)
return Changed; return Changed;
// Can indices be trivially shrunk? // Can indices be trivially shrunk?
EVT DataVT = N->getOperand(1).getValueType();
// Don't attempt to shrink the index for fixed vectors of 64 bit data since it
// will later be re-extended to 64 bits in legalization
if (DataVT.isFixedLengthVector() && DataVT.getScalarSizeInBits() == 64)
return Changed;
if (ISD::isVectorShrinkable(Index.getNode(), 32, N->isIndexSigned())) { if (ISD::isVectorShrinkable(Index.getNode(), 32, N->isIndexSigned())) {
EVT NewIndexVT = IndexVT.changeVectorElementType(MVT::i32); EVT NewIndexVT = IndexVT.changeVectorElementType(MVT::i32);
Index = DAG.getNode(ISD::TRUNCATE, SDLoc(N), NewIndexVT, Index); Index = DAG.getNode(ISD::TRUNCATE, SDLoc(N), NewIndexVT, Index);
paulwalker-armUnsubmitted
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Please pull this out into a separate check before this block, along with a suitable comment. The "fix" is not really related to isVectorShrinkable, it is just that today that is the only logic applicable for fixed length vectors. However, this might change in the future hence why I prefer an isolated check.

paulwalker-arm: Please pull this out into a separate check before this block, along with a suitable comment.
MattDevereauAuthorUnsubmitted
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I'm not sure if I'm missing something obvious here but I don't understand what you're expecting this to look like when this check is seperated. The way this function's logic is structured means it's difficult to bail out cleanly from individual checks here, as we want to fall through this if block instead of returning false. I could use a nested if block, e.g.

//comment
if (!(DataVT.getScalarSizeInBits() == 64 && DataVT.isFixedLengthVector())){
  if (!ISD::isVectorShrinkable... ){
    ...
  }
}

To sort of separate the "temporary" condition, but I believe it still needs to be and logic for the correct behaviour here
Could you please elaborate on what you're expecting?

MattDevereau: I'm not sure if I'm missing something obvious here but I don't understand what you're expecting…
paulwalker-armUnsubmitted
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I was thinking of:

// Fixed length vectors are always "packed" so there's no value in the index having a smaller element type than the data.
if (DataVT.isFixedLengthVector() && DataVT.getScalarSizeInBits() == 64)
  return Changed;

It is my assertion that we don't want to fall through because all code after this point is trying to rewrite Index to be a vector of i32s, which is never going to be good for fixed length vector types because Index will just get re-extended during operation legalisation.

paulwalker-arm: I was thinking of: ``` // Fixed length vectors are always "packed" so there's no value in the…
return true; return true;
} }
// Match: // Match:
// Index = step(const) // Index = step(const)
int64_t Stride = 0; int64_t Stride = 0;
if (Index.getOpcode() == ISD::STEP_VECTOR) { if (Index.getOpcode() == ISD::STEP_VECTOR) {
Stride = cast<ConstantSDNode>(Index.getOperand(0))->getSExtValue(); Stride = cast<ConstantSDNode>(Index.getOperand(0))->getSExtValue();
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