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llvm/test/Transforms/SLPVectorizer/X86/PR35865-inseltpoison.ll
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py | ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py | ||||
; RUN: opt -slp-vectorizer < %s -S -o - -mtriple=x86_64-apple-macosx10.10.0 -mcpu=core2 | FileCheck %s | ; RUN: opt -slp-vectorizer < %s -S -o - -mtriple=x86_64-apple-macosx10.10.0 -mcpu=core2 | FileCheck %s | ||||
define void @_Z10fooConvertPDv4_xS0_S0_PKS_() { | define void @_Z10fooConvertPDv4_xS0_S0_PKS_() { | ||||
; CHECK-LABEL: @_Z10fooConvertPDv4_xS0_S0_PKS_( | ; CHECK-LABEL: @_Z10fooConvertPDv4_xS0_S0_PKS_( | ||||
; CHECK-NEXT: entry: | ; CHECK-NEXT: entry: | ||||
; CHECK-NEXT: [[TMP0:%.*]] = extractelement <16 x half> undef, i32 4 | ; CHECK-NEXT: [[TMP0:%.*]] = extractelement <16 x half> undef, i32 4 | ||||
; CHECK-NEXT: [[TMP1:%.*]] = extractelement <16 x half> undef, i32 5 | ; CHECK-NEXT: [[TMP1:%.*]] = extractelement <16 x half> undef, i32 5 | ||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x half> poison, half [[TMP0]], i32 0 | ; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x half> poison, half [[TMP0]], i32 0 | ||||
; CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x half> [[TMP2]], half [[TMP1]], i32 1 | ; CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x half> [[TMP2]], half [[TMP1]], i32 1 | ||||
; CHECK-NEXT: [[TMP4:%.*]] = fpext <2 x half> [[TMP3]] to <2 x float> | ; CHECK-NEXT: [[TMP4:%.*]] = fpext <2 x half> [[TMP3]] to <2 x float> | ||||
; CHECK-NEXT: [[TMP5:%.*]] = bitcast <2 x float> [[TMP4]] to <2 x i32> | ; CHECK-NEXT: [[TMP5:%.*]] = bitcast <2 x float> [[TMP4]] to <2 x i32> | ||||
; CHECK-NEXT: [[TMP6:%.*]] = shufflevector <2 x i32> [[TMP5]], <2 x i32> poison, <8 x i32> <i32 0, i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> | ; CHECK-NEXT: [[TMP6:%.*]] = shufflevector <2 x i32> [[TMP5]], <2 x i32> poison, <8 x i32> <i32 0, i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> | ||||
; CHECK-NEXT: [[VECINS_I_5_I1:%.*]] = shufflevector <8 x i32> poison, <8 x i32> [[TMP6]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 6, i32 7> | ; CHECK-NEXT: [[VECINS_I_5_I1:%.*]] = shufflevector <8 x i32> [[TMP6]], <8 x i32> poison, <8 x i32> <i32 undef, i32 undef, i32 undef, i32 undef, i32 0, i32 1, i32 undef, i32 undef> | ||||
; CHECK-NEXT: ret void | ; CHECK-NEXT: ret void | ||||
; | ; | ||||
entry: | entry: | ||||
%0 = extractelement <16 x half> undef, i32 4 | %0 = extractelement <16 x half> undef, i32 4 | ||||
%conv.i.4.i = fpext half %0 to float | %conv.i.4.i = fpext half %0 to float | ||||
%1 = bitcast float %conv.i.4.i to i32 | %1 = bitcast float %conv.i.4.i to i32 | ||||
%vecins.i.4.i = insertelement <8 x i32> poison, i32 %1, i32 4 | %vecins.i.4.i = insertelement <8 x i32> poison, i32 %1, i32 4 | ||||
%2 = extractelement <16 x half> undef, i32 5 | %2 = extractelement <16 x half> undef, i32 5 | ||||
%conv.i.5.i = fpext half %2 to float | %conv.i.5.i = fpext half %2 to float | ||||
%3 = bitcast float %conv.i.5.i to i32 | %3 = bitcast float %conv.i.5.i to i32 | ||||
%vecins.i.5.i = insertelement <8 x i32> %vecins.i.4.i, i32 %3, i32 5 | %vecins.i.5.i = insertelement <8 x i32> %vecins.i.4.i, i32 %3, i32 5 | ||||
ret void | ret void | ||||
} | } |