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Differential D132261 Diff 462899 llvm/test/Transforms/SLPVectorizer/X86/malformed_phis.ll

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llvm/test/Transforms/SLPVectorizer/X86/malformed_phis.ll

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define void @test_2(i8 addrspace(1)* %arg, i32 %arg1) #0 { define void @test_2(i8 addrspace(1)* %arg, i32 %arg1) #0 {
; CHECK-LABEL: @test_2( ; CHECK-LABEL: @test_2(
; CHECK-NEXT: bb: ; CHECK-NEXT: bb:
; CHECK-NEXT: br label [[BB2:%.*]] ; CHECK-NEXT: br label [[BB2:%.*]]
; CHECK: bb2: ; CHECK: bb2:
; CHECK-NEXT: [[TMP:%.*]] = phi i32 [ undef, [[BB:%.*]] ], [ undef, [[BB2]] ] ; CHECK-NEXT: [[TMP:%.*]] = phi i32 [ undef, [[BB:%.*]] ], [ undef, [[BB2]] ]
; CHECK-NEXT: [[TMP3:%.*]] = phi i32 [ 0, [[BB]] ], [ undef, [[BB2]] ] ; CHECK-NEXT: [[TMP3:%.*]] = phi i32 [ 0, [[BB]] ], [ undef, [[BB2]] ]
; CHECK-NEXT: [[TMP0:%.*]] = insertelement <8 x i32> poison, i32 [[TMP]], i32 0 ; CHECK-NEXT: [[TMP0:%.*]] = mul i32 [[TMP]], 8
; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <8 x i32> [[TMP0]], <8 x i32> poison, <8 x i32> zeroinitializer ; CHECK-NEXT: [[OP_RDX:%.*]] = add i32 undef, [[TMP0]]
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.vector.reduce.add.v8i32(<8 x i32> undef) ; CHECK-NEXT: call void @use(i32 [[OP_RDX]])
; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.vector.reduce.add.v8i32(<8 x i32> [[SHUFFLE]])
; CHECK-NEXT: [[OP_RDX:%.*]] = add i32 [[TMP1]], [[TMP2]]
; CHECK-NEXT: [[OP_RDX1:%.*]] = add i32 [[OP_RDX]], undef
; CHECK-NEXT: call void @use(i32 [[OP_RDX1]])
; CHECK-NEXT: br label [[BB2]] ; CHECK-NEXT: br label [[BB2]]
; ;
bb: bb:
br label %bb2 br label %bb2
bb2: ; preds = %bb2, %bb bb2: ; preds = %bb2, %bb
%tmp = phi i32 [ undef, %bb ], [ undef, %bb2 ] %tmp = phi i32 [ undef, %bb ], [ undef, %bb2 ]
%tmp3 = phi i32 [ 0, %bb ], [ undef, %bb2 ] %tmp3 = phi i32 [ 0, %bb ], [ undef, %bb2 ]
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