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llvm/test/CodeGen/WebAssembly/simd-build-vector.ll
Show First 20 Lines • Show All 184 Lines • ▼ Show 20 Lines | ; CHECK-NEXT: return $pop6 | ||||
%v0 = insertelement <8 x i16> undef, i16 %s0, i32 0 | %v0 = insertelement <8 x i16> undef, i16 %s0, i32 0 | ||||
ret <8 x i16> %v0 | ret <8 x i16> %v0 | ||||
} | } | ||||
define <4 x i32> @half_shuffle_i32x4(<4 x i32> %src) { | define <4 x i32> @half_shuffle_i32x4(<4 x i32> %src) { | ||||
; CHECK-LABEL: half_shuffle_i32x4: | ; CHECK-LABEL: half_shuffle_i32x4: | ||||
; CHECK: .functype half_shuffle_i32x4 (v128) -> (v128) | ; CHECK: .functype half_shuffle_i32x4 (v128) -> (v128) | ||||
; CHECK-NEXT: # %bb.0: | ; CHECK-NEXT: # %bb.0: | ||||
; CHECK-NEXT: i8x16.shuffle $push0=, $0, $0, 0, 0, 0, 0, 8, 9, 10, 11, 0, 1, 2, 3, 0, 0, 0, 0 | ; CHECK-NEXT: i8x16.shuffle $push0=, $0, $0, 0, 1, 2, 3, 8, 9, 10, 11, 0, 1, 2, 3, 0, 1, 2, 3 | ||||
; CHECK-NEXT: i32.const $push1=, 0 | ; CHECK-NEXT: i32.const $push1=, 0 | ||||
; CHECK-NEXT: i32x4.replace_lane $push2=, $pop0, 0, $pop1 | ; CHECK-NEXT: i32x4.replace_lane $push2=, $pop0, 0, $pop1 | ||||
; CHECK-NEXT: i32.const $push3=, 3 | ; CHECK-NEXT: i32.const $push3=, 3 | ||||
; CHECK-NEXT: i32x4.replace_lane $push4=, $pop2, 3, $pop3 | ; CHECK-NEXT: i32x4.replace_lane $push4=, $pop2, 3, $pop3 | ||||
; CHECK-NEXT: return $pop4 | ; CHECK-NEXT: return $pop4 | ||||
%s0 = extractelement <4 x i32> %src, i32 0 | %s0 = extractelement <4 x i32> %src, i32 0 | ||||
%s2 = extractelement <4 x i32> %src, i32 2 | %s2 = extractelement <4 x i32> %src, i32 2 | ||||
%v0 = insertelement <4 x i32> undef, i32 0, i32 0 | %v0 = insertelement <4 x i32> undef, i32 0, i32 0 | ||||
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