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Differential D133473 Diff 458655 llvm/test/CodeGen/WebAssembly/fpclamptosat_vec.ll

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llvm/test/CodeGen/WebAssembly/fpclamptosat_vec.ll

Show All 25 Lines
; CHECK-NEXT: local.tee 0 ; CHECK-NEXT: local.tee 0
; CHECK-NEXT: v128.const -2147483648, -2147483648 ; CHECK-NEXT: v128.const -2147483648, -2147483648
; CHECK-NEXT: local.tee 1 ; CHECK-NEXT: local.tee 1
; CHECK-NEXT: local.get 0 ; CHECK-NEXT: local.get 0
; CHECK-NEXT: local.get 1 ; CHECK-NEXT: local.get 1
; CHECK-NEXT: i64x2.gt_s ; CHECK-NEXT: i64x2.gt_s
; CHECK-NEXT: v128.bitselect ; CHECK-NEXT: v128.bitselect
; CHECK-NEXT: local.get 0 ; CHECK-NEXT: local.get 0
; CHECK-NEXT: i8x16.shuffle 0, 1, 2, 3, 8, 9, 10, 11, 0, 0, 0, 0, 0, 0, 0, 0 ; CHECK-NEXT: i8x16.shuffle 0, 1, 2, 3, 8, 9, 10, 11, 0, 1, 2, 3, 0, 1, 2, 3
; CHECK-NEXT: # fallthrough-return ; CHECK-NEXT: # fallthrough-return
entry: entry:
%conv = fptosi <2 x double> %x to <2 x i64> %conv = fptosi <2 x double> %x to <2 x i64>
%0 = icmp slt <2 x i64> %conv, <i64 2147483647, i64 2147483647> %0 = icmp slt <2 x i64> %conv, <i64 2147483647, i64 2147483647>
%spec.store.select = select <2 x i1> %0, <2 x i64> %conv, <2 x i64> <i64 2147483647, i64 2147483647> %spec.store.select = select <2 x i1> %0, <2 x i64> %conv, <2 x i64> <i64 2147483647, i64 2147483647>
%1 = icmp sgt <2 x i64> %spec.store.select, <i64 -2147483648, i64 -2147483648> %1 = icmp sgt <2 x i64> %spec.store.select, <i64 -2147483648, i64 -2147483648>
%spec.store.select7 = select <2 x i1> %1, <2 x i64> %spec.store.select, <2 x i64> <i64 -2147483648, i64 -2147483648> %spec.store.select7 = select <2 x i1> %1, <2 x i64> %spec.store.select, <2 x i64> <i64 -2147483648, i64 -2147483648>
%conv6 = trunc <2 x i64> %spec.store.select7 to <2 x i32> %conv6 = trunc <2 x i64> %spec.store.select7 to <2 x i32>
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; CHECK-NEXT: i64.const 0 ; CHECK-NEXT: i64.const 0
; CHECK-NEXT: local.get 2 ; CHECK-NEXT: local.get 2
; CHECK-NEXT: i64.const 4294967295 ; CHECK-NEXT: i64.const 4294967295
; CHECK-NEXT: i64.lt_u ; CHECK-NEXT: i64.lt_u
; CHECK-NEXT: i64.select ; CHECK-NEXT: i64.select
; CHECK-NEXT: i64x2.replace_lane 1 ; CHECK-NEXT: i64x2.replace_lane 1
; CHECK-NEXT: v128.bitselect ; CHECK-NEXT: v128.bitselect
; CHECK-NEXT: local.get 0 ; CHECK-NEXT: local.get 0
; CHECK-NEXT: i8x16.shuffle 0, 1, 2, 3, 8, 9, 10, 11, 0, 0, 0, 0, 0, 0, 0, 0 ; CHECK-NEXT: i8x16.shuffle 0, 1, 2, 3, 8, 9, 10, 11, 0, 1, 2, 3, 0, 1, 2, 3
; CHECK-NEXT: # fallthrough-return ; CHECK-NEXT: # fallthrough-return
entry: entry:
%conv = fptoui <2 x double> %x to <2 x i64> %conv = fptoui <2 x double> %x to <2 x i64>
%0 = icmp ult <2 x i64> %conv, <i64 4294967295, i64 4294967295> %0 = icmp ult <2 x i64> %conv, <i64 4294967295, i64 4294967295>
%spec.store.select = select <2 x i1> %0, <2 x i64> %conv, <2 x i64> <i64 4294967295, i64 4294967295> %spec.store.select = select <2 x i1> %0, <2 x i64> %conv, <2 x i64> <i64 4294967295, i64 4294967295>
%conv6 = trunc <2 x i64> %spec.store.select to <2 x i32> %conv6 = trunc <2 x i64> %spec.store.select to <2 x i32>
ret <2 x i32> %conv6 ret <2 x i32> %conv6
} }
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; CHECK-NEXT: local.tee 0 ; CHECK-NEXT: local.tee 0
; CHECK-NEXT: v128.const 0, 0 ; CHECK-NEXT: v128.const 0, 0
; CHECK-NEXT: local.tee 1 ; CHECK-NEXT: local.tee 1
; CHECK-NEXT: local.get 0 ; CHECK-NEXT: local.get 0
; CHECK-NEXT: local.get 1 ; CHECK-NEXT: local.get 1
; CHECK-NEXT: i64x2.gt_s ; CHECK-NEXT: i64x2.gt_s
; CHECK-NEXT: v128.bitselect ; CHECK-NEXT: v128.bitselect
; CHECK-NEXT: local.get 0 ; CHECK-NEXT: local.get 0
; CHECK-NEXT: i8x16.shuffle 0, 1, 2, 3, 8, 9, 10, 11, 0, 0, 0, 0, 0, 0, 0, 0 ; CHECK-NEXT: i8x16.shuffle 0, 1, 2, 3, 8, 9, 10, 11, 0, 1, 2, 3, 0, 1, 2, 3
; CHECK-NEXT: # fallthrough-return ; CHECK-NEXT: # fallthrough-return
entry: entry:
%conv = fptosi <2 x double> %x to <2 x i64> %conv = fptosi <2 x double> %x to <2 x i64>
%0 = icmp slt <2 x i64> %conv, <i64 4294967295, i64 4294967295> %0 = icmp slt <2 x i64> %conv, <i64 4294967295, i64 4294967295>
%spec.store.select = select <2 x i1> %0, <2 x i64> %conv, <2 x i64> <i64 4294967295, i64 4294967295> %spec.store.select = select <2 x i1> %0, <2 x i64> %conv, <2 x i64> <i64 4294967295, i64 4294967295>
%1 = icmp sgt <2 x i64> %spec.store.select, zeroinitializer %1 = icmp sgt <2 x i64> %spec.store.select, zeroinitializer
%spec.store.select7 = select <2 x i1> %1, <2 x i64> %spec.store.select, <2 x i64> zeroinitializer %spec.store.select7 = select <2 x i1> %1, <2 x i64> %spec.store.select, <2 x i64> zeroinitializer
%conv6 = trunc <2 x i64> %spec.store.select7 to <2 x i32> %conv6 = trunc <2 x i64> %spec.store.select7 to <2 x i32>
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; CHECK-NEXT: f64x2.extract_lane 1 ; CHECK-NEXT: f64x2.extract_lane 1
; CHECK-NEXT: i32.trunc_sat_f64_s ; CHECK-NEXT: i32.trunc_sat_f64_s
; CHECK-NEXT: i32x4.replace_lane 1 ; CHECK-NEXT: i32x4.replace_lane 1
; CHECK-NEXT: v128.const 32767, 32767, 0, 0 ; CHECK-NEXT: v128.const 32767, 32767, 0, 0
; CHECK-NEXT: i32x4.min_s ; CHECK-NEXT: i32x4.min_s
; CHECK-NEXT: v128.const -32768, -32768, 0, 0 ; CHECK-NEXT: v128.const -32768, -32768, 0, 0
; CHECK-NEXT: i32x4.max_s ; CHECK-NEXT: i32x4.max_s
; CHECK-NEXT: local.get 0 ; CHECK-NEXT: local.get 0
; CHECK-NEXT: i8x16.shuffle 0, 1, 4, 5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ; CHECK-NEXT: i8x16.shuffle 0, 1, 4, 5, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1
; CHECK-NEXT: # fallthrough-return ; CHECK-NEXT: # fallthrough-return
entry: entry:
%conv = fptosi <2 x double> %x to <2 x i32> %conv = fptosi <2 x double> %x to <2 x i32>
%0 = icmp slt <2 x i32> %conv, <i32 32767, i32 32767> %0 = icmp slt <2 x i32> %conv, <i32 32767, i32 32767>
%spec.store.select = select <2 x i1> %0, <2 x i32> %conv, <2 x i32> <i32 32767, i32 32767> %spec.store.select = select <2 x i1> %0, <2 x i32> %conv, <2 x i32> <i32 32767, i32 32767>
%1 = icmp sgt <2 x i32> %spec.store.select, <i32 -32768, i32 -32768> %1 = icmp sgt <2 x i32> %spec.store.select, <i32 -32768, i32 -32768>
%spec.store.select7 = select <2 x i1> %1, <2 x i32> %spec.store.select, <2 x i32> <i32 -32768, i32 -32768> %spec.store.select7 = select <2 x i1> %1, <2 x i32> %spec.store.select, <2 x i32> <i32 -32768, i32 -32768>
%conv6 = trunc <2 x i32> %spec.store.select7 to <2 x i16> %conv6 = trunc <2 x i32> %spec.store.select7 to <2 x i16>
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; CHECK-NEXT: i32x4.splat ; CHECK-NEXT: i32x4.splat
; CHECK-NEXT: local.get 0 ; CHECK-NEXT: local.get 0
; CHECK-NEXT: f64x2.extract_lane 1 ; CHECK-NEXT: f64x2.extract_lane 1
; CHECK-NEXT: i32.trunc_sat_f64_u ; CHECK-NEXT: i32.trunc_sat_f64_u
; CHECK-NEXT: i32x4.replace_lane 1 ; CHECK-NEXT: i32x4.replace_lane 1
; CHECK-NEXT: v128.const 65535, 65535, 0, 0 ; CHECK-NEXT: v128.const 65535, 65535, 0, 0
; CHECK-NEXT: i32x4.min_u ; CHECK-NEXT: i32x4.min_u
; CHECK-NEXT: local.get 0 ; CHECK-NEXT: local.get 0
; CHECK-NEXT: i8x16.shuffle 0, 1, 4, 5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ; CHECK-NEXT: i8x16.shuffle 0, 1, 4, 5, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1
; CHECK-NEXT: # fallthrough-return ; CHECK-NEXT: # fallthrough-return
entry: entry:
%conv = fptoui <2 x double> %x to <2 x i32> %conv = fptoui <2 x double> %x to <2 x i32>
%0 = icmp ult <2 x i32> %conv, <i32 65535, i32 65535> %0 = icmp ult <2 x i32> %conv, <i32 65535, i32 65535>
%spec.store.select = select <2 x i1> %0, <2 x i32> %conv, <2 x i32> <i32 65535, i32 65535> %spec.store.select = select <2 x i1> %0, <2 x i32> %conv, <2 x i32> <i32 65535, i32 65535>
%conv6 = trunc <2 x i32> %spec.store.select to <2 x i16> %conv6 = trunc <2 x i32> %spec.store.select to <2 x i16>
ret <2 x i16> %conv6 ret <2 x i16> %conv6
} }
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; CHECK-NEXT: f64x2.extract_lane 1 ; CHECK-NEXT: f64x2.extract_lane 1
; CHECK-NEXT: i32.trunc_sat_f64_s ; CHECK-NEXT: i32.trunc_sat_f64_s
; CHECK-NEXT: i32x4.replace_lane 1 ; CHECK-NEXT: i32x4.replace_lane 1
; CHECK-NEXT: v128.const 65535, 65535, 0, 0 ; CHECK-NEXT: v128.const 65535, 65535, 0, 0
; CHECK-NEXT: i32x4.min_s ; CHECK-NEXT: i32x4.min_s
; CHECK-NEXT: v128.const 0, 0, 0, 0 ; CHECK-NEXT: v128.const 0, 0, 0, 0
; CHECK-NEXT: i32x4.max_s ; CHECK-NEXT: i32x4.max_s
; CHECK-NEXT: local.get 0 ; CHECK-NEXT: local.get 0
; CHECK-NEXT: i8x16.shuffle 0, 1, 4, 5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ; CHECK-NEXT: i8x16.shuffle 0, 1, 4, 5, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1
; CHECK-NEXT: # fallthrough-return ; CHECK-NEXT: # fallthrough-return
entry: entry:
%conv = fptosi <2 x double> %x to <2 x i32> %conv = fptosi <2 x double> %x to <2 x i32>
%0 = icmp slt <2 x i32> %conv, <i32 65535, i32 65535> %0 = icmp slt <2 x i32> %conv, <i32 65535, i32 65535>
%spec.store.select = select <2 x i1> %0, <2 x i32> %conv, <2 x i32> <i32 65535, i32 65535> %spec.store.select = select <2 x i1> %0, <2 x i32> %conv, <2 x i32> <i32 65535, i32 65535>
%1 = icmp sgt <2 x i32> %spec.store.select, zeroinitializer %1 = icmp sgt <2 x i32> %spec.store.select, zeroinitializer
%spec.store.select7 = select <2 x i1> %1, <2 x i32> %spec.store.select, <2 x i32> zeroinitializer %spec.store.select7 = select <2 x i1> %1, <2 x i32> %spec.store.select, <2 x i32> zeroinitializer
%conv6 = trunc <2 x i32> %spec.store.select7 to <2 x i16> %conv6 = trunc <2 x i32> %spec.store.select7 to <2 x i16>
ret <2 x i16> %conv6 ret <2 x i16> %conv6
} }
define <4 x i16> @stest_f32i16(<4 x float> %x) { define <4 x i16> @stest_f32i16(<4 x float> %x) {
; CHECK-LABEL: stest_f32i16: ; CHECK-LABEL: stest_f32i16:
; CHECK: .functype stest_f32i16 (v128) -> (v128) ; CHECK: .functype stest_f32i16 (v128) -> (v128)
; CHECK-NEXT: # %bb.0: # %entry ; CHECK-NEXT: # %bb.0: # %entry
; CHECK-NEXT: local.get 0 ; CHECK-NEXT: local.get 0
; CHECK-NEXT: i32x4.trunc_sat_f32x4_s ; CHECK-NEXT: i32x4.trunc_sat_f32x4_s
; CHECK-NEXT: v128.const 32767, 32767, 32767, 32767 ; CHECK-NEXT: v128.const 32767, 32767, 32767, 32767
; CHECK-NEXT: i32x4.min_s ; CHECK-NEXT: i32x4.min_s
; CHECK-NEXT: v128.const -32768, -32768, -32768, -32768 ; CHECK-NEXT: v128.const -32768, -32768, -32768, -32768
; CHECK-NEXT: i32x4.max_s ; CHECK-NEXT: i32x4.max_s
; CHECK-NEXT: local.get 0 ; CHECK-NEXT: local.get 0
; CHECK-NEXT: i8x16.shuffle 0, 1, 4, 5, 8, 9, 12, 13, 0, 0, 0, 0, 0, 0, 0, 0 ; CHECK-NEXT: i8x16.shuffle 0, 1, 4, 5, 8, 9, 12, 13, 0, 1, 0, 1, 0, 1, 0, 1
; CHECK-NEXT: # fallthrough-return ; CHECK-NEXT: # fallthrough-return
entry: entry:
%conv = fptosi <4 x float> %x to <4 x i32> %conv = fptosi <4 x float> %x to <4 x i32>
%0 = icmp slt <4 x i32> %conv, <i32 32767, i32 32767, i32 32767, i32 32767> %0 = icmp slt <4 x i32> %conv, <i32 32767, i32 32767, i32 32767, i32 32767>
%spec.store.select = select <4 x i1> %0, <4 x i32> %conv, <4 x i32> <i32 32767, i32 32767, i32 32767, i32 32767> %spec.store.select = select <4 x i1> %0, <4 x i32> %conv, <4 x i32> <i32 32767, i32 32767, i32 32767, i32 32767>
%1 = icmp sgt <4 x i32> %spec.store.select, <i32 -32768, i32 -32768, i32 -32768, i32 -32768> %1 = icmp sgt <4 x i32> %spec.store.select, <i32 -32768, i32 -32768, i32 -32768, i32 -32768>
%spec.store.select7 = select <4 x i1> %1, <4 x i32> %spec.store.select, <4 x i32> <i32 -32768, i32 -32768, i32 -32768, i32 -32768> %spec.store.select7 = select <4 x i1> %1, <4 x i32> %spec.store.select, <4 x i32> <i32 -32768, i32 -32768, i32 -32768, i32 -32768>
%conv6 = trunc <4 x i32> %spec.store.select7 to <4 x i16> %conv6 = trunc <4 x i32> %spec.store.select7 to <4 x i16>
ret <4 x i16> %conv6 ret <4 x i16> %conv6
} }
define <4 x i16> @utest_f32i16(<4 x float> %x) { define <4 x i16> @utest_f32i16(<4 x float> %x) {
; CHECK-LABEL: utest_f32i16: ; CHECK-LABEL: utest_f32i16:
; CHECK: .functype utest_f32i16 (v128) -> (v128) ; CHECK: .functype utest_f32i16 (v128) -> (v128)
; CHECK-NEXT: # %bb.0: # %entry ; CHECK-NEXT: # %bb.0: # %entry
; CHECK-NEXT: local.get 0 ; CHECK-NEXT: local.get 0
; CHECK-NEXT: i32x4.trunc_sat_f32x4_u ; CHECK-NEXT: i32x4.trunc_sat_f32x4_u
; CHECK-NEXT: v128.const 65535, 65535, 65535, 65535 ; CHECK-NEXT: v128.const 65535, 65535, 65535, 65535
; CHECK-NEXT: i32x4.min_u ; CHECK-NEXT: i32x4.min_u
; CHECK-NEXT: local.get 0 ; CHECK-NEXT: local.get 0
; CHECK-NEXT: i8x16.shuffle 0, 1, 4, 5, 8, 9, 12, 13, 0, 0, 0, 0, 0, 0, 0, 0 ; CHECK-NEXT: i8x16.shuffle 0, 1, 4, 5, 8, 9, 12, 13, 0, 1, 0, 1, 0, 1, 0, 1
; CHECK-NEXT: # fallthrough-return ; CHECK-NEXT: # fallthrough-return
entry: entry:
%conv = fptoui <4 x float> %x to <4 x i32> %conv = fptoui <4 x float> %x to <4 x i32>
%0 = icmp ult <4 x i32> %conv, <i32 65535, i32 65535, i32 65535, i32 65535> %0 = icmp ult <4 x i32> %conv, <i32 65535, i32 65535, i32 65535, i32 65535>
%spec.store.select = select <4 x i1> %0, <4 x i32> %conv, <4 x i32> <i32 65535, i32 65535, i32 65535, i32 65535> %spec.store.select = select <4 x i1> %0, <4 x i32> %conv, <4 x i32> <i32 65535, i32 65535, i32 65535, i32 65535>
%conv6 = trunc <4 x i32> %spec.store.select to <4 x i16> %conv6 = trunc <4 x i32> %spec.store.select to <4 x i16>
ret <4 x i16> %conv6 ret <4 x i16> %conv6
} }
define <4 x i16> @ustest_f32i16(<4 x float> %x) { define <4 x i16> @ustest_f32i16(<4 x float> %x) {
; CHECK-LABEL: ustest_f32i16: ; CHECK-LABEL: ustest_f32i16:
; CHECK: .functype ustest_f32i16 (v128) -> (v128) ; CHECK: .functype ustest_f32i16 (v128) -> (v128)
; CHECK-NEXT: # %bb.0: # %entry ; CHECK-NEXT: # %bb.0: # %entry
; CHECK-NEXT: local.get 0 ; CHECK-NEXT: local.get 0
; CHECK-NEXT: i32x4.trunc_sat_f32x4_s ; CHECK-NEXT: i32x4.trunc_sat_f32x4_s
; CHECK-NEXT: v128.const 65535, 65535, 65535, 65535 ; CHECK-NEXT: v128.const 65535, 65535, 65535, 65535
; CHECK-NEXT: i32x4.min_s ; CHECK-NEXT: i32x4.min_s
; CHECK-NEXT: v128.const 0, 0, 0, 0 ; CHECK-NEXT: v128.const 0, 0, 0, 0
; CHECK-NEXT: i32x4.max_s ; CHECK-NEXT: i32x4.max_s
; CHECK-NEXT: local.get 0 ; CHECK-NEXT: local.get 0
; CHECK-NEXT: i8x16.shuffle 0, 1, 4, 5, 8, 9, 12, 13, 0, 0, 0, 0, 0, 0, 0, 0 ; CHECK-NEXT: i8x16.shuffle 0, 1, 4, 5, 8, 9, 12, 13, 0, 1, 0, 1, 0, 1, 0, 1
; CHECK-NEXT: # fallthrough-return ; CHECK-NEXT: # fallthrough-return
entry: entry:
%conv = fptosi <4 x float> %x to <4 x i32> %conv = fptosi <4 x float> %x to <4 x i32>
%0 = icmp slt <4 x i32> %conv, <i32 65535, i32 65535, i32 65535, i32 65535> %0 = icmp slt <4 x i32> %conv, <i32 65535, i32 65535, i32 65535, i32 65535>
%spec.store.select = select <4 x i1> %0, <4 x i32> %conv, <4 x i32> <i32 65535, i32 65535, i32 65535, i32 65535> %spec.store.select = select <4 x i1> %0, <4 x i32> %conv, <4 x i32> <i32 65535, i32 65535, i32 65535, i32 65535>
%1 = icmp sgt <4 x i32> %spec.store.select, zeroinitializer %1 = icmp sgt <4 x i32> %spec.store.select, zeroinitializer
%spec.store.select7 = select <4 x i1> %1, <4 x i32> %spec.store.select, <4 x i32> zeroinitializer %spec.store.select7 = select <4 x i1> %1, <4 x i32> %spec.store.select, <4 x i32> zeroinitializer
%conv6 = trunc <4 x i32> %spec.store.select7 to <4 x i16> %conv6 = trunc <4 x i32> %spec.store.select7 to <4 x i16>
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; CHECK-NEXT: local.tee 0 ; CHECK-NEXT: local.tee 0
; CHECK-NEXT: v128.const -2147483648, -2147483648 ; CHECK-NEXT: v128.const -2147483648, -2147483648
; CHECK-NEXT: local.tee 1 ; CHECK-NEXT: local.tee 1
; CHECK-NEXT: local.get 0 ; CHECK-NEXT: local.get 0
; CHECK-NEXT: local.get 1 ; CHECK-NEXT: local.get 1
; CHECK-NEXT: i64x2.gt_s ; CHECK-NEXT: i64x2.gt_s
; CHECK-NEXT: v128.bitselect ; CHECK-NEXT: v128.bitselect
; CHECK-NEXT: local.get 0 ; CHECK-NEXT: local.get 0
; CHECK-NEXT: i8x16.shuffle 0, 1, 2, 3, 8, 9, 10, 11, 0, 0, 0, 0, 0, 0, 0, 0 ; CHECK-NEXT: i8x16.shuffle 0, 1, 2, 3, 8, 9, 10, 11, 0, 1, 2, 3, 0, 1, 2, 3
; CHECK-NEXT: # fallthrough-return ; CHECK-NEXT: # fallthrough-return
entry: entry:
%conv = fptosi <2 x double> %x to <2 x i64> %conv = fptosi <2 x double> %x to <2 x i64>
%spec.store.select = call <2 x i64> @llvm.smin.v2i64(<2 x i64> %conv, <2 x i64> <i64 2147483647, i64 2147483647>) %spec.store.select = call <2 x i64> @llvm.smin.v2i64(<2 x i64> %conv, <2 x i64> <i64 2147483647, i64 2147483647>)
%spec.store.select7 = call <2 x i64> @llvm.smax.v2i64(<2 x i64> %spec.store.select, <2 x i64> <i64 -2147483648, i64 -2147483648>) %spec.store.select7 = call <2 x i64> @llvm.smax.v2i64(<2 x i64> %spec.store.select, <2 x i64> <i64 -2147483648, i64 -2147483648>)
%conv6 = trunc <2 x i64> %spec.store.select7 to <2 x i32> %conv6 = trunc <2 x i64> %spec.store.select7 to <2 x i32>
ret <2 x i32> %conv6 ret <2 x i32> %conv6
} }
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; CHECK-NEXT: i64.const 0 ; CHECK-NEXT: i64.const 0
; CHECK-NEXT: local.get 2 ; CHECK-NEXT: local.get 2
; CHECK-NEXT: i64.const 4294967295 ; CHECK-NEXT: i64.const 4294967295
; CHECK-NEXT: i64.lt_u ; CHECK-NEXT: i64.lt_u
; CHECK-NEXT: i64.select ; CHECK-NEXT: i64.select
; CHECK-NEXT: i64x2.replace_lane 1 ; CHECK-NEXT: i64x2.replace_lane 1
; CHECK-NEXT: v128.bitselect ; CHECK-NEXT: v128.bitselect
; CHECK-NEXT: local.get 0 ; CHECK-NEXT: local.get 0
; CHECK-NEXT: i8x16.shuffle 0, 1, 2, 3, 8, 9, 10, 11, 0, 0, 0, 0, 0, 0, 0, 0 ; CHECK-NEXT: i8x16.shuffle 0, 1, 2, 3, 8, 9, 10, 11, 0, 1, 2, 3, 0, 1, 2, 3
; CHECK-NEXT: # fallthrough-return ; CHECK-NEXT: # fallthrough-return
entry: entry:
%conv = fptoui <2 x double> %x to <2 x i64> %conv = fptoui <2 x double> %x to <2 x i64>
%spec.store.select = call <2 x i64> @llvm.umin.v2i64(<2 x i64> %conv, <2 x i64> <i64 4294967295, i64 4294967295>) %spec.store.select = call <2 x i64> @llvm.umin.v2i64(<2 x i64> %conv, <2 x i64> <i64 4294967295, i64 4294967295>)
%conv6 = trunc <2 x i64> %spec.store.select to <2 x i32> %conv6 = trunc <2 x i64> %spec.store.select to <2 x i32>
ret <2 x i32> %conv6 ret <2 x i32> %conv6
} }
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; CHECK-NEXT: local.tee 0 ; CHECK-NEXT: local.tee 0
; CHECK-NEXT: v128.const 0, 0 ; CHECK-NEXT: v128.const 0, 0
; CHECK-NEXT: local.tee 1 ; CHECK-NEXT: local.tee 1
; CHECK-NEXT: local.get 0 ; CHECK-NEXT: local.get 0
; CHECK-NEXT: local.get 1 ; CHECK-NEXT: local.get 1
; CHECK-NEXT: i64x2.gt_s ; CHECK-NEXT: i64x2.gt_s
; CHECK-NEXT: v128.bitselect ; CHECK-NEXT: v128.bitselect
; CHECK-NEXT: local.get 0 ; CHECK-NEXT: local.get 0
; CHECK-NEXT: i8x16.shuffle 0, 1, 2, 3, 8, 9, 10, 11, 0, 0, 0, 0, 0, 0, 0, 0 ; CHECK-NEXT: i8x16.shuffle 0, 1, 2, 3, 8, 9, 10, 11, 0, 1, 2, 3, 0, 1, 2, 3
; CHECK-NEXT: # fallthrough-return ; CHECK-NEXT: # fallthrough-return
entry: entry:
%conv = fptosi <2 x double> %x to <2 x i64> %conv = fptosi <2 x double> %x to <2 x i64>
%spec.store.select = call <2 x i64> @llvm.smin.v2i64(<2 x i64> %conv, <2 x i64> <i64 4294967295, i64 4294967295>) %spec.store.select = call <2 x i64> @llvm.smin.v2i64(<2 x i64> %conv, <2 x i64> <i64 4294967295, i64 4294967295>)
%spec.store.select7 = call <2 x i64> @llvm.smax.v2i64(<2 x i64> %spec.store.select, <2 x i64> zeroinitializer) %spec.store.select7 = call <2 x i64> @llvm.smax.v2i64(<2 x i64> %spec.store.select, <2 x i64> zeroinitializer)
%conv6 = trunc <2 x i64> %spec.store.select7 to <2 x i32> %conv6 = trunc <2 x i64> %spec.store.select7 to <2 x i32>
ret <2 x i32> %conv6 ret <2 x i32> %conv6
} }
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; CHECK-NEXT: f64x2.extract_lane 1 ; CHECK-NEXT: f64x2.extract_lane 1
; CHECK-NEXT: i32.trunc_sat_f64_s ; CHECK-NEXT: i32.trunc_sat_f64_s
; CHECK-NEXT: i32x4.replace_lane 1 ; CHECK-NEXT: i32x4.replace_lane 1
; CHECK-NEXT: v128.const 32767, 32767, 0, 0 ; CHECK-NEXT: v128.const 32767, 32767, 0, 0
; CHECK-NEXT: i32x4.min_s ; CHECK-NEXT: i32x4.min_s
; CHECK-NEXT: v128.const -32768, -32768, 0, 0 ; CHECK-NEXT: v128.const -32768, -32768, 0, 0
; CHECK-NEXT: i32x4.max_s ; CHECK-NEXT: i32x4.max_s
; CHECK-NEXT: local.get 0 ; CHECK-NEXT: local.get 0
; CHECK-NEXT: i8x16.shuffle 0, 1, 4, 5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ; CHECK-NEXT: i8x16.shuffle 0, 1, 4, 5, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1
; CHECK-NEXT: # fallthrough-return ; CHECK-NEXT: # fallthrough-return
entry: entry:
%conv = fptosi <2 x double> %x to <2 x i32> %conv = fptosi <2 x double> %x to <2 x i32>
%spec.store.select = call <2 x i32> @llvm.smin.v2i32(<2 x i32> %conv, <2 x i32> <i32 32767, i32 32767>) %spec.store.select = call <2 x i32> @llvm.smin.v2i32(<2 x i32> %conv, <2 x i32> <i32 32767, i32 32767>)
%spec.store.select7 = call <2 x i32> @llvm.smax.v2i32(<2 x i32> %spec.store.select, <2 x i32> <i32 -32768, i32 -32768>) %spec.store.select7 = call <2 x i32> @llvm.smax.v2i32(<2 x i32> %spec.store.select, <2 x i32> <i32 -32768, i32 -32768>)
%conv6 = trunc <2 x i32> %spec.store.select7 to <2 x i16> %conv6 = trunc <2 x i32> %spec.store.select7 to <2 x i16>
ret <2 x i16> %conv6 ret <2 x i16> %conv6
} }
define <2 x i16> @utest_f64i16_mm(<2 x double> %x) { define <2 x i16> @utest_f64i16_mm(<2 x double> %x) {
; CHECK-LABEL: utest_f64i16_mm: ; CHECK-LABEL: utest_f64i16_mm:
; CHECK: .functype utest_f64i16_mm (v128) -> (v128) ; CHECK: .functype utest_f64i16_mm (v128) -> (v128)
; CHECK-NEXT: # %bb.0: # %entry ; CHECK-NEXT: # %bb.0: # %entry
; CHECK-NEXT: local.get 0 ; CHECK-NEXT: local.get 0
; CHECK-NEXT: f64x2.extract_lane 0 ; CHECK-NEXT: f64x2.extract_lane 0
; CHECK-NEXT: i32.trunc_sat_f64_u ; CHECK-NEXT: i32.trunc_sat_f64_u
; CHECK-NEXT: i32x4.splat ; CHECK-NEXT: i32x4.splat
; CHECK-NEXT: local.get 0 ; CHECK-NEXT: local.get 0
; CHECK-NEXT: f64x2.extract_lane 1 ; CHECK-NEXT: f64x2.extract_lane 1
; CHECK-NEXT: i32.trunc_sat_f64_u ; CHECK-NEXT: i32.trunc_sat_f64_u
; CHECK-NEXT: i32x4.replace_lane 1 ; CHECK-NEXT: i32x4.replace_lane 1
; CHECK-NEXT: v128.const 65535, 65535, 0, 0 ; CHECK-NEXT: v128.const 65535, 65535, 0, 0
; CHECK-NEXT: i32x4.min_u ; CHECK-NEXT: i32x4.min_u
; CHECK-NEXT: local.get 0 ; CHECK-NEXT: local.get 0
; CHECK-NEXT: i8x16.shuffle 0, 1, 4, 5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ; CHECK-NEXT: i8x16.shuffle 0, 1, 4, 5, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1
; CHECK-NEXT: # fallthrough-return ; CHECK-NEXT: # fallthrough-return
entry: entry:
%conv = fptoui <2 x double> %x to <2 x i32> %conv = fptoui <2 x double> %x to <2 x i32>
%spec.store.select = call <2 x i32> @llvm.umin.v2i32(<2 x i32> %conv, <2 x i32> <i32 65535, i32 65535>) %spec.store.select = call <2 x i32> @llvm.umin.v2i32(<2 x i32> %conv, <2 x i32> <i32 65535, i32 65535>)
%conv6 = trunc <2 x i32> %spec.store.select to <2 x i16> %conv6 = trunc <2 x i32> %spec.store.select to <2 x i16>
ret <2 x i16> %conv6 ret <2 x i16> %conv6
} }
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; CHECK-NEXT: f64x2.extract_lane 1 ; CHECK-NEXT: f64x2.extract_lane 1
; CHECK-NEXT: i32.trunc_sat_f64_s ; CHECK-NEXT: i32.trunc_sat_f64_s
; CHECK-NEXT: i32x4.replace_lane 1 ; CHECK-NEXT: i32x4.replace_lane 1
; CHECK-NEXT: v128.const 65535, 65535, 0, 0 ; CHECK-NEXT: v128.const 65535, 65535, 0, 0
; CHECK-NEXT: i32x4.min_s ; CHECK-NEXT: i32x4.min_s
; CHECK-NEXT: v128.const 0, 0, 0, 0 ; CHECK-NEXT: v128.const 0, 0, 0, 0
; CHECK-NEXT: i32x4.max_s ; CHECK-NEXT: i32x4.max_s
; CHECK-NEXT: local.get 0 ; CHECK-NEXT: local.get 0
; CHECK-NEXT: i8x16.shuffle 0, 1, 4, 5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ; CHECK-NEXT: i8x16.shuffle 0, 1, 4, 5, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1
; CHECK-NEXT: # fallthrough-return ; CHECK-NEXT: # fallthrough-return
entry: entry:
%conv = fptosi <2 x double> %x to <2 x i32> %conv = fptosi <2 x double> %x to <2 x i32>
%spec.store.select = call <2 x i32> @llvm.smin.v2i32(<2 x i32> %conv, <2 x i32> <i32 65535, i32 65535>) %spec.store.select = call <2 x i32> @llvm.smin.v2i32(<2 x i32> %conv, <2 x i32> <i32 65535, i32 65535>)
%spec.store.select7 = call <2 x i32> @llvm.smax.v2i32(<2 x i32> %spec.store.select, <2 x i32> zeroinitializer) %spec.store.select7 = call <2 x i32> @llvm.smax.v2i32(<2 x i32> %spec.store.select, <2 x i32> zeroinitializer)
%conv6 = trunc <2 x i32> %spec.store.select7 to <2 x i16> %conv6 = trunc <2 x i32> %spec.store.select7 to <2 x i16>
ret <2 x i16> %conv6 ret <2 x i16> %conv6
} }
define <4 x i16> @stest_f32i16_mm(<4 x float> %x) { define <4 x i16> @stest_f32i16_mm(<4 x float> %x) {
; CHECK-LABEL: stest_f32i16_mm: ; CHECK-LABEL: stest_f32i16_mm:
; CHECK: .functype stest_f32i16_mm (v128) -> (v128) ; CHECK: .functype stest_f32i16_mm (v128) -> (v128)
; CHECK-NEXT: # %bb.0: # %entry ; CHECK-NEXT: # %bb.0: # %entry
; CHECK-NEXT: local.get 0 ; CHECK-NEXT: local.get 0
; CHECK-NEXT: i32x4.trunc_sat_f32x4_s ; CHECK-NEXT: i32x4.trunc_sat_f32x4_s
; CHECK-NEXT: v128.const 32767, 32767, 32767, 32767 ; CHECK-NEXT: v128.const 32767, 32767, 32767, 32767
; CHECK-NEXT: i32x4.min_s ; CHECK-NEXT: i32x4.min_s
; CHECK-NEXT: v128.const -32768, -32768, -32768, -32768 ; CHECK-NEXT: v128.const -32768, -32768, -32768, -32768
; CHECK-NEXT: i32x4.max_s ; CHECK-NEXT: i32x4.max_s
; CHECK-NEXT: local.get 0 ; CHECK-NEXT: local.get 0
; CHECK-NEXT: i8x16.shuffle 0, 1, 4, 5, 8, 9, 12, 13, 0, 0, 0, 0, 0, 0, 0, 0 ; CHECK-NEXT: i8x16.shuffle 0, 1, 4, 5, 8, 9, 12, 13, 0, 1, 0, 1, 0, 1, 0, 1
; CHECK-NEXT: # fallthrough-return ; CHECK-NEXT: # fallthrough-return
entry: entry:
%conv = fptosi <4 x float> %x to <4 x i32> %conv = fptosi <4 x float> %x to <4 x i32>
%spec.store.select = call <4 x i32> @llvm.smin.v4i32(<4 x i32> %conv, <4 x i32> <i32 32767, i32 32767, i32 32767, i32 32767>) %spec.store.select = call <4 x i32> @llvm.smin.v4i32(<4 x i32> %conv, <4 x i32> <i32 32767, i32 32767, i32 32767, i32 32767>)
%spec.store.select7 = call <4 x i32> @llvm.smax.v4i32(<4 x i32> %spec.store.select, <4 x i32> <i32 -32768, i32 -32768, i32 -32768, i32 -32768>) %spec.store.select7 = call <4 x i32> @llvm.smax.v4i32(<4 x i32> %spec.store.select, <4 x i32> <i32 -32768, i32 -32768, i32 -32768, i32 -32768>)
%conv6 = trunc <4 x i32> %spec.store.select7 to <4 x i16> %conv6 = trunc <4 x i32> %spec.store.select7 to <4 x i16>
ret <4 x i16> %conv6 ret <4 x i16> %conv6
} }
define <4 x i16> @utest_f32i16_mm(<4 x float> %x) { define <4 x i16> @utest_f32i16_mm(<4 x float> %x) {
; CHECK-LABEL: utest_f32i16_mm: ; CHECK-LABEL: utest_f32i16_mm:
; CHECK: .functype utest_f32i16_mm (v128) -> (v128) ; CHECK: .functype utest_f32i16_mm (v128) -> (v128)
; CHECK-NEXT: # %bb.0: # %entry ; CHECK-NEXT: # %bb.0: # %entry
; CHECK-NEXT: local.get 0 ; CHECK-NEXT: local.get 0
; CHECK-NEXT: i32x4.trunc_sat_f32x4_u ; CHECK-NEXT: i32x4.trunc_sat_f32x4_u
; CHECK-NEXT: v128.const 65535, 65535, 65535, 65535 ; CHECK-NEXT: v128.const 65535, 65535, 65535, 65535
; CHECK-NEXT: i32x4.min_u ; CHECK-NEXT: i32x4.min_u
; CHECK-NEXT: local.get 0 ; CHECK-NEXT: local.get 0
; CHECK-NEXT: i8x16.shuffle 0, 1, 4, 5, 8, 9, 12, 13, 0, 0, 0, 0, 0, 0, 0, 0 ; CHECK-NEXT: i8x16.shuffle 0, 1, 4, 5, 8, 9, 12, 13, 0, 1, 0, 1, 0, 1, 0, 1
; CHECK-NEXT: # fallthrough-return ; CHECK-NEXT: # fallthrough-return
entry: entry:
%conv = fptoui <4 x float> %x to <4 x i32> %conv = fptoui <4 x float> %x to <4 x i32>
%spec.store.select = call <4 x i32> @llvm.umin.v4i32(<4 x i32> %conv, <4 x i32> <i32 65535, i32 65535, i32 65535, i32 65535>) %spec.store.select = call <4 x i32> @llvm.umin.v4i32(<4 x i32> %conv, <4 x i32> <i32 65535, i32 65535, i32 65535, i32 65535>)
%conv6 = trunc <4 x i32> %spec.store.select to <4 x i16> %conv6 = trunc <4 x i32> %spec.store.select to <4 x i16>
ret <4 x i16> %conv6 ret <4 x i16> %conv6
} }
define <4 x i16> @ustest_f32i16_mm(<4 x float> %x) { define <4 x i16> @ustest_f32i16_mm(<4 x float> %x) {
; CHECK-LABEL: ustest_f32i16_mm: ; CHECK-LABEL: ustest_f32i16_mm:
; CHECK: .functype ustest_f32i16_mm (v128) -> (v128) ; CHECK: .functype ustest_f32i16_mm (v128) -> (v128)
; CHECK-NEXT: # %bb.0: # %entry ; CHECK-NEXT: # %bb.0: # %entry
; CHECK-NEXT: local.get 0 ; CHECK-NEXT: local.get 0
; CHECK-NEXT: i32x4.trunc_sat_f32x4_s ; CHECK-NEXT: i32x4.trunc_sat_f32x4_s
; CHECK-NEXT: v128.const 65535, 65535, 65535, 65535 ; CHECK-NEXT: v128.const 65535, 65535, 65535, 65535
; CHECK-NEXT: i32x4.min_s ; CHECK-NEXT: i32x4.min_s
; CHECK-NEXT: v128.const 0, 0, 0, 0 ; CHECK-NEXT: v128.const 0, 0, 0, 0
; CHECK-NEXT: i32x4.max_s ; CHECK-NEXT: i32x4.max_s
; CHECK-NEXT: local.get 0 ; CHECK-NEXT: local.get 0
; CHECK-NEXT: i8x16.shuffle 0, 1, 4, 5, 8, 9, 12, 13, 0, 0, 0, 0, 0, 0, 0, 0 ; CHECK-NEXT: i8x16.shuffle 0, 1, 4, 5, 8, 9, 12, 13, 0, 1, 0, 1, 0, 1, 0, 1
; CHECK-NEXT: # fallthrough-return ; CHECK-NEXT: # fallthrough-return
entry: entry:
%conv = fptosi <4 x float> %x to <4 x i32> %conv = fptosi <4 x float> %x to <4 x i32>
%spec.store.select = call <4 x i32> @llvm.smin.v4i32(<4 x i32> %conv, <4 x i32> <i32 65535, i32 65535, i32 65535, i32 65535>) %spec.store.select = call <4 x i32> @llvm.smin.v4i32(<4 x i32> %conv, <4 x i32> <i32 65535, i32 65535, i32 65535, i32 65535>)
%spec.store.select7 = call <4 x i32> @llvm.smax.v4i32(<4 x i32> %spec.store.select, <4 x i32> zeroinitializer) %spec.store.select7 = call <4 x i32> @llvm.smax.v4i32(<4 x i32> %spec.store.select, <4 x i32> zeroinitializer)
%conv6 = trunc <4 x i32> %spec.store.select7 to <4 x i16> %conv6 = trunc <4 x i32> %spec.store.select7 to <4 x i16>
ret <4 x i16> %conv6 ret <4 x i16> %conv6
} }
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