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llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
| Show All 18 Lines | |||||
| static cl::opt<unsigned> RVVRegisterWidthLMUL( | static cl::opt<unsigned> RVVRegisterWidthLMUL( | ||||
| "riscv-v-register-bit-width-lmul", | "riscv-v-register-bit-width-lmul", | ||||
| cl::desc( | cl::desc( | ||||
| "The LMUL to use for getRegisterBitWidth queries. Affects LMUL used " | "The LMUL to use for getRegisterBitWidth queries. Affects LMUL used " | ||||
| "by autovectorized code. Fractional LMULs are not supported."), | "by autovectorized code. Fractional LMULs are not supported."), | ||||
| cl::init(1), cl::Hidden); | cl::init(1), cl::Hidden); | ||||
| static cl::opt<unsigned> SLPMaxVF( | |||||
| "riscv-v-slp-max-vf", | |||||
| cl::desc( | |||||
| "Result used for getMaximumVF query which is used exclusively by " | |||||
| "SLP vectorizer. Defaults to 1 which disables SLP."), | |||||
| cl::init(1), cl::Hidden); | |||||
| InstructionCost RISCVTTIImpl::getIntImmCost(const APInt &Imm, Type *Ty, | InstructionCost RISCVTTIImpl::getIntImmCost(const APInt &Imm, Type *Ty, | ||||
| TTI::TargetCostKind CostKind) { | TTI::TargetCostKind CostKind) { | ||||
| assert(Ty->isIntegerTy() && | assert(Ty->isIntegerTy() && | ||||
| "getIntImmCost can only estimate cost of materialising integers"); | "getIntImmCost can only estimate cost of materialising integers"); | ||||
| // We have a Zero register, so 0 is always free. | // We have a Zero register, so 0 is always free. | ||||
| if (Imm == 0) | if (Imm == 0) | ||||
| return TTI::TCC_Free; | return TTI::TCC_Free; | ||||
| ▲ Show 20 Lines • Show All 959 Lines • ▼ Show 20 Lines | if (Size.isScalable() && ST->hasVInstructions()) | ||||
| return divideCeil(Size.getKnownMinValue(), RISCV::RVVBitsPerBlock); | return divideCeil(Size.getKnownMinValue(), RISCV::RVVBitsPerBlock); | ||||
| if (ST->useRVVForFixedLengthVectors()) | if (ST->useRVVForFixedLengthVectors()) | ||||
| return divideCeil(Size, ST->getRealMinVLen()); | return divideCeil(Size, ST->getRealMinVLen()); | ||||
| } | } | ||||
| return BaseT::getRegUsageForType(Ty); | return BaseT::getRegUsageForType(Ty); | ||||
| } | } | ||||
| unsigned RISCVTTIImpl::getMaximumVF(unsigned ElemWidth, unsigned Opcode) const { | |||||
| // This interface is currently only used by SLP. Returning 1 (which is the | |||||
| // default value for SLPMaxVF) disables SLP. We currently have a cost modeling | |||||
| // problem w/ constant materialization which causes SLP to perform majorly | |||||
| // unprofitable transformations. | |||||
| // TODO: Figure out constant materialization cost modeling and remove. | |||||
| return SLPMaxVF; | |||||
| } | |||||