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Differential D128174 Diff 454512 llvm/unittests/CodeGen/InstrRefLDVTest.cpp

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llvm/unittests/CodeGen/InstrRefLDVTest.cpp

Show First 20 Lines • Show All 1,794 Lines • ▼ Show 20 LinesTEST_F(InstrRefLDVTest, pickVPHILocDiamond) {
unsigned EntryBlk = 0, Br2Blk = 2, RetBlk = 3; unsigned EntryBlk = 0, Br2Blk = 2, RetBlk = 3;
ValueIDNum LiveInRsp(EntryBlk, 0, RspLoc); ValueIDNum LiveInRsp(EntryBlk, 0, RspLoc);
ValueIDNum LiveInRax(EntryBlk, 0, RaxLoc); ValueIDNum LiveInRax(EntryBlk, 0, RaxLoc);
ValueIDNum RspPHIInBlk2(Br2Blk, 0, RspLoc); ValueIDNum RspPHIInBlk2(Br2Blk, 0, RspLoc);
ValueIDNum RspPHIInBlk3(RetBlk, 0, RspLoc); ValueIDNum RspPHIInBlk3(RetBlk, 0, RspLoc);
DebugVariable Var(FuncVariable, None, nullptr); DebugVariable Var(FuncVariable, None, nullptr);
DbgValueProperties EmptyProps(EmptyExpr, false); DbgValueProperties EmptyProps(EmptyExpr, false, false);
SmallVector<DbgValue, 32> VLiveOuts; SmallVector<DbgValue, 32> VLiveOuts;
VLiveOuts.resize(4, DbgValue(EmptyProps, DbgValue::Undef)); VLiveOuts.resize(4, DbgValue(EmptyProps, DbgValue::Undef));
InstrRefBasedLDV::LiveIdxT VLiveOutIdx; InstrRefBasedLDV::LiveIdxT VLiveOutIdx;
VLiveOutIdx[MBB0] = &VLiveOuts[0]; VLiveOutIdx[MBB0] = &VLiveOuts[0];
VLiveOutIdx[MBB1] = &VLiveOuts[1]; VLiveOutIdx[MBB1] = &VLiveOuts[1];
VLiveOutIdx[MBB2] = &VLiveOuts[2]; VLiveOutIdx[MBB2] = &VLiveOuts[2];
VLiveOutIdx[MBB3] = &VLiveOuts[3]; VLiveOutIdx[MBB3] = &VLiveOuts[3];
▲ Show 20 Lines • Show All 71 Lines • ▼ Show 20 LinesTEST_F(InstrRefLDVTest, pickVPHILocDiamond) {
MOutLocs[2][0] = LiveInRsp; MOutLocs[2][0] = LiveInRsp;
Result = pickVPHILoc(*MBB3, Var, VLiveOutIdx, MOutLocs, Preds); Result = pickVPHILoc(*MBB3, Var, VLiveOutIdx, MOutLocs, Preds);
EXPECT_FALSE(Result); EXPECT_FALSE(Result);
// Check that we don't pick values when the properties disagree, for example // Check that we don't pick values when the properties disagree, for example
// different indirectness or DIExpression. // different indirectness or DIExpression.
DIExpression *NewExpr = DIExpression *NewExpr =
DIExpression::prepend(EmptyExpr, DIExpression::ApplyOffset, 4); DIExpression::prepend(EmptyExpr, DIExpression::ApplyOffset, 4);
DbgValueProperties PropsWithExpr(NewExpr, false); DbgValueProperties PropsWithExpr(NewExpr, false, false);
VLiveOuts[1] = DbgValue(LiveInRsp, EmptyProps, DbgValue::Def); VLiveOuts[1] = DbgValue(LiveInRsp, EmptyProps, DbgValue::Def);
VLiveOuts[2] = DbgValue(LiveInRsp, PropsWithExpr, DbgValue::Def); VLiveOuts[2] = DbgValue(LiveInRsp, PropsWithExpr, DbgValue::Def);
Result = pickVPHILoc(*MBB3, Var, VLiveOutIdx, MOutLocs, Preds); Result = pickVPHILoc(*MBB3, Var, VLiveOutIdx, MOutLocs, Preds);
EXPECT_FALSE(Result); EXPECT_FALSE(Result);
DbgValueProperties PropsWithIndirect(EmptyExpr, true); DbgValueProperties PropsWithIndirect(EmptyExpr, true, false);
VLiveOuts[1] = DbgValue(LiveInRsp, EmptyProps, DbgValue::Def); VLiveOuts[1] = DbgValue(LiveInRsp, EmptyProps, DbgValue::Def);
VLiveOuts[2] = DbgValue(LiveInRsp, PropsWithIndirect, DbgValue::Def); VLiveOuts[2] = DbgValue(LiveInRsp, PropsWithIndirect, DbgValue::Def);
Result = pickVPHILoc(*MBB3, Var, VLiveOutIdx, MOutLocs, Preds); Result = pickVPHILoc(*MBB3, Var, VLiveOutIdx, MOutLocs, Preds);
EXPECT_FALSE(Result); EXPECT_FALSE(Result);
} }
TEST_F(InstrRefLDVTest, pickVPHILocLoops) { TEST_F(InstrRefLDVTest, pickVPHILocLoops) {
setupSimpleLoop(); setupSimpleLoop();
Show All 18 LinesTEST_F(InstrRefLDVTest, pickVPHILocLoops) {
unsigned EntryBlk = 0, LoopBlk = 1; unsigned EntryBlk = 0, LoopBlk = 1;
ValueIDNum LiveInRsp(EntryBlk, 0, RspLoc); ValueIDNum LiveInRsp(EntryBlk, 0, RspLoc);
ValueIDNum LiveInRax(EntryBlk, 0, RaxLoc); ValueIDNum LiveInRax(EntryBlk, 0, RaxLoc);
ValueIDNum RspPHIInBlk1(LoopBlk, 0, RspLoc); ValueIDNum RspPHIInBlk1(LoopBlk, 0, RspLoc);
ValueIDNum RaxPHIInBlk1(LoopBlk, 0, RaxLoc); ValueIDNum RaxPHIInBlk1(LoopBlk, 0, RaxLoc);
DebugVariable Var(FuncVariable, None, nullptr); DebugVariable Var(FuncVariable, None, nullptr);
DbgValueProperties EmptyProps(EmptyExpr, false); DbgValueProperties EmptyProps(EmptyExpr, false, false);
SmallVector<DbgValue, 32> VLiveOuts; SmallVector<DbgValue, 32> VLiveOuts;
VLiveOuts.resize(3, DbgValue(EmptyProps, DbgValue::Undef)); VLiveOuts.resize(3, DbgValue(EmptyProps, DbgValue::Undef));
InstrRefBasedLDV::LiveIdxT VLiveOutIdx; InstrRefBasedLDV::LiveIdxT VLiveOutIdx;
VLiveOutIdx[MBB0] = &VLiveOuts[0]; VLiveOutIdx[MBB0] = &VLiveOuts[0];
VLiveOutIdx[MBB1] = &VLiveOuts[1]; VLiveOutIdx[MBB1] = &VLiveOuts[1];
VLiveOutIdx[MBB2] = &VLiveOuts[2]; VLiveOutIdx[MBB2] = &VLiveOuts[2];
SmallVector<const MachineBasicBlock *, 2> Preds; SmallVector<const MachineBasicBlock *, 2> Preds;
▲ Show 20 Lines • Show All 85 Lines • ▼ Show 20 LinesTEST_F(InstrRefLDVTest, pickVPHILocBadlyNestedLoops) {
ValueIDNum LiveInRsp(EntryBlk, 0, RspLoc); ValueIDNum LiveInRsp(EntryBlk, 0, RspLoc);
ValueIDNum LiveInRax(EntryBlk, 0, RaxLoc); ValueIDNum LiveInRax(EntryBlk, 0, RaxLoc);
ValueIDNum LiveInRbx(EntryBlk, 0, RbxLoc); ValueIDNum LiveInRbx(EntryBlk, 0, RbxLoc);
ValueIDNum RspPHIInBlk1(Loop1Blk, 0, RspLoc); ValueIDNum RspPHIInBlk1(Loop1Blk, 0, RspLoc);
ValueIDNum RaxPHIInBlk1(Loop1Blk, 0, RaxLoc); ValueIDNum RaxPHIInBlk1(Loop1Blk, 0, RaxLoc);
ValueIDNum RbxPHIInBlk1(Loop1Blk, 0, RbxLoc); ValueIDNum RbxPHIInBlk1(Loop1Blk, 0, RbxLoc);
DebugVariable Var(FuncVariable, None, nullptr); DebugVariable Var(FuncVariable, None, nullptr);
DbgValueProperties EmptyProps(EmptyExpr, false); DbgValueProperties EmptyProps(EmptyExpr, false, false);
SmallVector<DbgValue, 32> VLiveOuts; SmallVector<DbgValue, 32> VLiveOuts;
VLiveOuts.resize(5, DbgValue(EmptyProps, DbgValue::Undef)); VLiveOuts.resize(5, DbgValue(EmptyProps, DbgValue::Undef));
InstrRefBasedLDV::LiveIdxT VLiveOutIdx; InstrRefBasedLDV::LiveIdxT VLiveOutIdx;
VLiveOutIdx[MBB0] = &VLiveOuts[0]; VLiveOutIdx[MBB0] = &VLiveOuts[0];
VLiveOutIdx[MBB1] = &VLiveOuts[1]; VLiveOutIdx[MBB1] = &VLiveOuts[1];
VLiveOutIdx[MBB2] = &VLiveOuts[2]; VLiveOutIdx[MBB2] = &VLiveOuts[2];
VLiveOutIdx[MBB3] = &VLiveOuts[3]; VLiveOutIdx[MBB3] = &VLiveOuts[3];
VLiveOutIdx[MBB4] = &VLiveOuts[4]; VLiveOutIdx[MBB4] = &VLiveOuts[4];
▲ Show 20 Lines • Show All 112 Lines • ▼ Show 20 LinesTEST_F(InstrRefLDVTest, vlocJoinDiamond) {
unsigned EntryBlk = 0, Br2Blk = 2, RetBlk = 3; unsigned EntryBlk = 0, Br2Blk = 2, RetBlk = 3;
ValueIDNum LiveInRsp(EntryBlk, 0, RspLoc); ValueIDNum LiveInRsp(EntryBlk, 0, RspLoc);
ValueIDNum LiveInRax(EntryBlk, 0, RaxLoc); ValueIDNum LiveInRax(EntryBlk, 0, RaxLoc);
ValueIDNum RspPHIInBlkBr2Blk(Br2Blk, 0, RspLoc); ValueIDNum RspPHIInBlkBr2Blk(Br2Blk, 0, RspLoc);
ValueIDNum RspPHIInBlkRetBlk(RetBlk, 0, RspLoc); ValueIDNum RspPHIInBlkRetBlk(RetBlk, 0, RspLoc);
DebugVariable Var(FuncVariable, None, nullptr); DebugVariable Var(FuncVariable, None, nullptr);
DbgValueProperties EmptyProps(EmptyExpr, false); DbgValueProperties EmptyProps(EmptyExpr, false, false);
SmallVector<DbgValue, 32> VLiveOuts; SmallVector<DbgValue, 32> VLiveOuts;
VLiveOuts.resize(4, DbgValue(EmptyProps, DbgValue::Undef)); VLiveOuts.resize(4, DbgValue(EmptyProps, DbgValue::Undef));
InstrRefBasedLDV::LiveIdxT VLiveOutIdx; InstrRefBasedLDV::LiveIdxT VLiveOutIdx;
VLiveOutIdx[MBB0] = &VLiveOuts[0]; VLiveOutIdx[MBB0] = &VLiveOuts[0];
VLiveOutIdx[MBB1] = &VLiveOuts[1]; VLiveOutIdx[MBB1] = &VLiveOuts[1];
VLiveOutIdx[MBB2] = &VLiveOuts[2]; VLiveOutIdx[MBB2] = &VLiveOuts[2];
VLiveOutIdx[MBB3] = &VLiveOuts[3]; VLiveOutIdx[MBB3] = &VLiveOuts[3];
▲ Show 20 Lines • Show All 95 Lines • ▼ Show 20 LinesTEST_F(InstrRefLDVTest, vlocJoinDiamond) {
VLiveOuts[2] = DbgValue(0, EmptyProps, DbgValue::VPHI); VLiveOuts[2] = DbgValue(0, EmptyProps, DbgValue::VPHI);
JoinedLoc = DbgValue(2, EmptyProps, DbgValue::VPHI); JoinedLoc = DbgValue(2, EmptyProps, DbgValue::VPHI);
Result = vlocJoin(*MBB3, VLiveOutIdx, AllBlocks, JoinedLoc); Result = vlocJoin(*MBB3, VLiveOutIdx, AllBlocks, JoinedLoc);
EXPECT_TRUE(Result); EXPECT_TRUE(Result);
EXPECT_EQ(JoinedLoc.Kind, DbgValue::VPHI); EXPECT_EQ(JoinedLoc.Kind, DbgValue::VPHI);
EXPECT_EQ(JoinedLoc.BlockNo, 0); EXPECT_EQ(JoinedLoc.BlockNo, 0);
// We shouldn't eliminate PHIs when properties disagree. // We shouldn't eliminate PHIs when properties disagree.
DbgValueProperties PropsWithIndirect(EmptyExpr, true); DbgValueProperties PropsWithIndirect(EmptyExpr, true, false);
VLiveOuts[1] = DbgValue(LiveInRsp, EmptyProps, DbgValue::Def); VLiveOuts[1] = DbgValue(LiveInRsp, EmptyProps, DbgValue::Def);
VLiveOuts[2] = DbgValue(LiveInRsp, PropsWithIndirect, DbgValue::Def); VLiveOuts[2] = DbgValue(LiveInRsp, PropsWithIndirect, DbgValue::Def);
JoinedLoc = DbgValue(3, EmptyProps, DbgValue::VPHI); JoinedLoc = DbgValue(3, EmptyProps, DbgValue::VPHI);
Result = vlocJoin(*MBB3, VLiveOutIdx, AllBlocks, JoinedLoc); Result = vlocJoin(*MBB3, VLiveOutIdx, AllBlocks, JoinedLoc);
EXPECT_FALSE(Result); EXPECT_FALSE(Result);
EXPECT_EQ(JoinedLoc.Kind, DbgValue::VPHI); EXPECT_EQ(JoinedLoc.Kind, DbgValue::VPHI);
EXPECT_EQ(JoinedLoc.BlockNo, 3); EXPECT_EQ(JoinedLoc.BlockNo, 3);
Show All 10 LinesTEST_F(InstrRefLDVTest, vlocJoinDiamond) {
// Also check properties come from block 2, the first RPO predecessor to block // Also check properties come from block 2, the first RPO predecessor to block
// three. // three.
EXPECT_EQ(JoinedLoc.Properties, PropsWithIndirect); EXPECT_EQ(JoinedLoc.Properties, PropsWithIndirect);
// Again, disagreeing properties, this time the expr, should cause a PHI to // Again, disagreeing properties, this time the expr, should cause a PHI to
// not be eliminated. // not be eliminated.
DIExpression *NewExpr = DIExpression *NewExpr =
DIExpression::prepend(EmptyExpr, DIExpression::ApplyOffset, 4); DIExpression::prepend(EmptyExpr, DIExpression::ApplyOffset, 4);
DbgValueProperties PropsWithExpr(NewExpr, false); DbgValueProperties PropsWithExpr(NewExpr, false, false);
VLiveOuts[1] = DbgValue(LiveInRsp, EmptyProps, DbgValue::Def); VLiveOuts[1] = DbgValue(LiveInRsp, EmptyProps, DbgValue::Def);
VLiveOuts[2] = DbgValue(LiveInRsp, PropsWithExpr, DbgValue::Def); VLiveOuts[2] = DbgValue(LiveInRsp, PropsWithExpr, DbgValue::Def);
JoinedLoc = DbgValue(3, EmptyProps, DbgValue::VPHI); JoinedLoc = DbgValue(3, EmptyProps, DbgValue::VPHI);
Result = vlocJoin(*MBB3, VLiveOutIdx, AllBlocks, JoinedLoc); Result = vlocJoin(*MBB3, VLiveOutIdx, AllBlocks, JoinedLoc);
EXPECT_FALSE(Result); EXPECT_FALSE(Result);
} }
TEST_F(InstrRefLDVTest, vlocJoinLoops) { TEST_F(InstrRefLDVTest, vlocJoinLoops) {
Show All 12 LinesTEST_F(InstrRefLDVTest, vlocJoinLoops) {
unsigned EntryBlk = 0, LoopBlk = 1; unsigned EntryBlk = 0, LoopBlk = 1;
ValueIDNum LiveInRsp(EntryBlk, 0, RspLoc); ValueIDNum LiveInRsp(EntryBlk, 0, RspLoc);
ValueIDNum LiveInRax(EntryBlk, 0, RaxLoc); ValueIDNum LiveInRax(EntryBlk, 0, RaxLoc);
ValueIDNum RspPHIInBlk1(LoopBlk, 0, RspLoc); ValueIDNum RspPHIInBlk1(LoopBlk, 0, RspLoc);
DebugVariable Var(FuncVariable, None, nullptr); DebugVariable Var(FuncVariable, None, nullptr);
DbgValueProperties EmptyProps(EmptyExpr, false); DbgValueProperties EmptyProps(EmptyExpr, false, false);
SmallVector<DbgValue, 32> VLiveOuts; SmallVector<DbgValue, 32> VLiveOuts;
VLiveOuts.resize(3, DbgValue(EmptyProps, DbgValue::Undef)); VLiveOuts.resize(3, DbgValue(EmptyProps, DbgValue::Undef));
InstrRefBasedLDV::LiveIdxT VLiveOutIdx; InstrRefBasedLDV::LiveIdxT VLiveOutIdx;
VLiveOutIdx[MBB0] = &VLiveOuts[0]; VLiveOutIdx[MBB0] = &VLiveOuts[0];
VLiveOutIdx[MBB1] = &VLiveOuts[1]; VLiveOutIdx[MBB1] = &VLiveOuts[1];
VLiveOutIdx[MBB2] = &VLiveOuts[2]; VLiveOutIdx[MBB2] = &VLiveOuts[2];
SmallPtrSet<const MachineBasicBlock *, 8> AllBlocks; SmallPtrSet<const MachineBasicBlock *, 8> AllBlocks;
Show All 39 LinesTEST_F(InstrRefLDVTest, vlocJoinLoops) {
EXPECT_TRUE(Result); EXPECT_TRUE(Result);
EXPECT_EQ(JoinedLoc.Kind, DbgValue::Def); EXPECT_EQ(JoinedLoc.Kind, DbgValue::Def);
EXPECT_EQ(JoinedLoc.ID, LiveInRsp); EXPECT_EQ(JoinedLoc.ID, LiveInRsp);
// Don't eliminate backedge VPHIs if the predecessors have different // Don't eliminate backedge VPHIs if the predecessors have different
// properties. // properties.
DIExpression *NewExpr = DIExpression *NewExpr =
DIExpression::prepend(EmptyExpr, DIExpression::ApplyOffset, 4); DIExpression::prepend(EmptyExpr, DIExpression::ApplyOffset, 4);
DbgValueProperties PropsWithExpr(NewExpr, false); DbgValueProperties PropsWithExpr(NewExpr, false, false);
VLiveOuts[0] = DbgValue(LiveInRsp, EmptyProps, DbgValue::Def); VLiveOuts[0] = DbgValue(LiveInRsp, EmptyProps, DbgValue::Def);
VLiveOuts[1] = DbgValue(1, PropsWithExpr, DbgValue::VPHI); VLiveOuts[1] = DbgValue(1, PropsWithExpr, DbgValue::VPHI);
JoinedLoc = DbgValue(1, EmptyProps, DbgValue::VPHI); JoinedLoc = DbgValue(1, EmptyProps, DbgValue::VPHI);
Result = vlocJoin(*MBB1, VLiveOutIdx, AllBlocks, JoinedLoc); Result = vlocJoin(*MBB1, VLiveOutIdx, AllBlocks, JoinedLoc);
EXPECT_FALSE(Result); EXPECT_FALSE(Result);
EXPECT_EQ(JoinedLoc.Kind, DbgValue::VPHI); EXPECT_EQ(JoinedLoc.Kind, DbgValue::VPHI);
EXPECT_EQ(JoinedLoc.BlockNo, 1); EXPECT_EQ(JoinedLoc.BlockNo, 1);
Show All 30 LinesTEST_F(InstrRefLDVTest, vlocJoinBadlyNestedLoops) {
unsigned EntryBlk = 0; unsigned EntryBlk = 0;
ValueIDNum LiveInRsp(EntryBlk, 0, RspLoc); ValueIDNum LiveInRsp(EntryBlk, 0, RspLoc);
ValueIDNum LiveInRax(EntryBlk, 0, RaxLoc); ValueIDNum LiveInRax(EntryBlk, 0, RaxLoc);
ValueIDNum LiveInRbx(EntryBlk, 0, RbxLoc); ValueIDNum LiveInRbx(EntryBlk, 0, RbxLoc);
DebugVariable Var(FuncVariable, None, nullptr); DebugVariable Var(FuncVariable, None, nullptr);
DbgValueProperties EmptyProps(EmptyExpr, false); DbgValueProperties EmptyProps(EmptyExpr, false, false);
SmallVector<DbgValue, 32> VLiveOuts; SmallVector<DbgValue, 32> VLiveOuts;
VLiveOuts.resize(5, DbgValue(EmptyProps, DbgValue::Undef)); VLiveOuts.resize(5, DbgValue(EmptyProps, DbgValue::Undef));
InstrRefBasedLDV::LiveIdxT VLiveOutIdx; InstrRefBasedLDV::LiveIdxT VLiveOutIdx;
VLiveOutIdx[MBB0] = &VLiveOuts[0]; VLiveOutIdx[MBB0] = &VLiveOuts[0];
VLiveOutIdx[MBB1] = &VLiveOuts[1]; VLiveOutIdx[MBB1] = &VLiveOuts[1];
VLiveOutIdx[MBB2] = &VLiveOuts[2]; VLiveOutIdx[MBB2] = &VLiveOuts[2];
VLiveOutIdx[MBB3] = &VLiveOuts[3]; VLiveOutIdx[MBB3] = &VLiveOuts[3];
VLiveOutIdx[MBB4] = &VLiveOuts[4]; VLiveOutIdx[MBB4] = &VLiveOuts[4];
Show All 29 LinesTEST_F(InstrRefLDVTest, vlocJoinBadlyNestedLoops) {
VLiveOuts[2] = DbgValue(1, EmptyProps, DbgValue::VPHI); VLiveOuts[2] = DbgValue(1, EmptyProps, DbgValue::VPHI);
JoinedLoc = DbgValue(1, EmptyProps, DbgValue::VPHI); JoinedLoc = DbgValue(1, EmptyProps, DbgValue::VPHI);
Result = vlocJoin(*MBB1, VLiveOutIdx, AllBlocks, JoinedLoc); Result = vlocJoin(*MBB1, VLiveOutIdx, AllBlocks, JoinedLoc);
EXPECT_TRUE(Result); EXPECT_TRUE(Result);
EXPECT_EQ(JoinedLoc.Kind, DbgValue::Def); EXPECT_EQ(JoinedLoc.Kind, DbgValue::Def);
EXPECT_EQ(JoinedLoc.ID, LiveInRsp); EXPECT_EQ(JoinedLoc.ID, LiveInRsp);
// They shouldn't merge if one of their properties is different. // They shouldn't merge if one of their properties is different.
DbgValueProperties PropsWithIndirect(EmptyExpr, true); DbgValueProperties PropsWithIndirect(EmptyExpr, true, false);
VLiveOuts[0] = DbgValue(LiveInRsp, EmptyProps, DbgValue::Def); VLiveOuts[0] = DbgValue(LiveInRsp, EmptyProps, DbgValue::Def);
VLiveOuts[1] = DbgValue(1, EmptyProps, DbgValue::VPHI); VLiveOuts[1] = DbgValue(1, EmptyProps, DbgValue::VPHI);
VLiveOuts[2] = DbgValue(1, PropsWithIndirect, DbgValue::VPHI); VLiveOuts[2] = DbgValue(1, PropsWithIndirect, DbgValue::VPHI);
JoinedLoc = DbgValue(1, EmptyProps, DbgValue::VPHI); JoinedLoc = DbgValue(1, EmptyProps, DbgValue::VPHI);
Result = vlocJoin(*MBB1, VLiveOutIdx, AllBlocks, JoinedLoc); Result = vlocJoin(*MBB1, VLiveOutIdx, AllBlocks, JoinedLoc);
EXPECT_FALSE(Result); EXPECT_FALSE(Result);
EXPECT_EQ(JoinedLoc.Kind, DbgValue::VPHI); EXPECT_EQ(JoinedLoc.Kind, DbgValue::VPHI);
EXPECT_EQ(JoinedLoc.BlockNo, 1); EXPECT_EQ(JoinedLoc.BlockNo, 1);
Show All 22 LinesTEST_F(InstrRefLDVTest, VLocSingleBlock) {
FuncValueTable MInLocs, MOutLocs; FuncValueTable MInLocs, MOutLocs;
std::tie(MInLocs, MOutLocs) = allocValueTables(1, 2); std::tie(MInLocs, MOutLocs) = allocValueTables(1, 2);
ValueIDNum LiveInRsp = ValueIDNum(0, 0, RspLoc); ValueIDNum LiveInRsp = ValueIDNum(0, 0, RspLoc);
MInLocs[0][0] = MOutLocs[0][0] = LiveInRsp; MInLocs[0][0] = MOutLocs[0][0] = LiveInRsp;
DebugVariable Var(FuncVariable, None, nullptr); DebugVariable Var(FuncVariable, None, nullptr);
DbgValueProperties EmptyProps(EmptyExpr, false); DbgValueProperties EmptyProps(EmptyExpr, false, false);
SmallSet<DebugVariable, 4> AllVars; SmallSet<DebugVariable, 4> AllVars;
AllVars.insert(Var); AllVars.insert(Var);
// Mild hack: rather than constructing machine instructions in each block // Mild hack: rather than constructing machine instructions in each block
// and creating lexical scopes across them, instead just tell // and creating lexical scopes across them, instead just tell
// buildVLocValueMap that there's an assignment in every block. That makes // buildVLocValueMap that there's an assignment in every block. That makes
// every block in scope. // every block in scope.
▲ Show 20 Lines • Show All 43 Lines • ▼ Show 20 LinesTEST_F(InstrRefLDVTest, VLocDiamondBlocks) {
FuncValueTable MInLocs, MOutLocs; FuncValueTable MInLocs, MOutLocs;
std::tie(MInLocs, MOutLocs) = allocValueTables(4, 2); std::tie(MInLocs, MOutLocs) = allocValueTables(4, 2);
initValueArray(MInLocs, 4, 2); initValueArray(MInLocs, 4, 2);
initValueArray(MOutLocs, 4, 2); initValueArray(MOutLocs, 4, 2);
DebugVariable Var(FuncVariable, None, nullptr); DebugVariable Var(FuncVariable, None, nullptr);
DbgValueProperties EmptyProps(EmptyExpr, false); DbgValueProperties EmptyProps(EmptyExpr, false, false);
SmallSet<DebugVariable, 4> AllVars; SmallSet<DebugVariable, 4> AllVars;
AllVars.insert(Var); AllVars.insert(Var);
// Mild hack: rather than constructing machine instructions in each block // Mild hack: rather than constructing machine instructions in each block
// and creating lexical scopes across them, instead just tell // and creating lexical scopes across them, instead just tell
// buildVLocValueMap that there's an assignment in every block. That makes // buildVLocValueMap that there's an assignment in every block. That makes
// every block in scope. // every block in scope.
▲ Show 20 Lines • Show All 200 Lines • ▼ Show 20 LinesTEST_F(InstrRefLDVTest, VLocSimpleLoop) {
FuncValueTable MInLocs, MOutLocs; FuncValueTable MInLocs, MOutLocs;
std::tie(MInLocs, MOutLocs) = allocValueTables(3, 2); std::tie(MInLocs, MOutLocs) = allocValueTables(3, 2);
initValueArray(MInLocs, 3, 2); initValueArray(MInLocs, 3, 2);
initValueArray(MOutLocs, 3, 2); initValueArray(MOutLocs, 3, 2);
DebugVariable Var(FuncVariable, None, nullptr); DebugVariable Var(FuncVariable, None, nullptr);
DbgValueProperties EmptyProps(EmptyExpr, false); DbgValueProperties EmptyProps(EmptyExpr, false, false);
SmallSet<DebugVariable, 4> AllVars; SmallSet<DebugVariable, 4> AllVars;
AllVars.insert(Var); AllVars.insert(Var);
SmallPtrSet<MachineBasicBlock *, 4> AssignBlocks; SmallPtrSet<MachineBasicBlock *, 4> AssignBlocks;
AssignBlocks.insert(MBB0); AssignBlocks.insert(MBB0);
AssignBlocks.insert(MBB1); AssignBlocks.insert(MBB1);
AssignBlocks.insert(MBB2); AssignBlocks.insert(MBB2);
▲ Show 20 Lines • Show All 236 Lines • ▼ Show 20 LinesTEST_F(InstrRefLDVTest, VLocNestedLoop) {
FuncValueTable MInLocs, MOutLocs; FuncValueTable MInLocs, MOutLocs;
std::tie(MInLocs, MOutLocs) = allocValueTables(5, 2); std::tie(MInLocs, MOutLocs) = allocValueTables(5, 2);
initValueArray(MInLocs, 5, 2); initValueArray(MInLocs, 5, 2);
initValueArray(MOutLocs, 5, 2); initValueArray(MOutLocs, 5, 2);
DebugVariable Var(FuncVariable, None, nullptr); DebugVariable Var(FuncVariable, None, nullptr);
DbgValueProperties EmptyProps(EmptyExpr, false); DbgValueProperties EmptyProps(EmptyExpr, false, false);
SmallSet<DebugVariable, 4> AllVars; SmallSet<DebugVariable, 4> AllVars;
AllVars.insert(Var); AllVars.insert(Var);
SmallPtrSet<MachineBasicBlock *, 5> AssignBlocks; SmallPtrSet<MachineBasicBlock *, 5> AssignBlocks;
AssignBlocks.insert(MBB0); AssignBlocks.insert(MBB0);
AssignBlocks.insert(MBB1); AssignBlocks.insert(MBB1);
AssignBlocks.insert(MBB2); AssignBlocks.insert(MBB2);
▲ Show 20 Lines • Show All 194 Lines • Show Last 20 Lines