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llvm/test/Transforms/SLPVectorizer/X86/intrinsic.ll

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} }
define void @vec_ctlz_i32_neg(i32* %a, i32* %b, i32* %c, i1) { define void @vec_ctlz_i32_neg(i32* %a, i32* %b, i32* %c, i1) {
; CHECK-LABEL: @vec_ctlz_i32_neg( ; CHECK-LABEL: @vec_ctlz_i32_neg(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[I0:%.*]] = load i32, i32* [[A:%.*]], align 4 ; CHECK-NEXT: [[I0:%.*]] = load i32, i32* [[A:%.*]], align 4
; CHECK-NEXT: [[I1:%.*]] = load i32, i32* [[B:%.*]], align 4 ; CHECK-NEXT: [[I1:%.*]] = load i32, i32* [[B:%.*]], align 4
; CHECK-NEXT: [[ADD1:%.*]] = add i32 [[I0]], [[I1]] ; CHECK-NEXT: [[ADD1:%.*]] = add i32 [[I0]], [[I1]]
; CHECK-NEXT: [[CALL1:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[ADD1]], i1 true) #[[ATTR3:[0-9]+]] ; CHECK-NEXT: [[CALL1:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[ADD1]], i1 true) #[[ATTR5:[0-9]+]]
; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, i32* [[A]], i32 1 ; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, i32* [[A]], i32 1
; CHECK-NEXT: [[I2:%.*]] = load i32, i32* [[ARRAYIDX2]], align 4 ; CHECK-NEXT: [[I2:%.*]] = load i32, i32* [[ARRAYIDX2]], align 4
; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i32, i32* [[B]], i32 1 ; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i32, i32* [[B]], i32 1
; CHECK-NEXT: [[I3:%.*]] = load i32, i32* [[ARRAYIDX3]], align 4 ; CHECK-NEXT: [[I3:%.*]] = load i32, i32* [[ARRAYIDX3]], align 4
; CHECK-NEXT: [[ADD2:%.*]] = add i32 [[I2]], [[I3]] ; CHECK-NEXT: [[ADD2:%.*]] = add i32 [[I2]], [[I3]]
; CHECK-NEXT: [[CALL2:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[ADD2]], i1 false) #[[ATTR3]] ; CHECK-NEXT: [[CALL2:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[ADD2]], i1 false) #[[ATTR5]]
; CHECK-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds i32, i32* [[A]], i32 2 ; CHECK-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds i32, i32* [[A]], i32 2
; CHECK-NEXT: [[I4:%.*]] = load i32, i32* [[ARRAYIDX4]], align 4 ; CHECK-NEXT: [[I4:%.*]] = load i32, i32* [[ARRAYIDX4]], align 4
; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds i32, i32* [[B]], i32 2 ; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds i32, i32* [[B]], i32 2
; CHECK-NEXT: [[I5:%.*]] = load i32, i32* [[ARRAYIDX5]], align 4 ; CHECK-NEXT: [[I5:%.*]] = load i32, i32* [[ARRAYIDX5]], align 4
; CHECK-NEXT: [[ADD3:%.*]] = add i32 [[I4]], [[I5]] ; CHECK-NEXT: [[ADD3:%.*]] = add i32 [[I4]], [[I5]]
; CHECK-NEXT: [[CALL3:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[ADD3]], i1 true) #[[ATTR3]] ; CHECK-NEXT: [[CALL3:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[ADD3]], i1 true) #[[ATTR5]]
; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i32, i32* [[A]], i32 3 ; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i32, i32* [[A]], i32 3
; CHECK-NEXT: [[I6:%.*]] = load i32, i32* [[ARRAYIDX6]], align 4 ; CHECK-NEXT: [[I6:%.*]] = load i32, i32* [[ARRAYIDX6]], align 4
; CHECK-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds i32, i32* [[B]], i32 3 ; CHECK-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds i32, i32* [[B]], i32 3
; CHECK-NEXT: [[I7:%.*]] = load i32, i32* [[ARRAYIDX7]], align 4 ; CHECK-NEXT: [[I7:%.*]] = load i32, i32* [[ARRAYIDX7]], align 4
; CHECK-NEXT: [[ADD4:%.*]] = add i32 [[I6]], [[I7]] ; CHECK-NEXT: [[ADD4:%.*]] = add i32 [[I6]], [[I7]]
; CHECK-NEXT: [[CALL4:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[ADD4]], i1 false) #[[ATTR3]] ; CHECK-NEXT: [[CALL4:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[ADD4]], i1 false) #[[ATTR5]]
; CHECK-NEXT: store i32 [[CALL1]], i32* [[C:%.*]], align 4 ; CHECK-NEXT: store i32 [[CALL1]], i32* [[C:%.*]], align 4
; CHECK-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i32, i32* [[C]], i32 1 ; CHECK-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i32, i32* [[C]], i32 1
; CHECK-NEXT: store i32 [[CALL2]], i32* [[ARRAYIDX8]], align 4 ; CHECK-NEXT: store i32 [[CALL2]], i32* [[ARRAYIDX8]], align 4
; CHECK-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds i32, i32* [[C]], i32 2 ; CHECK-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds i32, i32* [[C]], i32 2
; CHECK-NEXT: store i32 [[CALL3]], i32* [[ARRAYIDX9]], align 4 ; CHECK-NEXT: store i32 [[CALL3]], i32* [[ARRAYIDX9]], align 4
; CHECK-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds i32, i32* [[C]], i32 3 ; CHECK-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds i32, i32* [[C]], i32 3
; CHECK-NEXT: store i32 [[CALL4]], i32* [[ARRAYIDX10]], align 4 ; CHECK-NEXT: store i32 [[CALL4]], i32* [[ARRAYIDX10]], align 4
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
▲ Show 20 Lines • Show All 92 Lines • ▼ Show 20 Lines
} }
define void @vec_cttz_i32_neg(i32* %a, i32* %b, i32* %c, i1) { define void @vec_cttz_i32_neg(i32* %a, i32* %b, i32* %c, i1) {
; CHECK-LABEL: @vec_cttz_i32_neg( ; CHECK-LABEL: @vec_cttz_i32_neg(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[I0:%.*]] = load i32, i32* [[A:%.*]], align 4 ; CHECK-NEXT: [[I0:%.*]] = load i32, i32* [[A:%.*]], align 4
; CHECK-NEXT: [[I1:%.*]] = load i32, i32* [[B:%.*]], align 4 ; CHECK-NEXT: [[I1:%.*]] = load i32, i32* [[B:%.*]], align 4
; CHECK-NEXT: [[ADD1:%.*]] = add i32 [[I0]], [[I1]] ; CHECK-NEXT: [[ADD1:%.*]] = add i32 [[I0]], [[I1]]
; CHECK-NEXT: [[CALL1:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[ADD1]], i1 true) #[[ATTR3]] ; CHECK-NEXT: [[CALL1:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[ADD1]], i1 true) #[[ATTR5]]
; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, i32* [[A]], i32 1 ; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, i32* [[A]], i32 1
; CHECK-NEXT: [[I2:%.*]] = load i32, i32* [[ARRAYIDX2]], align 4 ; CHECK-NEXT: [[I2:%.*]] = load i32, i32* [[ARRAYIDX2]], align 4
; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i32, i32* [[B]], i32 1 ; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i32, i32* [[B]], i32 1
; CHECK-NEXT: [[I3:%.*]] = load i32, i32* [[ARRAYIDX3]], align 4 ; CHECK-NEXT: [[I3:%.*]] = load i32, i32* [[ARRAYIDX3]], align 4
; CHECK-NEXT: [[ADD2:%.*]] = add i32 [[I2]], [[I3]] ; CHECK-NEXT: [[ADD2:%.*]] = add i32 [[I2]], [[I3]]
; CHECK-NEXT: [[CALL2:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[ADD2]], i1 false) #[[ATTR3]] ; CHECK-NEXT: [[CALL2:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[ADD2]], i1 false) #[[ATTR5]]
; CHECK-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds i32, i32* [[A]], i32 2 ; CHECK-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds i32, i32* [[A]], i32 2
; CHECK-NEXT: [[I4:%.*]] = load i32, i32* [[ARRAYIDX4]], align 4 ; CHECK-NEXT: [[I4:%.*]] = load i32, i32* [[ARRAYIDX4]], align 4
; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds i32, i32* [[B]], i32 2 ; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds i32, i32* [[B]], i32 2
; CHECK-NEXT: [[I5:%.*]] = load i32, i32* [[ARRAYIDX5]], align 4 ; CHECK-NEXT: [[I5:%.*]] = load i32, i32* [[ARRAYIDX5]], align 4
; CHECK-NEXT: [[ADD3:%.*]] = add i32 [[I4]], [[I5]] ; CHECK-NEXT: [[ADD3:%.*]] = add i32 [[I4]], [[I5]]
; CHECK-NEXT: [[CALL3:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[ADD3]], i1 true) #[[ATTR3]] ; CHECK-NEXT: [[CALL3:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[ADD3]], i1 true) #[[ATTR5]]
; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i32, i32* [[A]], i32 3 ; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i32, i32* [[A]], i32 3
; CHECK-NEXT: [[I6:%.*]] = load i32, i32* [[ARRAYIDX6]], align 4 ; CHECK-NEXT: [[I6:%.*]] = load i32, i32* [[ARRAYIDX6]], align 4
; CHECK-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds i32, i32* [[B]], i32 3 ; CHECK-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds i32, i32* [[B]], i32 3
; CHECK-NEXT: [[I7:%.*]] = load i32, i32* [[ARRAYIDX7]], align 4 ; CHECK-NEXT: [[I7:%.*]] = load i32, i32* [[ARRAYIDX7]], align 4
; CHECK-NEXT: [[ADD4:%.*]] = add i32 [[I6]], [[I7]] ; CHECK-NEXT: [[ADD4:%.*]] = add i32 [[I6]], [[I7]]
; CHECK-NEXT: [[CALL4:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[ADD4]], i1 false) #[[ATTR3]] ; CHECK-NEXT: [[CALL4:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[ADD4]], i1 false) #[[ATTR5]]
; CHECK-NEXT: store i32 [[CALL1]], i32* [[C:%.*]], align 4 ; CHECK-NEXT: store i32 [[CALL1]], i32* [[C:%.*]], align 4
; CHECK-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i32, i32* [[C]], i32 1 ; CHECK-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i32, i32* [[C]], i32 1
; CHECK-NEXT: store i32 [[CALL2]], i32* [[ARRAYIDX8]], align 4 ; CHECK-NEXT: store i32 [[CALL2]], i32* [[ARRAYIDX8]], align 4
; CHECK-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds i32, i32* [[C]], i32 2 ; CHECK-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds i32, i32* [[C]], i32 2
; CHECK-NEXT: store i32 [[CALL3]], i32* [[ARRAYIDX9]], align 4 ; CHECK-NEXT: store i32 [[CALL3]], i32* [[ARRAYIDX9]], align 4
; CHECK-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds i32, i32* [[C]], i32 3 ; CHECK-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds i32, i32* [[C]], i32 3
; CHECK-NEXT: store i32 [[CALL4]], i32* [[ARRAYIDX10]], align 4 ; CHECK-NEXT: store i32 [[CALL4]], i32* [[ARRAYIDX10]], align 4
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
▲ Show 20 Lines • Show All 91 Lines • ▼ Show 20 Lines
define void @vec_powi_f32_neg(float* %a, float* %b, float* %c, i32 %P, i32 %Q) { define void @vec_powi_f32_neg(float* %a, float* %b, float* %c, i32 %P, i32 %Q) {
; CHECK-LABEL: @vec_powi_f32_neg( ; CHECK-LABEL: @vec_powi_f32_neg(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[I0:%.*]] = load float, float* [[A:%.*]], align 4 ; CHECK-NEXT: [[I0:%.*]] = load float, float* [[A:%.*]], align 4
; CHECK-NEXT: [[I1:%.*]] = load float, float* [[B:%.*]], align 4 ; CHECK-NEXT: [[I1:%.*]] = load float, float* [[B:%.*]], align 4
; CHECK-NEXT: [[ADD1:%.*]] = fadd float [[I0]], [[I1]] ; CHECK-NEXT: [[ADD1:%.*]] = fadd float [[I0]], [[I1]]
; CHECK-NEXT: [[CALL1:%.*]] = tail call float @llvm.powi.f32.i32(float [[ADD1]], i32 [[P:%.*]]) #[[ATTR3]] ; CHECK-NEXT: [[CALL1:%.*]] = tail call float @llvm.powi.f32.i32(float [[ADD1]], i32 [[P:%.*]]) #[[ATTR5]]
; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, float* [[A]], i32 1 ; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, float* [[A]], i32 1
; CHECK-NEXT: [[I2:%.*]] = load float, float* [[ARRAYIDX2]], align 4 ; CHECK-NEXT: [[I2:%.*]] = load float, float* [[ARRAYIDX2]], align 4
; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds float, float* [[B]], i32 1 ; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds float, float* [[B]], i32 1
; CHECK-NEXT: [[I3:%.*]] = load float, float* [[ARRAYIDX3]], align 4 ; CHECK-NEXT: [[I3:%.*]] = load float, float* [[ARRAYIDX3]], align 4
; CHECK-NEXT: [[ADD2:%.*]] = fadd float [[I2]], [[I3]] ; CHECK-NEXT: [[ADD2:%.*]] = fadd float [[I2]], [[I3]]
; CHECK-NEXT: [[CALL2:%.*]] = tail call float @llvm.powi.f32.i32(float [[ADD2]], i32 [[Q:%.*]]) #[[ATTR3]] ; CHECK-NEXT: [[CALL2:%.*]] = tail call float @llvm.powi.f32.i32(float [[ADD2]], i32 [[Q:%.*]]) #[[ATTR5]]
; CHECK-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds float, float* [[A]], i32 2 ; CHECK-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds float, float* [[A]], i32 2
; CHECK-NEXT: [[I4:%.*]] = load float, float* [[ARRAYIDX4]], align 4 ; CHECK-NEXT: [[I4:%.*]] = load float, float* [[ARRAYIDX4]], align 4
; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds float, float* [[B]], i32 2 ; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds float, float* [[B]], i32 2
; CHECK-NEXT: [[I5:%.*]] = load float, float* [[ARRAYIDX5]], align 4 ; CHECK-NEXT: [[I5:%.*]] = load float, float* [[ARRAYIDX5]], align 4
; CHECK-NEXT: [[ADD3:%.*]] = fadd float [[I4]], [[I5]] ; CHECK-NEXT: [[ADD3:%.*]] = fadd float [[I4]], [[I5]]
; CHECK-NEXT: [[CALL3:%.*]] = tail call float @llvm.powi.f32.i32(float [[ADD3]], i32 [[P]]) #[[ATTR3]] ; CHECK-NEXT: [[CALL3:%.*]] = tail call float @llvm.powi.f32.i32(float [[ADD3]], i32 [[P]]) #[[ATTR5]]
; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds float, float* [[A]], i32 3 ; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds float, float* [[A]], i32 3
; CHECK-NEXT: [[I6:%.*]] = load float, float* [[ARRAYIDX6]], align 4 ; CHECK-NEXT: [[I6:%.*]] = load float, float* [[ARRAYIDX6]], align 4
; CHECK-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds float, float* [[B]], i32 3 ; CHECK-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds float, float* [[B]], i32 3
; CHECK-NEXT: [[I7:%.*]] = load float, float* [[ARRAYIDX7]], align 4 ; CHECK-NEXT: [[I7:%.*]] = load float, float* [[ARRAYIDX7]], align 4
; CHECK-NEXT: [[ADD4:%.*]] = fadd float [[I6]], [[I7]] ; CHECK-NEXT: [[ADD4:%.*]] = fadd float [[I6]], [[I7]]
; CHECK-NEXT: [[CALL4:%.*]] = tail call float @llvm.powi.f32.i32(float [[ADD4]], i32 [[Q]]) #[[ATTR3]] ; CHECK-NEXT: [[CALL4:%.*]] = tail call float @llvm.powi.f32.i32(float [[ADD4]], i32 [[Q]]) #[[ATTR5]]
; CHECK-NEXT: store float [[CALL1]], float* [[C:%.*]], align 4 ; CHECK-NEXT: store float [[CALL1]], float* [[C:%.*]], align 4
; CHECK-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds float, float* [[C]], i32 1 ; CHECK-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds float, float* [[C]], i32 1
; CHECK-NEXT: store float [[CALL2]], float* [[ARRAYIDX8]], align 4 ; CHECK-NEXT: store float [[CALL2]], float* [[ARRAYIDX8]], align 4
; CHECK-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds float, float* [[C]], i32 2 ; CHECK-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds float, float* [[C]], i32 2
; CHECK-NEXT: store float [[CALL3]], float* [[ARRAYIDX9]], align 4 ; CHECK-NEXT: store float [[CALL3]], float* [[ARRAYIDX9]], align 4
; CHECK-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds float, float* [[C]], i32 3 ; CHECK-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds float, float* [[C]], i32 3
; CHECK-NEXT: store float [[CALL4]], float* [[ARRAYIDX10]], align 4 ; CHECK-NEXT: store float [[CALL4]], float* [[ARRAYIDX10]], align 4
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
Show All 30 Linesentry:
store float %call2, float* %arrayidx8, align 4 store float %call2, float* %arrayidx8, align 4
%arrayidx9 = getelementptr inbounds float, float* %c, i32 2 %arrayidx9 = getelementptr inbounds float, float* %c, i32 2
store float %call3, float* %arrayidx9, align 4 store float %call3, float* %arrayidx9, align 4
%arrayidx10 = getelementptr inbounds float, float* %c, i32 3 %arrayidx10 = getelementptr inbounds float, float* %c, i32 3
store float %call4, float* %arrayidx10, align 4 store float %call4, float* %arrayidx10, align 4
ret void ret void
} }
declare i1 @llvm.is.fpclass.f32(float, i32)
define void @vec_is_fpclass(float* %a, float* %b, i32* %c) {
; CHECK-LABEL: @vec_is_fpclass(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = bitcast float* [[A:%.*]] to <4 x float>*
; CHECK-NEXT: [[TMP1:%.*]] = load <4 x float>, <4 x float>* [[TMP0]], align 4
; CHECK-NEXT: [[TMP2:%.*]] = bitcast float* [[B:%.*]] to <4 x float>*
; CHECK-NEXT: [[TMP3:%.*]] = load <4 x float>, <4 x float>* [[TMP2]], align 4
; CHECK-NEXT: [[TMP4:%.*]] = fadd <4 x float> [[TMP1]], [[TMP3]]
; CHECK-NEXT: [[TMP5:%.*]] = call <4 x i1> @llvm.is.fpclass.v4f32(<4 x float> [[TMP4]], i32 1)
; CHECK-NEXT: [[TMP6:%.*]] = zext <4 x i1> [[TMP5]] to <4 x i32>
; CHECK-NEXT: [[TMP7:%.*]] = bitcast i32* [[C:%.*]] to <4 x i32>*
; CHECK-NEXT: store <4 x i32> [[TMP6]], <4 x i32>* [[TMP7]], align 4
; CHECK-NEXT: ret void
;
entry:
%i0 = load float, float* %a, align 4
%i1 = load float, float* %b, align 4
%add1 = fadd float %i0, %i1
%call1 = tail call i1 @llvm.is.fpclass.f32(float %add1, i32 1)
%call1.ext = zext i1 %call1 to i32
%arrayidx2 = getelementptr inbounds float, float* %a, i32 1
%i2 = load float, float* %arrayidx2, align 4
%arrayidx3 = getelementptr inbounds float, float* %b, i32 1
%i3 = load float, float* %arrayidx3, align 4
%add2 = fadd float %i2, %i3
%call2 = tail call i1 @llvm.is.fpclass.f32(float %add2, i32 1)
%call2.ext = zext i1 %call2 to i32
%arrayidx4 = getelementptr inbounds float, float* %a, i32 2
%i4 = load float, float* %arrayidx4, align 4
%arrayidx5 = getelementptr inbounds float, float* %b, i32 2
%i5 = load float, float* %arrayidx5, align 4
%add3 = fadd float %i4, %i5
%call3 = tail call i1 @llvm.is.fpclass.f32(float %add3, i32 1)
%call3.ext = zext i1 %call3 to i32
%arrayidx6 = getelementptr inbounds float, float* %a, i32 3
%i6 = load float, float* %arrayidx6, align 4
arsenmUnsubmitted
Not Done
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Should use opaque pointers

arsenm: Should use opaque pointers
%arrayidx7 = getelementptr inbounds float, float* %b, i32 3
%i7 = load float, float* %arrayidx7, align 4
%add4 = fadd float %i6, %i7
%call4 = tail call i1 @llvm.is.fpclass.f32(float %add4, i32 1)
%call4.ext = zext i1 %call4 to i32
store i32 %call1.ext, i32* %c, align 4
%arrayidx8 = getelementptr inbounds i32, i32* %c, i32 1
store i32 %call2.ext, i32* %arrayidx8, align 4
%arrayidx9 = getelementptr inbounds i32, i32* %c, i32 2
store i32 %call3.ext, i32* %arrayidx9, align 4
%arrayidx10 = getelementptr inbounds i32, i32* %c, i32 3
store i32 %call4.ext, i32* %arrayidx10, align 4
ret void
}
arsenmUnsubmitted
Not Done
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Should add tests where elements have different test masks

arsenm: Should add tests where elements have different test masks