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llvm/utils/TableGen/RegisterInfoEmitter.cpp
| Show First 20 Lines • Show All 1,607 Lines • ▼ Show 20 Lines | for (unsigned i = 0, e = CSRSets.size(); i != e; ++i) { | ||||
| // Add those registers to RegMask, but not to SaveList. | // Add those registers to RegMask, but not to SaveList. | ||||
| if (DagInit *OPDag = | if (DagInit *OPDag = | ||||
| dyn_cast<DagInit>(CSRSet->getValueInit("OtherPreserved"))) { | dyn_cast<DagInit>(CSRSet->getValueInit("OtherPreserved"))) { | ||||
| SetTheory::RecSet OPSet; | SetTheory::RecSet OPSet; | ||||
| RegBank.getSets().evaluate(OPDag, OPSet, CSRSet->getLoc()); | RegBank.getSets().evaluate(OPDag, OPSet, CSRSet->getLoc()); | ||||
| Covered |= RegBank.computeCoveredRegisters( | Covered |= RegBank.computeCoveredRegisters( | ||||
| ArrayRef<Record*>(OPSet.begin(), OPSet.end())); | ArrayRef<Record*>(OPSet.begin(), OPSet.end())); | ||||
| } | } | ||||
| // Add all constant physical registers to the preserved mask: | |||||
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| SetTheory::RecSet ConstantSet; | |||||
| for (auto& Reg : RegBank.getRegisters()) { | |||||
| if (Reg.Constant) | |||||
| ConstantSet.insert(Reg.TheDef); | |||||
| } | |||||
| Covered |= RegBank.computeCoveredRegisters( | |||||
| ArrayRef<Record*>(ConstantSet.begin(), ConstantSet.end())); | |||||
| OS << "static const uint32_t " << CSRSet->getName() | OS << "static const uint32_t " << CSRSet->getName() | ||||
| << "_RegMask[] = { "; | << "_RegMask[] = { "; | ||||
| printBitVectorAsHex(OS, Covered, 32); | printBitVectorAsHex(OS, Covered, 32); | ||||
| OS << "};\n"; | OS << "};\n"; | ||||
| } | } | ||||
| OS << "\n\n"; | OS << "\n\n"; | ||||
| ▲ Show 20 Lines • Show All 170 Lines • Show Last 20 Lines | |||||
New line before the comment like above