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Differential D131958 Diff 452969 llvm/lib/Target/Mips/MipsRegisterInfo.td

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llvm/lib/Target/Mips/MipsRegisterInfo.td

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class HWR<bits<16> Enc, string n> : MipsReg<Enc, n>; class HWR<bits<16> Enc, string n> : MipsReg<Enc, n>;
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// Registers // Registers
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
let Namespace = "Mips" in { let Namespace = "Mips" in {
// General Purpose Registers // General Purpose Registers
def ZERO : MipsGPRReg< 0, "zero">, DwarfRegNum<[0]>; def ZERO : MipsGPRReg< 0, "zero">, DwarfRegNum<[0]> { let isConstant = true; }
def AT : MipsGPRReg< 1, "1">, DwarfRegNum<[1]>; def AT : MipsGPRReg< 1, "1">, DwarfRegNum<[1]>;
def V0 : MipsGPRReg< 2, "2">, DwarfRegNum<[2]>; def V0 : MipsGPRReg< 2, "2">, DwarfRegNum<[2]>;
def V1 : MipsGPRReg< 3, "3">, DwarfRegNum<[3]>; def V1 : MipsGPRReg< 3, "3">, DwarfRegNum<[3]>;
def A0 : MipsGPRReg< 4, "4">, DwarfRegNum<[4]>; def A0 : MipsGPRReg< 4, "4">, DwarfRegNum<[4]>;
def A1 : MipsGPRReg< 5, "5">, DwarfRegNum<[5]>; def A1 : MipsGPRReg< 5, "5">, DwarfRegNum<[5]>;
def A2 : MipsGPRReg< 6, "6">, DwarfRegNum<[6]>; def A2 : MipsGPRReg< 6, "6">, DwarfRegNum<[6]>;
def A3 : MipsGPRReg< 7, "7">, DwarfRegNum<[7]>; def A3 : MipsGPRReg< 7, "7">, DwarfRegNum<[7]>;
def T0 : MipsGPRReg< 8, "8">, DwarfRegNum<[8]>; def T0 : MipsGPRReg< 8, "8">, DwarfRegNum<[8]>;
Show All 17 Lineslet Namespace = "Mips" in {
def K0 : MipsGPRReg< 26, "26">, DwarfRegNum<[26]>; def K0 : MipsGPRReg< 26, "26">, DwarfRegNum<[26]>;
def K1 : MipsGPRReg< 27, "27">, DwarfRegNum<[27]>; def K1 : MipsGPRReg< 27, "27">, DwarfRegNum<[27]>;
def GP : MipsGPRReg< 28, "gp">, DwarfRegNum<[28]>; def GP : MipsGPRReg< 28, "gp">, DwarfRegNum<[28]>;
def SP : MipsGPRReg< 29, "sp">, DwarfRegNum<[29]>; def SP : MipsGPRReg< 29, "sp">, DwarfRegNum<[29]>;
def FP : MipsGPRReg< 30, "fp">, DwarfRegNum<[30]>; def FP : MipsGPRReg< 30, "fp">, DwarfRegNum<[30]>;
def RA : MipsGPRReg< 31, "ra">, DwarfRegNum<[31]>; def RA : MipsGPRReg< 31, "ra">, DwarfRegNum<[31]>;
// General Purpose 64-bit Registers // General Purpose 64-bit Registers
def ZERO_64 : Mips64GPRReg< 0, "zero", [ZERO]>, DwarfRegNum<[0]>; def ZERO_64 : Mips64GPRReg< 0, "zero", [ZERO]>, DwarfRegNum<[0]> { let isConstant = true; }
def AT_64 : Mips64GPRReg< 1, "1", [AT]>, DwarfRegNum<[1]>; def AT_64 : Mips64GPRReg< 1, "1", [AT]>, DwarfRegNum<[1]>;
def V0_64 : Mips64GPRReg< 2, "2", [V0]>, DwarfRegNum<[2]>; def V0_64 : Mips64GPRReg< 2, "2", [V0]>, DwarfRegNum<[2]>;
def V1_64 : Mips64GPRReg< 3, "3", [V1]>, DwarfRegNum<[3]>; def V1_64 : Mips64GPRReg< 3, "3", [V1]>, DwarfRegNum<[3]>;
def A0_64 : Mips64GPRReg< 4, "4", [A0]>, DwarfRegNum<[4]>; def A0_64 : Mips64GPRReg< 4, "4", [A0]>, DwarfRegNum<[4]>;
def A1_64 : Mips64GPRReg< 5, "5", [A1]>, DwarfRegNum<[5]>; def A1_64 : Mips64GPRReg< 5, "5", [A1]>, DwarfRegNum<[5]>;
def A2_64 : Mips64GPRReg< 6, "6", [A2]>, DwarfRegNum<[6]>; def A2_64 : Mips64GPRReg< 6, "6", [A2]>, DwarfRegNum<[6]>;
def A3_64 : Mips64GPRReg< 7, "7", [A3]>, DwarfRegNum<[7]>; def A3_64 : Mips64GPRReg< 7, "7", [A3]>, DwarfRegNum<[7]>;
def T0_64 : Mips64GPRReg< 8, "8", [T0]>, DwarfRegNum<[8]>; def T0_64 : Mips64GPRReg< 8, "8", [T0]>, DwarfRegNum<[8]>;
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