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Differential D130692 Diff 448277 llvm/test/CodeGen/AArch64/sve-gather-scatter-dag-combine.ll

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llvm/test/CodeGen/AArch64/sve-gather-scatter-dag-combine.ll

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ret <vscale x 2 x i64> %res ret <vscale x 2 x i64> %res
} }
define <vscale x 16 x i8> @narrow_i64_gather_index_i8(i8* %out, i8* %in, <vscale x 16 x i8> %d, i64 %ptr){ define <vscale x 16 x i8> @narrow_i64_gather_index_i8(i8* %out, i8* %in, <vscale x 16 x i8> %d, i64 %ptr){
; CHECK-LABEL: narrow_i64_gather_index_i8: ; CHECK-LABEL: narrow_i64_gather_index_i8:
; CHECK: // %bb.0: ; CHECK: // %bb.0:
; CHECK-NEXT: add x8, x1, x2 ; CHECK-NEXT: add x8, x1, x2
; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: ptrue p0.s
; CHECK-NEXT: ld1b { z0.d }, p0/z, [x1, x2] ; CHECK-NEXT: ld1b { z0.s }, p0/z, [x1, x2]
; CHECK-NEXT: ld1b { z1.d }, p0/z, [x8, #1, mul vl] ; CHECK-NEXT: ld1b { z1.s }, p0/z, [x8, #1, mul vl]
; CHECK-NEXT: ld1b { z2.d }, p0/z, [x8, #2, mul vl] ; CHECK-NEXT: ld1b { z2.s }, p0/z, [x8, #2, mul vl]
; CHECK-NEXT: ld1b { z3.d }, p0/z, [x8, #3, mul vl] ; CHECK-NEXT: ld1b { z3.s }, p0/z, [x8, #3, mul vl]
; CHECK-NEXT: ld1b { z4.d }, p0/z, [x8, #4, mul vl] ; CHECK-NEXT: ld1b { z3.s }, p0/z, [x1, z3.s, uxtw]
; CHECK-NEXT: ld1b { z5.d }, p0/z, [x8, #5, mul vl] ; CHECK-NEXT: ld1b { z2.s }, p0/z, [x1, z2.s, uxtw]
; CHECK-NEXT: ld1b { z6.d }, p0/z, [x8, #6, mul vl] ; CHECK-NEXT: ld1b { z0.s }, p0/z, [x1, z0.s, uxtw]
; CHECK-NEXT: ld1b { z7.d }, p0/z, [x8, #7, mul vl] ; CHECK-NEXT: ld1b { z1.s }, p0/z, [x1, z1.s, uxtw]
; CHECK-NEXT: ld1b { z7.d }, p0/z, [x1, z7.d] ; CHECK-NEXT: uzp1 z2.h, z2.h, z3.h
; CHECK-NEXT: ld1b { z6.d }, p0/z, [x1, z6.d] ; CHECK-NEXT: uzp1 z0.h, z0.h, z1.h
; CHECK-NEXT: ld1b { z5.d }, p0/z, [x1, z5.d] ; CHECK-NEXT: uzp1 z0.b, z0.b, z2.b
; CHECK-NEXT: ld1b { z4.d }, p0/z, [x1, z4.d]
; CHECK-NEXT: ld1b { z3.d }, p0/z, [x1, z3.d]
; CHECK-NEXT: ld1b { z2.d }, p0/z, [x1, z2.d]
; CHECK-NEXT: ld1b { z0.d }, p0/z, [x1, z0.d]
; CHECK-NEXT: ld1b { z1.d }, p0/z, [x1, z1.d]
; CHECK-NEXT: uzp1 z6.s, z6.s, z7.s
; CHECK-NEXT: uzp1 z4.s, z4.s, z5.s
; CHECK-NEXT: uzp1 z2.s, z2.s, z3.s
; CHECK-NEXT: uzp1 z0.s, z0.s, z1.s
; CHECK-NEXT: uzp1 z1.h, z4.h, z6.h
; CHECK-NEXT: uzp1 z0.h, z0.h, z2.h
; CHECK-NEXT: uzp1 z0.b, z0.b, z1.b
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%1 = getelementptr inbounds i8, i8* %in, i64 %ptr %1 = getelementptr inbounds i8, i8* %in, i64 %ptr
%2 = bitcast i8* %1 to <vscale x 16 x i8>* %2 = bitcast i8* %1 to <vscale x 16 x i8>*
%wide.load = load <vscale x 16 x i8>, <vscale x 16 x i8>* %2, align 1 %wide.load = load <vscale x 16 x i8>, <vscale x 16 x i8>* %2, align 1
%3 = zext <vscale x 16 x i8> %wide.load to <vscale x 16 x i64> %3 = zext <vscale x 16 x i8> %wide.load to <vscale x 16 x i64>
%4 = getelementptr inbounds i8, i8* %in, <vscale x 16 x i64> %3 %4 = getelementptr inbounds i8, i8* %in, <vscale x 16 x i64> %3
%wide.masked.gather = call <vscale x 16 x i8> @llvm.masked.gather.nxv16i8.nxv16p0(<vscale x 16 x i8*> %4, i32 1, <vscale x 16 x i1> shufflevector (<vscale x 16 x i1> insertelement (<vscale x 16 x i1> poison, i1 true, i32 0), <vscale x 16 x i1> poison, <vscale x 16 x i32> zeroinitializer), <vscale x 16 x i8> undef) %wide.masked.gather = call <vscale x 16 x i8> @llvm.masked.gather.nxv16i8.nxv16p0(<vscale x 16 x i8*> %4, i32 1, <vscale x 16 x i1> shufflevector (<vscale x 16 x i1> insertelement (<vscale x 16 x i1> poison, i1 true, i32 0), <vscale x 16 x i1> poison, <vscale x 16 x i32> zeroinitializer), <vscale x 16 x i8> undef)
ret <vscale x 16 x i8> %wide.masked.gather ret <vscale x 16 x i8> %wide.masked.gather
} }
define <vscale x 8 x i16> @narrow_i64_gather_index_i16(i16* %out, i16* %in, <vscale x 8 x i16> %d, i64 %ptr){ define <vscale x 8 x i16> @narrow_i64_gather_index_i16(i16* %out, i16* %in, <vscale x 8 x i16> %d, i64 %ptr){
; CHECK-LABEL: narrow_i64_gather_index_i16: ; CHECK-LABEL: narrow_i64_gather_index_i16:
; CHECK: // %bb.0: ; CHECK: // %bb.0:
; CHECK-NEXT: add x8, x1, x2, lsl #1 ; CHECK-NEXT: add x8, x1, x2, lsl #1
; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: ptrue p0.s
; CHECK-NEXT: ld1h { z0.d }, p0/z, [x1, x2, lsl #1] ; CHECK-NEXT: ld1h { z0.s }, p0/z, [x1, x2, lsl #1]
; CHECK-NEXT: ld1h { z1.d }, p0/z, [x8, #1, mul vl] ; CHECK-NEXT: ld1h { z1.s }, p0/z, [x8, #1, mul vl]
; CHECK-NEXT: ld1h { z2.d }, p0/z, [x8, #2, mul vl] ; CHECK-NEXT: ld1h { z0.s }, p0/z, [x1, z0.s, uxtw #1]
; CHECK-NEXT: ld1h { z3.d }, p0/z, [x8, #3, mul vl] ; CHECK-NEXT: ld1h { z1.s }, p0/z, [x1, z1.s, uxtw #1]
; CHECK-NEXT: ld1h { z3.d }, p0/z, [x1, z3.d, lsl #1] ; CHECK-NEXT: uzp1 z0.h, z0.h, z1.h
; CHECK-NEXT: ld1h { z2.d }, p0/z, [x1, z2.d, lsl #1]
; CHECK-NEXT: ld1h { z0.d }, p0/z, [x1, z0.d, lsl #1]
; CHECK-NEXT: ld1h { z1.d }, p0/z, [x1, z1.d, lsl #1]
; CHECK-NEXT: uzp1 z2.s, z2.s, z3.s
; CHECK-NEXT: uzp1 z0.s, z0.s, z1.s
; CHECK-NEXT: uzp1 z0.h, z0.h, z2.h
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%1 = getelementptr inbounds i16, i16* %in, i64 %ptr %1 = getelementptr inbounds i16, i16* %in, i64 %ptr
%2 = bitcast i16* %1 to <vscale x 8 x i16>* %2 = bitcast i16* %1 to <vscale x 8 x i16>*
%wide.load = load <vscale x 8 x i16>, <vscale x 8 x i16>* %2, align 1 %wide.load = load <vscale x 8 x i16>, <vscale x 8 x i16>* %2, align 1
%3 = zext <vscale x 8 x i16> %wide.load to <vscale x 8 x i64> %3 = zext <vscale x 8 x i16> %wide.load to <vscale x 8 x i64>
%4 = getelementptr inbounds i16, i16* %in, <vscale x 8 x i64> %3 %4 = getelementptr inbounds i16, i16* %in, <vscale x 8 x i64> %3
%wide.masked.gather = call <vscale x 8 x i16> @llvm.masked.gather.nxv8i16.nxv8p0(<vscale x 8 x i16*> %4, i32 1, <vscale x 8 x i1> shufflevector (<vscale x 8 x i1> insertelement (<vscale x 8 x i1> poison, i1 true, i32 0), <vscale x 8 x i1> poison, <vscale x 8 x i32> zeroinitializer), <vscale x 8 x i16> undef) %wide.masked.gather = call <vscale x 8 x i16> @llvm.masked.gather.nxv8i16.nxv8p0(<vscale x 8 x i16*> %4, i32 1, <vscale x 8 x i1> shufflevector (<vscale x 8 x i1> insertelement (<vscale x 8 x i1> poison, i1 true, i32 0), <vscale x 8 x i1> poison, <vscale x 8 x i32> zeroinitializer), <vscale x 8 x i16> undef)
ret <vscale x 8 x i16> %wide.masked.gather ret <vscale x 8 x i16> %wide.masked.gather
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