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lib/Target/Mips/MipsInstrInfo.td
| Show First 20 Lines • Show All 1,805 Lines • ▼ Show 20 Lines | |||||
| def : MipsInstAlias<"dror $rd, $rs", | def : MipsInstAlias<"dror $rd, $rs", | ||||
| (DROR GPR32Opnd:$rd, GPR32Opnd:$rd, GPR32Opnd:$rs), 0>, ISA_MIPS64; | (DROR GPR32Opnd:$rd, GPR32Opnd:$rd, GPR32Opnd:$rs), 0>, ISA_MIPS64; | ||||
| def : MipsInstAlias<"dror $rd, $imm", | def : MipsInstAlias<"dror $rd, $imm", | ||||
| (DRORImm GPR32Opnd:$rd, GPR32Opnd:$rd, simm16:$imm), 0>, ISA_MIPS64; | (DRORImm GPR32Opnd:$rd, GPR32Opnd:$rd, simm16:$imm), 0>, ISA_MIPS64; | ||||
| def ABSMacro : MipsAsmPseudoInst<(outs GPR32Opnd:$rd), (ins GPR32Opnd:$rs), | def ABSMacro : MipsAsmPseudoInst<(outs GPR32Opnd:$rd), (ins GPR32Opnd:$rs), | ||||
| "abs\t$rd, $rs">; | "abs\t$rd, $rs">; | ||||
| def MULImm : MipsAsmPseudoInst<(outs), (ins GPR32Opnd:$rd, GPR32Opnd:$rs, simm16:$imm), | |||||
| "mul\t$rd, $rs, $imm">; | |||||
| def MULOMacro : MipsAsmPseudoInst<(outs), (ins GPR32Opnd:$rd, GPR32Opnd:$rs, GPR32Opnd:$rt), | |||||
| "mulo\t$rd, $rs, $rt">, ISA_MIPS1_NOT_32R6_64R6; | |||||
| def MULOUMacro : MipsAsmPseudoInst<(outs), (ins GPR32Opnd:$rd, GPR32Opnd:$rs, GPR32Opnd:$rt), | |||||
| "mulou\t$rd, $rs, $rt">, ISA_MIPS1_NOT_32R6_64R6; | |||||
| def DMULImm : MipsAsmPseudoInst<(outs), (ins GPR32Opnd:$rs, GPR32Opnd:$rt, simm16:$imm), | |||||
| "dmul\t$rs, $rt, $imm">, ISA_MIPS1_NOT_32R6_64R6; | |||||
| def DMULOMacro : MipsAsmPseudoInst<(outs), (ins GPR32Opnd:$rs, GPR32Opnd:$rt, GPR32Opnd:$rd), | |||||
| "dmulo\t$rs, $rt, $rd">, ISA_MIPS1_NOT_32R6_64R6; | |||||
| def DMULOUMacro : MipsAsmPseudoInst<(outs), (ins GPR32Opnd:$rs, GPR32Opnd:$rt, GPR32Opnd:$rd), | |||||
| "dmulou\t$rs, $rt, $rd">, ISA_MIPS1_NOT_32R6_64R6; | |||||
| //===----------------------------------------------------------------------===// | //===----------------------------------------------------------------------===// | ||||
| // Instruction aliases | // Instruction aliases | ||||
| //===----------------------------------------------------------------------===// | //===----------------------------------------------------------------------===// | ||||
| def : MipsInstAlias<"move $dst, $src", | def : MipsInstAlias<"move $dst, $src", | ||||
dsanders: Naming convention as discussed above.
Also, AdditionalPredicates isn't the right predicate… | |||||
MULImm and DMULImm should end in 'Macro' too dsanders: MULImm and DMULImm should end in 'Macro' too | |||||
| (OR GPR32Opnd:$dst, GPR32Opnd:$src, ZERO), 1>, | (OR GPR32Opnd:$dst, GPR32Opnd:$src, ZERO), 1>, | ||||
| GPR_32 { | GPR_32 { | ||||
| let AdditionalPredicates = [NotInMicroMips]; | let AdditionalPredicates = [NotInMicroMips]; | ||||
| } | } | ||||
| def : MipsInstAlias<"move $dst, $src", | def : MipsInstAlias<"move $dst, $src", | ||||
| (ADDu GPR32Opnd:$dst, GPR32Opnd:$src, ZERO), 1>, | (ADDu GPR32Opnd:$dst, GPR32Opnd:$src, ZERO), 1>, | ||||
| GPR_32 { | GPR_32 { | ||||
| let AdditionalPredicates = [NotInMicroMips]; | let AdditionalPredicates = [NotInMicroMips]; | ||||
| ▲ Show 20 Lines • Show All 94 Lines • ▼ Show 20 Lines | def : MipsInstAlias<"subu $rs, $imm", (ADDiu GPR32Opnd:$rs, GPR32Opnd:$rs, | ||||
| InvertedImOperand:$imm), 0>; | InvertedImOperand:$imm), 0>; | ||||
| def : MipsInstAlias<"sra $rd, $rt, $rs", | def : MipsInstAlias<"sra $rd, $rt, $rs", | ||||
| (SRAV GPR32Opnd:$rd, GPR32Opnd:$rt, GPR32Opnd:$rs), 0>; | (SRAV GPR32Opnd:$rd, GPR32Opnd:$rt, GPR32Opnd:$rs), 0>; | ||||
| def : MipsInstAlias<"srl $rd, $rt, $rs", | def : MipsInstAlias<"srl $rd, $rt, $rs", | ||||
| (SRLV GPR32Opnd:$rd, GPR32Opnd:$rt, GPR32Opnd:$rs), 0>; | (SRLV GPR32Opnd:$rd, GPR32Opnd:$rt, GPR32Opnd:$rs), 0>; | ||||
| def : MipsInstAlias<"sdbbp", (SDBBP 0)>, ISA_MIPS32_NOT_32R6_64R6; | def : MipsInstAlias<"sdbbp", (SDBBP 0)>, ISA_MIPS32_NOT_32R6_64R6; | ||||
| def : MipsInstAlias<"sync", | def : MipsInstAlias<"sync", | ||||
| (SYNC 0), 1>, ISA_MIPS2; | (SYNC 0), 1>, ISA_MIPS2; | ||||
| def : MipsInstAlias<"mulo $rs, $rt", | |||||
AdditionalPredicates isn't the right predicate list for ISA predicates. Use the ISA_MIPS1_NOT_32R6_64R6 adjective instead. dsanders: AdditionalPredicates isn't the right predicate list for ISA predicates. Use the… | |||||
| (MULOMacro GPR32Opnd:$rs, GPR32Opnd:$rs, GPR32Opnd:$rt), 0>, | |||||
| ISA_MIPS1_NOT_32R6_64R6; | |||||
| def : MipsInstAlias<"mulou $rs, $rt", | |||||
| (MULOUMacro GPR32Opnd:$rs, GPR32Opnd:$rs, GPR32Opnd:$rt), 0>, | |||||
| ISA_MIPS1_NOT_32R6_64R6; | |||||
| //===----------------------------------------------------------------------===// | //===----------------------------------------------------------------------===// | ||||
| // Assembler Pseudo Instructions | // Assembler Pseudo Instructions | ||||
| //===----------------------------------------------------------------------===// | //===----------------------------------------------------------------------===// | ||||
| class LoadImmediate32<string instr_asm, Operand Od, RegisterOperand RO> : | class LoadImmediate32<string instr_asm, Operand Od, RegisterOperand RO> : | ||||
| MipsAsmPseudoInst<(outs RO:$rt), (ins Od:$imm32), | MipsAsmPseudoInst<(outs RO:$rt), (ins Od:$imm32), | ||||
| !strconcat(instr_asm, "\t$rt, $imm32")> ; | !strconcat(instr_asm, "\t$rt, $imm32")> ; | ||||
| def LoadImm32 : LoadImmediate32<"li", simm32, GPR32Opnd>; | def LoadImm32 : LoadImmediate32<"li", simm32, GPR32Opnd>; | ||||
| ▲ Show 20 Lines • Show All 366 Lines • Show Last 20 Lines | |||||
Naming convention as discussed above.
Also, AdditionalPredicates isn't the right predicate list for ISA predicates. Use the ISA_MIPS1_NOT_32R6_64R6 adjective instead.