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llvm/test/CodeGen/RISCV/rv64zbpbo-intrinsics.ll
- This file was added.
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py | |||||
; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbpbo -verify-machineinstrs < %s \ | |||||
; RUN: | FileCheck %s -check-prefix=RV64ZBPBO | |||||
declare i32 @llvm.riscv.fsr.i32(i32, i32, i32) | |||||
define i32 @fsr_i32(i32 %a, i32 %b, i32 %c) nounwind { | |||||
; RV64ZBPBO-LABEL: fsr_i32: | |||||
; RV64ZBPBO: # %bb.0: | |||||
; RV64ZBPBO-NEXT: fsrw a0, a0, a1, a2 | |||||
; RV64ZBPBO-NEXT: ret | |||||
%1 = call i32 @llvm.riscv.fsr.i32(i32 %a, i32 %b, i32 %c) | |||||
ret i32 %1 | |||||
} | |||||
declare i64 @llvm.riscv.grev.i64(i64 %a, i64 %b) | |||||
define i64 @revi64(i64 %a) nounwind { | |||||
; RV64ZBPBO-LABEL: revi64: | |||||
; RV64ZBPBO: # %bb.0: | |||||
; RV64ZBPBO-NEXT: rev a0, a0 | |||||
; RV64ZBPBO-NEXT: ret | |||||
%tmp = call i64 @llvm.riscv.grev.i64(i64 %a, i64 63) | |||||
ret i64 %tmp | |||||
} |