Page MenuHomePhabricator
Differential D128604 Diff 441052 clang/lib/Sema/SemaChecking.cpp

Changeset View

Standalone View

View Options

clang/lib/Sema/SemaChecking.cpp

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
Show First 20 Lines • Show All 4,310 Lines • ▼ Show 20 Linesbool Sema::CheckRISCVLMUL(CallExpr *TheCall, unsigned ArgNum) {
int64_t Val = Result.getSExtValue(); int64_t Val = Result.getSExtValue();
if ((Val >= 0 && Val <= 3) || (Val >= 5 && Val <= 7)) if ((Val >= 0 && Val <= 3) || (Val >= 5 && Val <= 7))
return false; return false;
return Diag(TheCall->getBeginLoc(), diag::err_riscv_builtin_invalid_lmul) return Diag(TheCall->getBeginLoc(), diag::err_riscv_builtin_invalid_lmul)
<< Arg->getSourceRange(); << Arg->getSourceRange();
} }
static bool isRISCV32Builtin(unsigned BuiltinID) { static bool isRISCV32Builtin(unsigned BuiltinID, const TargetInfo &TI) {
// These builtins only work on riscv32 targets. // These builtins only work on riscv32 targets.
switch (BuiltinID) { switch (BuiltinID) {
case RISCV::BI__builtin_riscv_zip_32: case RISCV::BI__builtin_riscv_zip_32:
case RISCV::BI__builtin_riscv_unzip_32: case RISCV::BI__builtin_riscv_unzip_32:
case RISCV::BI__builtin_riscv_aes32dsi_32: case RISCV::BI__builtin_riscv_aes32dsi_32:
case RISCV::BI__builtin_riscv_aes32dsmi_32: case RISCV::BI__builtin_riscv_aes32dsmi_32:
case RISCV::BI__builtin_riscv_aes32esi_32: case RISCV::BI__builtin_riscv_aes32esi_32:
case RISCV::BI__builtin_riscv_aes32esmi_32: case RISCV::BI__builtin_riscv_aes32esmi_32:
case RISCV::BI__builtin_riscv_sha512sig0h_32: case RISCV::BI__builtin_riscv_sha512sig0h_32:
case RISCV::BI__builtin_riscv_sha512sig0l_32: case RISCV::BI__builtin_riscv_sha512sig0l_32:
case RISCV::BI__builtin_riscv_sha512sig1h_32: case RISCV::BI__builtin_riscv_sha512sig1h_32:
case RISCV::BI__builtin_riscv_sha512sig1l_32: case RISCV::BI__builtin_riscv_sha512sig1l_32:
case RISCV::BI__builtin_riscv_sha512sum0r_32: case RISCV::BI__builtin_riscv_sha512sum0r_32:
case RISCV::BI__builtin_riscv_sha512sum1r_32: case RISCV::BI__builtin_riscv_sha512sum1r_32:
return true; return true;
case RISCV::BI__builtin_riscv_clz_32:
if (!TI.hasFeature("zbb"))
return true;
} }
return false; return false;
} }
bool Sema::CheckRISCVBuiltinFunctionCall(const TargetInfo &TI, bool Sema::CheckRISCVBuiltinFunctionCall(const TargetInfo &TI,
unsigned BuiltinID, unsigned BuiltinID,
CallExpr *TheCall) { CallExpr *TheCall) {
// CodeGenFunction can also detect this, but this gives a better error // CodeGenFunction can also detect this, but this gives a better error
// message. // message.
bool FeatureMissing = false; bool FeatureMissing = false;
SmallVector<StringRef> ReqFeatures; SmallVector<StringRef> ReqFeatures;
StringRef Features = Context.BuiltinInfo.getRequiredFeatures(BuiltinID); StringRef Features = Context.BuiltinInfo.getRequiredFeatures(BuiltinID);
Features.split(ReqFeatures, ','); Features.split(ReqFeatures, ',');
// Check for 32-bit only builtins on a 64-bit target. // Check for 32-bit only builtins on a 64-bit target.
const llvm::Triple &TT = TI.getTriple(); const llvm::Triple &TT = TI.getTriple();
if (TT.getArch() != llvm::Triple::riscv32 && isRISCV32Builtin(BuiltinID)) if (TT.getArch() != llvm::Triple::riscv32 && isRISCV32Builtin(BuiltinID, TI))
return Diag(TheCall->getCallee()->getBeginLoc(), return Diag(TheCall->getCallee()->getBeginLoc(),
diag::err_32_bit_builtin_64_bit_tgt); diag::err_32_bit_builtin_64_bit_tgt);
// Check if each required feature is included // Check if each required feature is included
for (StringRef F : ReqFeatures) { for (StringRef F : ReqFeatures) {
SmallVector<StringRef> ReqOpFeatures; SmallVector<StringRef> ReqOpFeatures;
F.split(ReqOpFeatures, '|'); F.split(ReqOpFeatures, '|');
bool HasFeature = false; bool HasFeature = false;
▲ Show 20 Lines • Show All 13,392 Lines • Show Last 20 Lines