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Differential D128263 Diff 440192 llvm/test/CodeGen/SPARC/inlineasm-v9.ll

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llvm/test/CodeGen/SPARC/inlineasm-v9.ll

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tail call void asm sideeffect "fadds $0,$1,$2", "{f20},{f20},{f20}"(float 6.0, float 7.0, float 8.0) tail call void asm sideeffect "fadds $0,$1,$2", "{f20},{f20},{f20}"(float 6.0, float 7.0, float 8.0)
tail call void asm sideeffect "faddd $0,$1,$2", "{f20},{f20},{f20}"(double 9.0, double 10.0, double 11.0) tail call void asm sideeffect "faddd $0,$1,$2", "{f20},{f20},{f20}"(double 9.0, double 10.0, double 11.0)
tail call void asm sideeffect "faddq $0,$1,$2", "{f40},{f40},{f40}"(fp128 0xL0, fp128 0xL0, fp128 0xL0) tail call void asm sideeffect "faddq $0,$1,$2", "{f40},{f40},{f40}"(fp128 0xL0, fp128 0xL0, fp128 0xL0)
ret void ret void
} }
;; Ensure that 64-bit immediates aren't truncated ;; Ensure that 64-bit immediates aren't truncated
; CHECK-LABEL: test_large_immediate ; CHECK-LABEL: test_large_immediate
; CHECK: or %o0, %lo(4294967296), %o0 ; CHECK: or %i0, %lo(4294967296), %i0
define i64 @test_large_immediate(i64) { define i64 @test_large_immediate(i64) {
entry: entry:
%1 = tail call i64 asm "or $0, %lo($1), $0", "=r,i,r"(i64 4294967296, i64 %0) %1 = tail call i64 asm "or $0, %lo($1), $0", "=r,i,r"(i64 4294967296, i64 %0)
ret i64 %1 ret i64 %1
} }
; Ensure that the input register value is not truncated to 32bit. ; Ensure that the input register value is not truncated to 32bit.
; CHECK-LABEL: test_constraint_input_type ; CHECK-LABEL: test_constraint_input_type
; CHECK: ldx [%o0], %o0 ; CHECK: ldx [%i0], %o0
define void @test_constraint_input_type(i64* %arg1) { define void @test_constraint_input_type(i64* %arg1) {
Entry: Entry:
%val = load i64, i64* %arg1 %val = load i64, i64* %arg1
tail call void asm sideeffect "", "{o0}"(i64 %val) tail call void asm sideeffect "", "{o0}"(i64 %val)
ret void ret void
} }